JP3992449B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP3992449B2
JP3992449B2 JP2001096380A JP2001096380A JP3992449B2 JP 3992449 B2 JP3992449 B2 JP 3992449B2 JP 2001096380 A JP2001096380 A JP 2001096380A JP 2001096380 A JP2001096380 A JP 2001096380A JP 3992449 B2 JP3992449 B2 JP 3992449B2
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JP
Japan
Prior art keywords
voltage
terminal
wiring
reference voltage
memory cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001096380A
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English (en)
Japanese (ja)
Other versions
JP2002298576A (ja
JP2002298576A5 (enExample
Inventor
好治 加藤
悟 川本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2001096380A priority Critical patent/JP3992449B2/ja
Priority to TW090125810A priority patent/TW559811B/zh
Priority to US09/983,148 priority patent/US6567298B2/en
Priority to KR1020010069362A priority patent/KR100776606B1/ko
Publication of JP2002298576A publication Critical patent/JP2002298576A/ja
Priority to US10/404,153 priority patent/US6847540B2/en
Publication of JP2002298576A5 publication Critical patent/JP2002298576A5/ja
Application granted granted Critical
Publication of JP3992449B2 publication Critical patent/JP3992449B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/227—Timing of memory operations based on dummy memory elements or replica circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4099—Dummy cell treatment; Reference voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/14—Dummy cell management; Sense reference voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
JP2001096380A 2001-03-29 2001-03-29 半導体記憶装置 Expired - Fee Related JP3992449B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2001096380A JP3992449B2 (ja) 2001-03-29 2001-03-29 半導体記憶装置
TW090125810A TW559811B (en) 2001-03-29 2001-10-18 Semiconductor memory device and control method thereof
US09/983,148 US6567298B2 (en) 2001-03-29 2001-10-23 Semiconductor memory device and control method thereof
KR1020010069362A KR100776606B1 (ko) 2001-03-29 2001-11-08 반도체 기억 장치
US10/404,153 US6847540B2 (en) 2001-03-29 2003-04-02 Semiconductor memory device and control method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001096380A JP3992449B2 (ja) 2001-03-29 2001-03-29 半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2002298576A JP2002298576A (ja) 2002-10-11
JP2002298576A5 JP2002298576A5 (enExample) 2005-02-24
JP3992449B2 true JP3992449B2 (ja) 2007-10-17

Family

ID=18950298

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001096380A Expired - Fee Related JP3992449B2 (ja) 2001-03-29 2001-03-29 半導体記憶装置

Country Status (4)

Country Link
US (2) US6567298B2 (enExample)
JP (1) JP3992449B2 (enExample)
KR (1) KR100776606B1 (enExample)
TW (1) TW559811B (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7310356B2 (en) * 2002-06-24 2007-12-18 Paradyne Corporation Automatic discovery of network core type
JP2004110863A (ja) * 2002-09-13 2004-04-08 Renesas Technology Corp 半導体記憶装置
US7103330B2 (en) * 2003-01-28 2006-09-05 Koninklijke Philips Electronics N.V. Method of transmitting information between an information transmitter and an information receiver
JP2004265533A (ja) * 2003-03-03 2004-09-24 Matsushita Electric Ind Co Ltd 半導体記憶回路
US7827077B2 (en) * 2003-05-02 2010-11-02 Visa U.S.A. Inc. Method and apparatus for management of electronic receipts on portable devices
US7226857B2 (en) 2004-07-30 2007-06-05 Micron Technology, Inc. Front-end processing of nickel plated bond pads
DE102004041658A1 (de) * 2004-08-27 2006-03-09 Infineon Technologies Ag Verfahren zum Testen eines integrierten Halbleiterspeichers
JP2007164938A (ja) * 2005-12-16 2007-06-28 Matsushita Electric Ind Co Ltd 半導体記憶装置
US7619944B2 (en) * 2007-01-05 2009-11-17 Innovative Silicon Isi Sa Method and apparatus for variable memory cell refresh
US8804449B2 (en) 2012-09-06 2014-08-12 Micron Technology, Inc. Apparatus and methods to provide power management for memory devices
US10122259B2 (en) * 2015-09-16 2018-11-06 Semiconductor Components Industries, Llc Over power protection for power converter
US10217794B2 (en) 2017-05-24 2019-02-26 Globalfoundries Singapore Pte. Ltd. Integrated circuits with vertical capacitors and methods for producing the same
US11450364B2 (en) * 2020-08-27 2022-09-20 Taiwan Semiconductor Manufacturing Company Ltd. Computing-in-memory architecture

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0778991B2 (ja) * 1988-07-26 1995-08-23 株式会社東芝 半導体メモリ
JP2762589B2 (ja) * 1989-07-21 1998-06-04 日本電気株式会社 半導体メモリ回路
US5337270A (en) * 1991-08-26 1994-08-09 Nec Corporation Semiconductor dynamic memory
JP2874469B2 (ja) * 1991-08-26 1999-03-24 日本電気株式会社 半導体ダイナミックｒａｍ装置
JPH05120870A (ja) * 1991-10-24 1993-05-18 Nec Ibaraki Ltd Ｄ−ｒａｍのリフレツシユ方式
JPH05121650A (ja) * 1991-10-25 1993-05-18 Nippon Telegr & Teleph Corp <Ntt> 半導体集積回路装置
JP3274728B2 (ja) * 1992-12-17 2002-04-15 株式会社 沖マイクロデザイン 半導体集積回路装置
JPH06223568A (ja) * 1993-01-29 1994-08-12 Mitsubishi Electric Corp 中間電位発生装置
JP3297124B2 (ja) * 1993-02-24 2002-07-02 三菱電機株式会社 ダイナミック型半導体記憶装置
JP3278981B2 (ja) * 1993-06-23 2002-04-30 株式会社日立製作所 半導体メモリ
JP2731701B2 (ja) * 1993-06-30 1998-03-25 インターナショナル・ビジネス・マシーンズ・コーポレイション Ｄｒａｍセル
JPH07201177A (ja) * 1993-12-28 1995-08-04 Sanyo Electric Co Ltd １／２ｖｃｃ発生回路の共用化方式
JP3583482B2 (ja) * 1994-10-04 2004-11-04 株式会社ルネサステクノロジ 半導体集積回路装置
JP2576425B2 (ja) * 1994-10-27 1997-01-29 日本電気株式会社 強誘電体メモリ装置
JP3369041B2 (ja) * 1996-03-19 2003-01-20 富士通株式会社 半導体記憶装置
JPH1055681A (ja) * 1996-08-12 1998-02-24 Sony Corp 半導体装置
KR100256253B1 (ko) * 1997-06-26 2000-05-15 김영환 비휘발성 반도체 메모리 장치
JPH1125688A (ja) * 1997-07-02 1999-01-29 Oki Electric Ind Co Ltd 半導体記憶装置
JP3492168B2 (ja) * 1997-10-21 2004-02-03 シャープ株式会社 不揮発性半導体記憶装置
JP2000030440A (ja) * 1998-07-08 2000-01-28 Mitsubishi Electric Corp 半導体記憶装置
JP4334646B2 (ja) * 1999-01-20 2009-09-30 パナソニック株式会社 半導体記憶装置の制御方法
JP2000215660A (ja) * 1999-01-25 2000-08-04 Nec Corp 半導体記憶装置
JP3604576B2 (ja) * 1999-02-19 2004-12-22 シャープ株式会社 強誘電体メモリ装置
JP4555416B2 (ja) * 1999-09-22 2010-09-29 富士通セミコンダクター株式会社 半導体集積回路およびその制御方法

Also Published As

Publication number Publication date
US6567298B2 (en) 2003-05-20
JP2002298576A (ja) 2002-10-11
US6847540B2 (en) 2005-01-25
KR20020077020A (ko) 2002-10-11
TW559811B (en) 2003-11-01
US20030202393A1 (en) 2003-10-30
US20020141226A1 (en) 2002-10-03
KR100776606B1 (ko) 2007-11-16

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