JP3954302B2 - 半導体集積回路 - Google Patents
半導体集積回路 Download PDFInfo
- Publication number
- JP3954302B2 JP3954302B2 JP2000371939A JP2000371939A JP3954302B2 JP 3954302 B2 JP3954302 B2 JP 3954302B2 JP 2000371939 A JP2000371939 A JP 2000371939A JP 2000371939 A JP2000371939 A JP 2000371939A JP 3954302 B2 JP3954302 B2 JP 3954302B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- read
- fuse
- group
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
Landscapes
- Logic Circuits (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Electronic Switches (AREA)
- Read Only Memory (AREA)
- Dram (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000371939A JP3954302B2 (ja) | 2000-12-06 | 2000-12-06 | 半導体集積回路 |
| US10/007,148 US6577551B2 (en) | 2000-12-06 | 2001-12-04 | Semiconductor integrated circuit having a built-in data storage circuit for nonvolatile storage of control data |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000371939A JP3954302B2 (ja) | 2000-12-06 | 2000-12-06 | 半導体集積回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002175696A JP2002175696A (ja) | 2002-06-21 |
| JP2002175696A5 JP2002175696A5 (enExample) | 2005-05-26 |
| JP3954302B2 true JP3954302B2 (ja) | 2007-08-08 |
Family
ID=18841575
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000371939A Expired - Fee Related JP3954302B2 (ja) | 2000-12-06 | 2000-12-06 | 半導体集積回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US6577551B2 (enExample) |
| JP (1) | JP3954302B2 (enExample) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002269999A (ja) * | 2001-03-13 | 2002-09-20 | Toshiba Corp | 半導体記憶装置 |
| JP4790925B2 (ja) * | 2001-03-30 | 2011-10-12 | 富士通セミコンダクター株式会社 | アドレス発生回路 |
| KR100420125B1 (ko) * | 2002-02-02 | 2004-03-02 | 삼성전자주식회사 | 비휘발성 반도체 메모리 장치와 그것의 파워-업 독출 방법 |
| DE10217710C1 (de) * | 2002-04-20 | 2003-11-20 | Infineon Technologies Ag | Halbleiterschaltung mit Fuses und Ausleseverfahren für Fuses |
| US6667189B1 (en) * | 2002-09-13 | 2003-12-23 | Institute Of Microelectronics | High performance silicon condenser microphone with perforated single crystal silicon backplate |
| JP4169592B2 (ja) * | 2002-12-19 | 2008-10-22 | 株式会社NSCore | Cmis型半導体不揮発記憶回路 |
| JP4138521B2 (ja) * | 2003-02-13 | 2008-08-27 | 富士通株式会社 | 半導体装置 |
| KR101106836B1 (ko) * | 2003-11-12 | 2012-01-19 | 엔엑스피 비 브이 | 전자 회로 및 데이터 요소 프로세싱 방법 |
| JP2006059969A (ja) * | 2004-08-19 | 2006-03-02 | Sony Corp | 半導体装置 |
| JP4880999B2 (ja) * | 2005-12-28 | 2012-02-22 | 株式会社東芝 | 半導体集積回路およびその検査方法 |
| JP5101044B2 (ja) * | 2006-06-06 | 2012-12-19 | 日置電機株式会社 | 測定装置 |
| JP5099674B2 (ja) * | 2006-12-25 | 2012-12-19 | 三星電子株式会社 | 半導体集積回路 |
| US7667506B2 (en) * | 2007-03-29 | 2010-02-23 | Mitutoyo Corporation | Customizable power-on reset circuit based on critical circuit counterparts |
| JP2009099156A (ja) * | 2007-10-12 | 2009-05-07 | Elpida Memory Inc | フューズラッチ回路及びフューズラッチ方法 |
| JP4558033B2 (ja) * | 2007-12-10 | 2010-10-06 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| KR100930411B1 (ko) * | 2008-04-10 | 2009-12-08 | 주식회사 하이닉스반도체 | 퓨즈 정보 제어 장치, 이를 이용한 반도체 집적회로 및그의 퓨즈 정보 제어 방법 |
| JP2011124683A (ja) * | 2009-12-09 | 2011-06-23 | Toshiba Corp | 出力バッファ回路、入力バッファ回路、及び入出力バッファ回路 |
| JP2011124689A (ja) * | 2009-12-09 | 2011-06-23 | Toshiba Corp | バッファ回路 |
| KR101901664B1 (ko) * | 2012-04-02 | 2018-10-01 | 삼성전자주식회사 | 멀티 리딩 모드를 갖는 퓨즈 데이터 리딩 회로 |
| JP2014078313A (ja) * | 2013-12-26 | 2014-05-01 | Ps4 Luxco S A R L | 半導体装置 |
| CN105139891B (zh) * | 2015-09-11 | 2023-04-18 | 四川易冲科技有限公司 | 一种用于校准模拟集成电路的方法及装置 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5999463A (en) * | 1997-07-21 | 1999-12-07 | Samsung Electronics Co., Ltd. | Redundancy fuse box and semiconductor device including column redundancy fuse box shared by a plurality of memory blocks |
| JP3730381B2 (ja) | 1997-10-21 | 2006-01-05 | 株式会社東芝 | 半導体記憶装置 |
| JPH11238394A (ja) * | 1997-12-18 | 1999-08-31 | Toshiba Corp | 半導体記憶装置 |
-
2000
- 2000-12-06 JP JP2000371939A patent/JP3954302B2/ja not_active Expired - Fee Related
-
2001
- 2001-12-04 US US10/007,148 patent/US6577551B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US6577551B2 (en) | 2003-06-10 |
| JP2002175696A (ja) | 2002-06-21 |
| US20020067633A1 (en) | 2002-06-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3954302B2 (ja) | 半導体集積回路 | |
| US7333377B2 (en) | Test mode control device using nonvolatile ferroelectric memory | |
| JP2888034B2 (ja) | 半導体メモリ装置 | |
| US6018487A (en) | Read-only memory device having bit line discharge circuitry and method of reading data from the same | |
| CN103778944B (zh) | 半导体装置 | |
| JP4619394B2 (ja) | 強誘電体メモリ装置のプログラム方法 | |
| JP2008198304A (ja) | 不揮発性半導体記憶装置 | |
| JP4532951B2 (ja) | 半導体集積回路の使用方法および半導体集積回路 | |
| US20060203580A1 (en) | Programmable element latch circuit | |
| JP2018133118A (ja) | 半導体装置 | |
| JP2002217295A (ja) | 半導体装置 | |
| JP2689768B2 (ja) | 半導体集積回路装置 | |
| KR100416919B1 (ko) | 메모리디바이스의메모리셀억세스방법및억세스회로 | |
| US6535438B2 (en) | Semiconductor memory device adopting redundancy system | |
| KR100383007B1 (ko) | 반도체 기억 장치 | |
| US20140063901A1 (en) | Memory devices, circuits and, methods that apply different electrical conditions in access operations | |
| US5886940A (en) | Self-protected circuit for non-selected programmable elements during programming | |
| JP4922009B2 (ja) | 半導体記憶装置 | |
| JP2008047247A (ja) | 電気ヒューズ回路、メモリ装置及び電子部品 | |
| JPH06176568A (ja) | 半導体記憶装置 | |
| JP2848117B2 (ja) | 半導体記憶回路 | |
| US7623400B2 (en) | Memory device with programmable control for activation of read amplifiers | |
| CN119170080B (zh) | 反熔丝器件及其存储器 | |
| JP2000200498A (ja) | 半導体装置 | |
| JP2019067467A (ja) | 半導体記憶装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20040721 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20040721 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070125 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070130 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070402 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20070424 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20070426 |
|
| R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110511 Year of fee payment: 4 |
|
| LAPS | Cancellation because of no payment of annual fees |