JP2970425B2 - バイポーラトランジスタの製造方法 - Google Patents

バイポーラトランジスタの製造方法

Info

Publication number
JP2970425B2
JP2970425B2 JP6229891A JP22989194A JP2970425B2 JP 2970425 B2 JP2970425 B2 JP 2970425B2 JP 6229891 A JP6229891 A JP 6229891A JP 22989194 A JP22989194 A JP 22989194A JP 2970425 B2 JP2970425 B2 JP 2970425B2
Authority
JP
Japan
Prior art keywords
film
manufacturing
layer
silicon nitride
bipolar transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP6229891A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0897227A (ja
Inventor
博 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP6229891A priority Critical patent/JP2970425B2/ja
Priority to EP95115150A priority patent/EP0704907B1/en
Priority to DE69530648T priority patent/DE69530648T2/de
Priority to US08/533,850 priority patent/US5648280A/en
Publication of JPH0897227A publication Critical patent/JPH0897227A/ja
Application granted granted Critical
Publication of JP2970425B2 publication Critical patent/JP2970425B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/01Manufacture or treatment
    • H10D10/021Manufacture or treatment of heterojunction BJTs [HBT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D10/00Bipolar junction transistors [BJT]
    • H10D10/80Heterojunction BJTs
    • H10D10/821Vertical heterojunction BJTs
    • H10D10/891Vertical heterojunction BJTs comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/969Simultaneous formation of monocrystalline and polycrystalline regions

Landscapes

  • Bipolar Transistors (AREA)
  • Formation Of Insulating Films (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
JP6229891A 1994-09-26 1994-09-26 バイポーラトランジスタの製造方法 Expired - Fee Related JP2970425B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP6229891A JP2970425B2 (ja) 1994-09-26 1994-09-26 バイポーラトランジスタの製造方法
EP95115150A EP0704907B1 (en) 1994-09-26 1995-09-26 Bipolar transistor with a base layer having an extremely low resistance and method for fabricating the same
DE69530648T DE69530648T2 (de) 1994-09-26 1995-09-26 Bipolartranistor mit einem sehr niedrigen Basisschichtwiderstand und Verfahren zur Herstellung
US08/533,850 US5648280A (en) 1994-09-26 1995-09-26 Method for fabricating a bipolar transistor with a base layer having an extremely low resistance

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6229891A JP2970425B2 (ja) 1994-09-26 1994-09-26 バイポーラトランジスタの製造方法

Publications (2)

Publication Number Publication Date
JPH0897227A JPH0897227A (ja) 1996-04-12
JP2970425B2 true JP2970425B2 (ja) 1999-11-02

Family

ID=16899345

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6229891A Expired - Fee Related JP2970425B2 (ja) 1994-09-26 1994-09-26 バイポーラトランジスタの製造方法

Country Status (4)

Country Link
US (1) US5648280A (OSRAM)
EP (1) EP0704907B1 (OSRAM)
JP (1) JP2970425B2 (OSRAM)
DE (1) DE69530648T2 (OSRAM)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2937253B2 (ja) * 1996-01-17 1999-08-23 日本電気株式会社 半導体装置およびその製造方法
CA2302758A1 (en) * 1997-09-16 1999-03-25 Eugene A. Fitzgerald Co-planar si and ge composite substrate and method of producing same
US6143655A (en) 1998-02-25 2000-11-07 Micron Technology, Inc. Methods and structures for silver interconnections in integrated circuits
US6121126A (en) * 1998-02-25 2000-09-19 Micron Technologies, Inc. Methods and structures for metal interconnections in integrated circuits
US6492694B2 (en) 1998-02-27 2002-12-10 Micron Technology, Inc. Highly conductive composite polysilicon gate for CMOS integrated circuits
US6815303B2 (en) * 1998-04-29 2004-11-09 Micron Technology, Inc. Bipolar transistors with low-resistance emitter contacts
DE19845789A1 (de) * 1998-09-21 2000-03-23 Inst Halbleiterphysik Gmbh Bipolartransistor und Verfahren zu seiner Herstellung
DE19845787A1 (de) * 1998-09-21 2000-03-23 Inst Halbleiterphysik Gmbh Bipolartransistor und Verfahren zu seiner Herstellung
DE19845793A1 (de) 1998-09-21 2000-03-23 Inst Halbleiterphysik Gmbh Bipolartransistor und Verfahren zu seiner Herstellung
US6251738B1 (en) 2000-01-10 2001-06-26 International Business Machines Corporation Process for forming a silicon-germanium base of heterojunction bipolar transistor
US6573539B2 (en) 2000-01-10 2003-06-03 International Business Machines Corporation Heterojunction bipolar transistor with silicon-germanium base
JPWO2002033738A1 (ja) * 2000-10-16 2004-02-26 株式会社ルネサステクノロジ 半導体装置およびその製造方法
US6784065B1 (en) 2001-06-15 2004-08-31 National Semiconductor Corporation Bipolar transistor with ultra small self-aligned polysilicon emitter and method of forming the transistor
US7087979B1 (en) 2001-06-15 2006-08-08 National Semiconductor Corporation Bipolar transistor with an ultra small self-aligned polysilicon emitter
US6649482B1 (en) * 2001-06-15 2003-11-18 National Semiconductor Corporation Bipolar transistor with a silicon germanium base and an ultra small self-aligned polysilicon emitter and method of forming the transistor
DE10254663B4 (de) * 2002-11-22 2005-08-04 Austriamicrosystems Ag Transistor mit niederohmigem Basisanschluß und Verfahren zum Herstellen
US6960820B2 (en) * 2003-07-01 2005-11-01 International Business Machines Corporation Bipolar transistor self-alignment with raised extrinsic base extension and methods of forming same
US7002221B2 (en) * 2003-08-29 2006-02-21 International Business Machines Corporation Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
US20050114227A1 (en) * 2003-11-25 2005-05-26 Carter Craig M. Web-based tool for maximizing value from surplus assets
JP4349131B2 (ja) * 2004-01-09 2009-10-21 ソニー株式会社 バイポーラトランジスタの製造方法及び半導体装置の製造方法
EP2327089A1 (en) * 2008-08-19 2011-06-01 Nxp B.V. Gringo heterojunction bipolar transistor with a metal extrinsic base region
US8716096B2 (en) 2011-12-13 2014-05-06 International Business Machines Corporation Self-aligned emitter-base in advanced BiCMOS technology

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6453572A (en) * 1987-08-25 1989-03-01 Mitsubishi Electric Corp Semiconductor integrated circuit device with bipolar element
US4910164A (en) * 1988-07-27 1990-03-20 Texas Instruments Incorporated Method of making planarized heterostructures using selective epitaxial growth
JPH03227023A (ja) * 1990-01-31 1991-10-08 Nec Corp バイポーラ・トランジスタの製造方法
US5137840A (en) * 1990-10-24 1992-08-11 International Business Machines Corporation Vertical bipolar transistor with recessed epitaxially grown intrinsic base region
JPH05144834A (ja) * 1991-03-20 1993-06-11 Hitachi Ltd バイポーラトランジスタ及びその製造方法
JPH05315343A (ja) * 1992-05-12 1993-11-26 Fujitsu Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
EP0704907B1 (en) 2003-05-07
JPH0897227A (ja) 1996-04-12
US5648280A (en) 1997-07-15
DE69530648T2 (de) 2004-03-18
EP0704907A2 (en) 1996-04-03
EP0704907A3 (OSRAM) 1996-04-17
DE69530648D1 (de) 2003-06-12

Similar Documents

Publication Publication Date Title
JP2970425B2 (ja) バイポーラトランジスタの製造方法
JP2855908B2 (ja) 半導体装置及びその製造方法
JPH09115921A (ja) 半導体装置及びその製造方法
JP3249921B2 (ja) 硅素/硅素ゲルマニウム双極子トランジスタ製造方法
JP2002512452A (ja) 縦型バイポーラトランジスタ、特にSiGeヘテロ接合ベースを有するもの、および前記トランジスタの製造法
JP2924417B2 (ja) 半導体装置
JP2003515953A (ja) バイポーラトランジスタの製造方法およびバイポーラトランジスタを含む集積回路構造の製造方法
US6653714B2 (en) Lateral bipolar transistor
JPH0793385B2 (ja) バイポーラ型半導体装置およびその製造方法
JPWO2003026018A1 (ja) 半導体装置及びその製造方法
JP3168622B2 (ja) 半導体装置及びその製造方法
JP3408517B2 (ja) 半導体装置の製造方法
JP3488833B2 (ja) 電界効果トランジスタの形成方法
JP3233690B2 (ja) バイポーラトランジスタの製法
JPH05211158A (ja) 半導体装置およびその製造方法
JP2002016077A (ja) 半導体装置の製造方法及び半導体装置
JPS594073A (ja) 半導体装置の製造方法
JPH0136710B2 (OSRAM)
JP4213298B2 (ja) 半導体装置の製造方法
JPH06124956A (ja) 半導体装置の製造方法
JP3109579B2 (ja) 半導体装置の製造方法
JP3251649B2 (ja) 半導体装置の製造方法
JP3001340B2 (ja) バイポーラ集積回路の製造方法
JP3186289B2 (ja) 半導体装置の製造方法
JPH0786301A (ja) バイポーラトランジスタの製造方法

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20070827

Year of fee payment: 8

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080827

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080827

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20090827

Year of fee payment: 10

LAPS Cancellation because of no payment of annual fees