JP2016529702A - モノリシック３次元（３ｄ）集積回路（ｉｃ）（３ｄｉｃ）技術を使用した完全システムオンチップ（ｓｏｃ） - Google Patents

モノリシック３次元（３ｄ）集積回路（ｉｃ）（３ｄｉｃ）技術を使用した完全システムオンチップ（ｓｏｃ） Download PDF

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JP2016529702A
JP2016529702A JP2016527009A JP2016527009A JP2016529702A JP 2016529702 A JP2016529702 A JP 2016529702A JP 2016527009 A JP2016527009 A JP 2016527009A JP 2016527009 A JP2016527009 A JP 2016527009A JP 2016529702 A JP2016529702 A JP 2016529702A
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tiers
3dic
tier
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monolithic
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JP2016529702A5 (https=
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ドゥ、ヤン
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Qualcomm Inc
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Qualcomm Inc
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H10D88/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2016527009A 2013-07-16 2014-07-14 モノリシック３次元（３ｄ）集積回路（ｉｃ）（３ｄｉｃ）技術を使用した完全システムオンチップ（ｓｏｃ） Pending JP2016529702A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361846648P 2013-07-16 2013-07-16
US61/846,648 2013-07-16
US14/013,399 2013-08-29
US14/013,399 US9418985B2 (en) 2013-07-16 2013-08-29 Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology
PCT/US2014/046503 WO2015009614A1 (en) 2013-07-16 2014-07-14 Complete system-on-chip (soc) using monolithic three dimensional (3d) integrated circuit (ic) (3dic) technology

Publications (2)

Publication Number Publication Date
JP2016529702A true JP2016529702A (ja) 2016-09-23
JP2016529702A5 JP2016529702A5 (https=) 2016-11-17

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JP2016527009A Pending JP2016529702A (ja) 2013-07-16 2014-07-14 モノリシック３次元（３ｄ）集積回路（ｉｃ）（３ｄｉｃ）技術を使用した完全システムオンチップ（ｓｏｃ）

Country Status (9)

Country Link
US (2) US9418985B2 (https=)
EP (1) EP3022766A1 (https=)
JP (1) JP2016529702A (https=)
KR (1) KR101832330B1 (https=)
CN (1) CN105378918B (https=)
BR (1) BR112016000868B1 (https=)
CA (1) CA2917586C (https=)
TW (1) TWI618222B (https=)
WO (1) WO2015009614A1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019513985A (ja) * 2016-04-15 2019-05-30 コグニティヴ システムズ コーポレイション 反復無線送信に基づく動き検出

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9418985B2 (en) 2013-07-16 2016-08-16 Qualcomm Incorporated Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology
ES2798115T3 (es) * 2014-06-20 2020-12-09 Nagravision Sa Módulo de interfaz física
US9256246B1 (en) * 2015-01-29 2016-02-09 Qualcomm Incorporated Clock skew compensation with adaptive body biasing in three-dimensional (3D) integrated circuits (ICs) (3DICs)
US9628077B2 (en) 2015-03-04 2017-04-18 Qualcomm Incorporated Dual power swing pipeline design with separation of combinational and sequential logics
CN105391823B (zh) * 2015-11-25 2019-02-12 上海新储集成电路有限公司 一种降低移动设备尺寸和功耗的方法
CN105742277B (zh) * 2016-04-13 2018-06-22 中国航天科技集团公司第九研究院第七七一研究所 一种大容量立体集成sram存储器三维扩展方法
US9754923B1 (en) 2016-05-09 2017-09-05 Qualcomm Incorporated Power gate placement techniques in three-dimensional (3D) integrated circuits (ICs) (3DICs)
US9929149B2 (en) 2016-06-21 2018-03-27 Arm Limited Using inter-tier vias in integrated circuits
US9871020B1 (en) * 2016-07-14 2018-01-16 Globalfoundries Inc. Through silicon via sharing in a 3D integrated circuit
US10678985B2 (en) * 2016-08-31 2020-06-09 Arm Limited Method for generating three-dimensional integrated circuit design
US9712168B1 (en) * 2016-09-14 2017-07-18 Qualcomm Incorporated Process variation power control in three-dimensional (3D) integrated circuits (ICs) (3DICs)
US10176147B2 (en) * 2017-03-07 2019-01-08 Qualcomm Incorporated Multi-processor core three-dimensional (3D) integrated circuits (ICs) (3DICs), and related methods
US10727965B2 (en) * 2017-11-21 2020-07-28 Western Digital Technologies, Inc. System and method for time stamp synchronization
US10719100B2 (en) 2017-11-21 2020-07-21 Western Digital Technologies, Inc. System and method for time stamp synchronization
CN110069795A (zh) * 2018-01-23 2019-07-30 长芯半导体有限公司 快速定制芯片方法
GB2586049B (en) * 2019-07-31 2022-03-09 Murata Manufacturing Co Power supply output device
GB2586050B (en) * 2019-07-31 2021-11-10 Murata Manufacturing Co Power supply output device
US11270917B2 (en) * 2020-06-01 2022-03-08 Alibaba Group Holding Limited Scalable and flexible architectures for integrated circuit (IC) design and fabrication
CN112769402B (zh) * 2020-12-21 2024-05-17 中国航天科工集团八五一一研究所 基于TSV技术的X/Ku波段宽带变频组件
EP4024222A1 (en) 2021-01-04 2022-07-06 Imec VZW An integrated circuit with 3d partitioning
KR102443742B1 (ko) * 2021-02-08 2022-09-15 고려대학교 산학협력단 모놀리식 3d 집적 기술 기반 스크래치패드 메모리
US12308072B2 (en) * 2021-03-10 2025-05-20 Invention And Collaboration Laboratory Pte. Ltd. Integrated scaling and stretching platform for optimizing monolithic integration and/or heterogeneous integration in a single semiconductor die
US12230607B2 (en) * 2021-03-31 2025-02-18 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device including power management die in a stack and methods of forming the same
KR102896801B1 (ko) * 2022-02-23 2025-12-05 한국과학기술원 3차원 집적형 고주파 혼성 회로 구조체 및 그의 제조 방법
KR20240033841A (ko) 2022-09-06 2024-03-13 삼성전자주식회사 반도체 장치
WO2025117577A1 (en) * 2023-12-01 2025-06-05 The Penn State Research Foundation Monolithic three-dimensional (3d) integration of two dimensional (2d) field effect transistors (fets)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61131474A (ja) * 1984-11-30 1986-06-19 Agency Of Ind Science & Technol 積層型半導体装置
JP2004165269A (ja) * 2002-11-11 2004-06-10 Canon Inc 積層形半導体装置
JP2007529894A (ja) * 2004-03-16 2007-10-25 アーバー・カンパニー・リミテッド・ライアビリティ・パートナーシップ ダイ素子が積層された再構成可能なプロセッサモジュール
JP2012019018A (ja) * 2010-07-07 2012-01-26 Toshiba Corp 半導体装置及びその製造方法
JP2012216776A (ja) * 2011-03-31 2012-11-08 Sony Corp 半導体装置、および、その製造方法
WO2013075007A1 (en) * 2011-11-16 2013-05-23 Qualcomm Incorporated Stacked chipset having an insulating layer and a secondary layer and method of forming same
JP2013125917A (ja) * 2011-12-16 2013-06-24 Renesas Electronics Corp 半導体装置および半導体装置の製造方法

Family Cites Families (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6046078A (en) * 1997-04-28 2000-04-04 Megamos Corp. Semiconductor device fabrication with reduced masking steps
US20030015768A1 (en) 2001-07-23 2003-01-23 Motorola, Inc. Structure and method for microelectromechanical system (MEMS) devices integrated with other semiconductor structures
WO2003030252A2 (en) 2001-09-28 2003-04-10 Hrl Laboratories, Llc Process for producing interconnects
KR100569590B1 (ko) 2003-12-30 2006-04-10 매그나칩 반도체 유한회사 고주파 반도체 장치 및 그 제조방법
DE102006030267B4 (de) * 2006-06-30 2009-04-16 Advanced Micro Devices, Inc., Sunnyvale Nano-Einprägetechnik mit erhöhter Flexibilität in Bezug auf die Justierung und die Formung von Strukturelementen
US7692448B2 (en) 2007-09-12 2010-04-06 Neal Solomon Reprogrammable three dimensional field programmable gate arrays
US8136071B2 (en) 2007-09-12 2012-03-13 Neal Solomon Three dimensional integrated circuits and methods of fabrication
ATE512114T1 (de) * 2008-09-03 2011-06-15 St Microelectronics Tours Sas Dreidimensionale struktur mit sehr hoher dichte
US20110199116A1 (en) 2010-02-16 2011-08-18 NuPGA Corporation Method for fabrication of a semiconductor device and structure
US7986042B2 (en) * 2009-04-14 2011-07-26 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
US8115511B2 (en) * 2009-04-14 2012-02-14 Monolithic 3D Inc. Method for fabrication of a semiconductor device and structure
US8466610B2 (en) * 2009-05-14 2013-06-18 Sri International Low cost high efficiency transparent organic electrodes for organic optoelectronic devices
TWI501380B (zh) * 2010-01-29 2015-09-21 財團法人國家實驗研究院國家晶片系統設計中心 多基板晶片模組堆疊之三維系統晶片結構
US8450779B2 (en) 2010-03-08 2013-05-28 International Business Machines Corporation Graphene based three-dimensional integrated circuit device
CN102024782B (zh) * 2010-10-12 2012-07-25 北京大学 三维垂直互联结构及其制作方法
EP2469597A3 (en) 2010-12-23 2016-06-29 Commissariat à l'Énergie Atomique et aux Énergies Alternatives Multi-level integrated circuit, device and method for modeling multi-level integrated circuits
US8384215B2 (en) * 2010-12-30 2013-02-26 Industrial Technology Research Institute Wafer level molding structure
DE102011004581A1 (de) * 2011-02-23 2012-08-23 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Technik zur Reduzierung der plasmahervorgerufenen Ätzschäden während der Herstellung von Kontaktdurchführungen in Zwischenschichtdielektrika durch modifizierten HF-Leistungshochlauf
US8975670B2 (en) 2011-03-06 2015-03-10 Monolithic 3D Inc. Semiconductor device and structure for heat removal
WO2013052679A1 (en) 2011-10-04 2013-04-11 Qualcomm Incorporated Monolithic 3-d integration using graphene
JP2013215917A (ja) 2012-04-05 2013-10-24 Seiko Epson Corp 印刷装置、及び、印刷方法
CN103545275B (zh) * 2012-07-12 2016-02-17 中芯国际集成电路制造(上海)有限公司 硅通孔封装结构及形成方法
US8889491B2 (en) * 2013-01-28 2014-11-18 International Business Machines Corporation Method of forming electronic fuse line with modified cap
KR20140113024A (ko) * 2013-03-15 2014-09-24 에스케이하이닉스 주식회사 저항 변화 메모리 장치 및 그 구동방법
US9171608B2 (en) * 2013-03-15 2015-10-27 Qualcomm Incorporated Three-dimensional (3D) memory cell separation among 3D integrated circuit (IC) tiers, and related 3D integrated circuits (3DICS), 3DIC processor cores, and methods
US9418985B2 (en) 2013-07-16 2016-08-16 Qualcomm Incorporated Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology
US9070711B2 (en) * 2013-08-02 2015-06-30 Globalfoundries Inc. Methods of forming cap layers for semiconductor devices with self-aligned contact elements and the resulting devices

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61131474A (ja) * 1984-11-30 1986-06-19 Agency Of Ind Science & Technol 積層型半導体装置
JP2004165269A (ja) * 2002-11-11 2004-06-10 Canon Inc 積層形半導体装置
JP2007529894A (ja) * 2004-03-16 2007-10-25 アーバー・カンパニー・リミテッド・ライアビリティ・パートナーシップ ダイ素子が積層された再構成可能なプロセッサモジュール
JP2012019018A (ja) * 2010-07-07 2012-01-26 Toshiba Corp 半導体装置及びその製造方法
JP2012216776A (ja) * 2011-03-31 2012-11-08 Sony Corp 半導体装置、および、その製造方法
WO2013075007A1 (en) * 2011-11-16 2013-05-23 Qualcomm Incorporated Stacked chipset having an insulating layer and a secondary layer and method of forming same
JP2013125917A (ja) * 2011-12-16 2013-06-24 Renesas Electronics Corp 半導体装置および半導体装置の製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019513985A (ja) * 2016-04-15 2019-05-30 コグニティヴ システムズ コーポレイション 反復無線送信に基づく動き検出

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EP3022766A1 (en) 2016-05-25
CN105378918A (zh) 2016-03-02
CA2917586C (en) 2019-02-12
US20150022262A1 (en) 2015-01-22
TWI618222B (zh) 2018-03-11
KR101832330B1 (ko) 2018-02-26
WO2015009614A1 (en) 2015-01-22
CN105378918B (zh) 2018-05-04
US9418985B2 (en) 2016-08-16
TW201513299A (zh) 2015-04-01
BR112016000868A2 (https=) 2017-07-25
CA2917586A1 (en) 2015-01-22
BR112016000868B1 (pt) 2022-08-16
KR20160032182A (ko) 2016-03-23
US20160351553A1 (en) 2016-12-01
US9583473B2 (en) 2017-02-28

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