KR101832330B1 - 모놀리식 삼차원(3d) 집적 회로(ic)(3dic) 기술을 사용한 완전한 시스템-온-칩(soc) - Google Patents

모놀리식 삼차원(3d) 집적 회로(ic)(3dic) 기술을 사용한 완전한 시스템-온-칩(soc) Download PDF

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KR101832330B1
KR101832330B1 KR1020167003723A KR20167003723A KR101832330B1 KR 101832330 B1 KR101832330 B1 KR 101832330B1 KR 1020167003723 A KR1020167003723 A KR 1020167003723A KR 20167003723 A KR20167003723 A KR 20167003723A KR 101832330 B1 KR101832330 B1 KR 101832330B1
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3dic
tiers
monolithic
integrated circuit
dimensional
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KR20160032182A (ko
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양 두
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퀄컴 인코포레이티드
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    • H01L27/0688—
    • H01L21/77—
    • H01L21/8221—
    • H01L23/481—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H10D88/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H01L2224/16145—
    • H01L2224/16225—
    • H01L2224/48091—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/297—Configurations of stacked chips characterised by the through-semiconductor vias [TSVs] in the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
KR1020167003723A 2013-07-16 2014-07-14 모놀리식 삼차원(3d) 집적 회로(ic)(3dic) 기술을 사용한 완전한 시스템-온-칩(soc) Expired - Fee Related KR101832330B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361846648P 2013-07-16 2013-07-16
US61/846,648 2013-07-16
US14/013,399 2013-08-29
US14/013,399 US9418985B2 (en) 2013-07-16 2013-08-29 Complete system-on-chip (SOC) using monolithic three dimensional (3D) integrated circuit (IC) (3DIC) technology
PCT/US2014/046503 WO2015009614A1 (en) 2013-07-16 2014-07-14 Complete system-on-chip (soc) using monolithic three dimensional (3d) integrated circuit (ic) (3dic) technology

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KR20160032182A KR20160032182A (ko) 2016-03-23
KR101832330B1 true KR101832330B1 (ko) 2018-02-26

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US (2) US9418985B2 (https=)
EP (1) EP3022766A1 (https=)
JP (1) JP2016529702A (https=)
KR (1) KR101832330B1 (https=)
CN (1) CN105378918B (https=)
BR (1) BR112016000868B1 (https=)
CA (1) CA2917586C (https=)
TW (1) TWI618222B (https=)
WO (1) WO2015009614A1 (https=)

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CN112769402B (zh) * 2020-12-21 2024-05-17 中国航天科工集团八五一一研究所 基于TSV技术的X/Ku波段宽带变频组件
EP4024222A1 (en) 2021-01-04 2022-07-06 Imec VZW An integrated circuit with 3d partitioning
KR102443742B1 (ko) * 2021-02-08 2022-09-15 고려대학교 산학협력단 모놀리식 3d 집적 기술 기반 스크래치패드 메모리
US12308072B2 (en) * 2021-03-10 2025-05-20 Invention And Collaboration Laboratory Pte. Ltd. Integrated scaling and stretching platform for optimizing monolithic integration and/or heterogeneous integration in a single semiconductor die
US12230607B2 (en) * 2021-03-31 2025-02-18 Taiwan Semiconductor Manufacturing Company Limited Semiconductor device including power management die in a stack and methods of forming the same
KR102896801B1 (ko) * 2022-02-23 2025-12-05 한국과학기술원 3차원 집적형 고주파 혼성 회로 구조체 및 그의 제조 방법
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WO2025117577A1 (en) * 2023-12-01 2025-06-05 The Penn State Research Foundation Monolithic three-dimensional (3d) integration of two dimensional (2d) field effect transistors (fets)

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EP3022766A1 (en) 2016-05-25
CN105378918A (zh) 2016-03-02
CA2917586C (en) 2019-02-12
US20150022262A1 (en) 2015-01-22
TWI618222B (zh) 2018-03-11
JP2016529702A (ja) 2016-09-23
WO2015009614A1 (en) 2015-01-22
CN105378918B (zh) 2018-05-04
US9418985B2 (en) 2016-08-16
TW201513299A (zh) 2015-04-01
BR112016000868A2 (https=) 2017-07-25
CA2917586A1 (en) 2015-01-22
BR112016000868B1 (pt) 2022-08-16
KR20160032182A (ko) 2016-03-23
US20160351553A1 (en) 2016-12-01
US9583473B2 (en) 2017-02-28

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P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000