JP2016021628A5 - - Google Patents

Download PDF

Info

Publication number
JP2016021628A5
JP2016021628A5 JP2014144119A JP2014144119A JP2016021628A5 JP 2016021628 A5 JP2016021628 A5 JP 2016021628A5 JP 2014144119 A JP2014144119 A JP 2014144119A JP 2014144119 A JP2014144119 A JP 2014144119A JP 2016021628 A5 JP2016021628 A5 JP 2016021628A5
Authority
JP
Japan
Prior art keywords
frequency
circuit
phase
locked loop
loop circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2014144119A
Other languages
English (en)
Japanese (ja)
Other versions
JP6430738B2 (ja
JP2016021628A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2014144119A priority Critical patent/JP6430738B2/ja
Priority claimed from JP2014144119A external-priority patent/JP6430738B2/ja
Priority to US14/795,494 priority patent/US9413517B2/en
Priority to CN201510410326.6A priority patent/CN105262483B/zh
Publication of JP2016021628A publication Critical patent/JP2016021628A/ja
Publication of JP2016021628A5 publication Critical patent/JP2016021628A5/ja
Application granted granted Critical
Publication of JP6430738B2 publication Critical patent/JP6430738B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2014144119A 2014-07-14 2014-07-14 Ｃｄｒ回路及び半導体装置 Active JP6430738B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2014144119A JP6430738B2 (ja) 2014-07-14 2014-07-14 Ｃｄｒ回路及び半導体装置
US14/795,494 US9413517B2 (en) 2014-07-14 2015-07-09 CDR circuit and semiconductor device
CN201510410326.6A CN105262483B (zh) 2014-07-14 2015-07-14 Cdr电路和半导体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014144119A JP6430738B2 (ja) 2014-07-14 2014-07-14 Ｃｄｒ回路及び半導体装置

Publications (3)

Publication Number Publication Date
JP2016021628A JP2016021628A (ja) 2016-02-04
JP2016021628A5 true JP2016021628A5 (enExample) 2017-08-24
JP6430738B2 JP6430738B2 (ja) 2018-11-28

Family

ID=55068387

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014144119A Active JP6430738B2 (ja) 2014-07-14 2014-07-14 Ｃｄｒ回路及び半導体装置

Country Status (3)

Country Link
US (1) US9413517B2 (enExample)
JP (1) JP6430738B2 (enExample)
CN (1) CN105262483B (enExample)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016021629A (ja) * 2014-07-14 2016-02-04 シナプティクス・ディスプレイ・デバイス合同会社 Ｃｄｒ回路及び半導体装置
JP6536347B2 (ja) * 2015-10-20 2019-07-03 富士通株式会社 周波数検出方法
US9843439B2 (en) * 2016-01-27 2017-12-12 Ciena Corporation System and method for managing holdover
US10348414B2 (en) * 2016-06-30 2019-07-09 Avago Technologies International Sales Pte. Limited Clock-and-data recovery (CDR) circuitry for performing automatic rate negotiation
KR102480913B1 (ko) 2016-07-11 2022-12-26 삼성전자주식회사 데이터를 전송하기 위한 방법 및 그 전자 장치
CN107800427B (zh) * 2016-09-05 2021-04-06 创意电子股份有限公司 时脉数据回复模块
CN106712768A (zh) * 2016-12-12 2017-05-24 深圳市紫光同创电子有限公司 一种去毛刺频率锁定电路
KR102633143B1 (ko) * 2016-12-23 2024-02-02 삼성전자주식회사 무선 채널 분류를 기초로 디지털 루프 필터 이득을 조절하는 자동 주파수 제어기, 상기 자동 주파수 제어기를 포함하는 무선 통신 장치, 자동 주파수 제어 방법 및 무선 통신 방법
CN107682007B (zh) * 2017-09-22 2021-01-15 哈尔滨工业大学 基于双环路的快锁定低抖动的时钟数据恢复电路
CN107911113B (zh) * 2017-10-31 2021-01-12 北京集创北方科技股份有限公司 时钟数据恢复电路及其环路带宽调节方法、处理器
CN108199710B (zh) * 2017-12-25 2021-06-29 深圳市紫光同创电子有限公司 一种振荡器校正电路及振荡器校正方法
US11349485B2 (en) * 2019-01-28 2022-05-31 Mediatek Inc. Clock and data recovery and associated signal processing method
CN111435827B (zh) * 2020-01-14 2023-11-28 珠海市杰理科技股份有限公司 一种快速起振电路、方法、晶体振荡器以及集成芯片
CN113141179B (zh) * 2020-01-16 2025-05-27 联发科技股份有限公司 时钟和数据恢复电路及其信号处理方法
US11038602B1 (en) 2020-02-05 2021-06-15 Credo Technology Group Limited On-chip jitter evaluation for SerDes
US10992501B1 (en) 2020-03-31 2021-04-27 Credo Technology Group Limited Eye monitor for parallelized digital equalizers
KR102817517B1 (ko) * 2020-04-20 2025-06-10 주식회사 엘엑스세미콘 데이터구동장치 및 이의 구동 방법
US10892763B1 (en) * 2020-05-14 2021-01-12 Credo Technology Group Limited Second-order clock recovery using three feedback paths
US12003245B2 (en) * 2021-11-23 2024-06-04 Mediatek Inc. Clock and data recovery circuit with spread spectrum clocking synthesizer
US11855648B2 (en) 2022-01-14 2023-12-26 Samsung Display Co., Ltd. Clock pattern detection and correction
CN115985221B (zh) * 2023-03-21 2023-07-21 深圳通锐微电子技术有限公司 源极驱动器、频宽调整方法和显示面板

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62253224A (ja) * 1986-01-14 1987-11-05 Toshiba Corp 位相同期回路
JPH01293718A (ja) * 1988-05-20 1989-11-27 Hitachi Ltd 位相同期回路
JPH08331118A (ja) * 1995-06-02 1996-12-13 Yupiteru Ind Co Ltd デジタル無線電話装置の基準クロック再生方法及び装置
JP2000243042A (ja) * 1999-02-19 2000-09-08 Matsushita Electric Ind Co Ltd クロックリカバリ装置
JP2002198805A (ja) * 2000-12-22 2002-07-12 Asahi Kasei Microsystems Kk Ｐｌｌ回路
US6753711B2 (en) * 2002-06-26 2004-06-22 Comtech Ef Data Digital summing phase-lock loop circuit with sideband control and method therefor
NZ524537A (en) * 2003-03-04 2005-08-26 Tait Electronics Ltd Improvements relating to frequency and/or phase lock loops
US6803827B1 (en) * 2003-04-09 2004-10-12 Analog Devices, Inc. Frequency acquisition system
JP2005006187A (ja) * 2003-06-13 2005-01-06 Renesas Technology Corp Ｐｌｌ回路
JP3939715B2 (ja) * 2004-08-20 2007-07-04 日本テキサス・インスツルメンツ株式会社 位相同期ループ回路
JP4106069B2 (ja) * 2004-08-27 2008-06-25 松下電器産業株式会社 Ｐｌｌ周波数シンセサイザ
US7932784B1 (en) * 2005-03-17 2011-04-26 Rf Micro Devices, Inc. Frequency and phase locked loop synthesizer
TWI346460B (en) * 2006-10-31 2011-08-01 Realtek Semiconductor Corp A clock and data recovery circuit and a method for adjusting loop bandwidth used thereby
US20090108891A1 (en) * 2007-10-26 2009-04-30 Matsushita Electric Industrial Co., Ltd. Bandwidth control in a mostly-digital pll/fll
JP2012044446A (ja) 2010-08-19 2012-03-01 Renesas Electronics Corp クロックデータリカバリ回路
JP2012049863A (ja) * 2010-08-27 2012-03-08 Renesas Electronics Corp 半導体装置
JP2013005144A (ja) * 2011-06-15 2013-01-07 Renesas Electronics Corp シリアル−パラレル変換回路、クロックデータリカバリ回路、表示装置用駆動回路及びシリアル−パラレル変換方法
CN102820886B (zh) * 2012-08-10 2015-02-11 硅谷数模半导体（北京）有限公司 信号检测方法、装置和具有该装置的pll和cdr系统

Similar Documents

Publication Publication Date Title
JP2016021628A5 (enExample)
US9413517B2 (en) CDR circuit and semiconductor device
US9814106B2 (en) Backlight driver chip incorporating a phase lock loop (PLL) with programmable offset/delay and seamless operation
US8994423B2 (en) Phase-locked loop apparatus and method
EP2903162A3 (en) A MDLL/PLL hybrid design with uniformly distributed output phases
CN104796140B8 (zh) 数字锁相环dpll、控制dpll的方法和使用dpll的超低功率收发器
US9490788B2 (en) Semiconductor device
US9287883B2 (en) Multi-lane re-timer circuit and multi-lane reception system
JP2017517077A5 (enExample)
JP2007538468A5 (enExample)
RU2011103161A (ru) Электронная схема, электронное устройство и способ цифровой обработки сигналов
WO2011153096A3 (en) Methods and apparatuses for delay-locked loops and phase-locked loops
JP2012208342A5 (enExample)
EP4604399A3 (en) Method and apparatus for clock phase generation
JP2015508262A5 (enExample)
US9240794B2 (en) Apparatus and methods for phase-locked loop startup operation
Li et al. State feedback controller design for the synchronization of Boolean networks with time delays
JP2007243877A5 (enExample)
JP2012114736A5 (enExample)
US9847785B2 (en) Phase locked loop circuit and method of frequency adjustment of injection locked frequency divider
TW201703439A (zh) 無突波之數位控制振盪器碼更新技術
JP2012005124A (ja) 位相固定ループ及びその動作方法
US9571080B2 (en) Delay-locked loop arrangement and method for operating a delay-locked loop circuit
MX2017007101A (es) Bucle digital bloqueado por fase con una fase desacoplada y compensacion de frecuencia.
US9363069B2 (en) Clock generating device and related synchronization method