JP2015527733A5 - - Google Patents

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Publication number
JP2015527733A5
JP2015527733A5 JP2015521717A JP2015521717A JP2015527733A5 JP 2015527733 A5 JP2015527733 A5 JP 2015527733A5 JP 2015521717 A JP2015521717 A JP 2015521717A JP 2015521717 A JP2015521717 A JP 2015521717A JP 2015527733 A5 JP2015527733 A5 JP 2015527733A5
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JP
Japan
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layer
sti
semiconductor device
pad
ild
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JP2015521717A
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English (en)
Japanese (ja)
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JP6049877B2 (ja
JP2015527733A (ja
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Priority claimed from US13/790,625 external-priority patent/US9219032B2/en
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Publication of JP2015527733A publication Critical patent/JP2015527733A/ja
Publication of JP2015527733A5 publication Critical patent/JP2015527733A5/ja
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Publication of JP6049877B2 publication Critical patent/JP6049877B2/ja
Expired - Fee Related legal-status Critical Current
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JP2015521717A 2012-07-09 2013-07-09 集積回路のウェハ裏面の層からの基板貫通ビアの統合 Expired - Fee Related JP6049877B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201261669611P 2012-07-09 2012-07-09
US61/669,611 2012-07-09
US13/790,625 2013-03-08
US13/790,625 US9219032B2 (en) 2012-07-09 2013-03-08 Integrating through substrate vias from wafer backside layers of integrated circuits
PCT/US2013/049686 WO2014011615A1 (en) 2012-07-09 2013-07-09 Integrating through substrate vias from wafer backside layers of integrated circuits

Publications (3)

Publication Number Publication Date
JP2015527733A JP2015527733A (ja) 2015-09-17
JP2015527733A5 true JP2015527733A5 (enExample) 2016-04-28
JP6049877B2 JP6049877B2 (ja) 2016-12-21

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015521717A Expired - Fee Related JP6049877B2 (ja) 2012-07-09 2013-07-09 集積回路のウェハ裏面の層からの基板貫通ビアの統合

Country Status (7)

Country Link
US (1) US9219032B2 (enExample)
EP (1) EP2870628A1 (enExample)
JP (1) JP6049877B2 (enExample)
KR (1) KR101654794B1 (enExample)
CN (1) CN104428887B (enExample)
TW (1) TWI575652B (enExample)
WO (1) WO2014011615A1 (enExample)

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US11508619B2 (en) 2018-01-26 2022-11-22 Agency For Science, Technology And Research Electrical connection structure and method of forming the same
WO2019195428A1 (en) 2018-04-04 2019-10-10 Qorvo Us, Inc. Gallium-nitride-based module with enhanced electrical performance and process for making the same
US12046505B2 (en) 2018-04-20 2024-07-23 Qorvo Us, Inc. RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation
CN118213279A (zh) 2018-07-02 2024-06-18 Qorvo美国公司 Rf半导体装置及其制造方法
KR102521658B1 (ko) 2018-09-03 2023-04-13 삼성전자주식회사 반도체 칩 및 이의 제조 방법
KR102576062B1 (ko) 2018-11-07 2023-09-07 삼성전자주식회사 관통 실리콘 비아를 포함하는 반도체 소자 및 그 제조 방법
US11646242B2 (en) 2018-11-29 2023-05-09 Qorvo Us, Inc. Thermally enhanced semiconductor package with at least one heat extractor and process for making the same
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US11217547B2 (en) 2019-09-03 2022-01-04 Taiwan Semiconductor Manufacturing Company, Ltd. Bond pad structure with reduced step height and increased electrical isolation
US12074086B2 (en) 2019-11-01 2024-08-27 Qorvo Us, Inc. RF devices with nanotube particles for enhanced performance and methods of forming the same
US11923238B2 (en) 2019-12-12 2024-03-05 Qorvo Us, Inc. Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive
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CN111508929B (zh) * 2020-04-17 2022-02-22 北京北方华创微电子装备有限公司 图形片及半导体中间产物
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