JP2015505643A5 - - Google Patents

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Publication number
JP2015505643A5
JP2015505643A5 JP2014553540A JP2014553540A JP2015505643A5 JP 2015505643 A5 JP2015505643 A5 JP 2015505643A5 JP 2014553540 A JP2014553540 A JP 2014553540A JP 2014553540 A JP2014553540 A JP 2014553540A JP 2015505643 A5 JP2015505643 A5 JP 2015505643A5
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JP
Japan
Prior art keywords
layer
magnetic
magnetic layer
islands
stt
Prior art date
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Pending
Application number
JP2014553540A
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English (en)
Japanese (ja)
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JP2015505643A (ja
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Publication date
Priority claimed from US13/356,530 external-priority patent/US20130187247A1/en
Application filed filed Critical
Publication of JP2015505643A publication Critical patent/JP2015505643A/ja
Publication of JP2015505643A5 publication Critical patent/JP2015505643A5/ja
Pending legal-status Critical Current

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JP2014553540A 2012-01-23 2013-01-23 マルチビット磁気トンネル接合メモリおよびそれを形成する方法 Pending JP2015505643A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/356,530 2012-01-23
US13/356,530 US20130187247A1 (en) 2012-01-23 2012-01-23 Multi-bit magnetic tunnel junction memory and method of forming same
PCT/US2013/022789 WO2013112615A1 (en) 2012-01-23 2013-01-23 Multi-bit magnetic tunnel junction memory and method of forming same

Publications (2)

Publication Number Publication Date
JP2015505643A JP2015505643A (ja) 2015-02-23
JP2015505643A5 true JP2015505643A5 (enExample) 2016-02-18

Family

ID=47750028

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014553540A Pending JP2015505643A (ja) 2012-01-23 2013-01-23 マルチビット磁気トンネル接合メモリおよびそれを形成する方法

Country Status (7)

Country Link
US (1) US20130187247A1 (enExample)
EP (1) EP2807648B1 (enExample)
JP (1) JP2015505643A (enExample)
KR (1) KR20140120920A (enExample)
CN (1) CN104067344A (enExample)
TW (1) TWI524340B (enExample)
WO (1) WO2013112615A1 (enExample)

Families Citing this family (16)

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Publication number Priority date Publication date Assignee Title
US8625337B2 (en) 2010-05-06 2014-01-07 Qualcomm Incorporated Method and apparatus of probabilistic programming multi-level memory in cluster states of bi-stable elements
US8711612B1 (en) * 2010-12-03 2014-04-29 Magsil Corporation Memory circuit and method of forming the same using reduced mask steps
US9064589B2 (en) * 2011-11-09 2015-06-23 Qualcomm Incorporated Three port MTJ structure and integration
US10096767B2 (en) * 2013-03-09 2018-10-09 Taiwan Semiconductor Manufacturing Company, Ltd. Elongated magnetoresistive tunnel junction structure
US9240547B2 (en) * 2013-09-10 2016-01-19 Micron Technology, Inc. Magnetic tunnel junctions and methods of forming magnetic tunnel junctions
JP6484940B2 (ja) * 2014-07-15 2019-03-20 株式会社リコー 磁気抵抗素子、磁気センサ及び電流センサ
US9502642B2 (en) 2015-04-10 2016-11-22 Micron Technology, Inc. Magnetic tunnel junctions, methods used while forming magnetic tunnel junctions, and methods of forming magnetic tunnel junctions
US9960346B2 (en) 2015-05-07 2018-05-01 Micron Technology, Inc. Magnetic tunnel junctions
US9680089B1 (en) 2016-05-13 2017-06-13 Micron Technology, Inc. Magnetic tunnel junctions
US9979401B2 (en) * 2016-07-19 2018-05-22 Georgia Tech Research Corporation Magnetoelectric computational devices
CN108666339B (zh) * 2017-03-28 2020-11-13 中芯国际集成电路制造(上海)有限公司 磁性随机存储器及其存储单元的制造方法
WO2019005076A1 (en) * 2017-06-29 2019-01-03 Intel Corporation MAGNETIC JUNCTION DEVICES WITH TUNNEL EFFECT COMPRISING A CARBON-DOPED MAGNET LAYER
EP3506359A1 (en) 2017-12-29 2019-07-03 IMEC vzw Memory device with magnetic tunnel junctions and method for manufacturing thereof
US11069853B2 (en) * 2018-11-19 2021-07-20 Applied Materials, Inc. Methods for forming structures for MRAM applications
US11711995B2 (en) 2020-10-09 2023-08-01 Deere & Company Machine control using a predictive map
CN118510374A (zh) * 2023-02-14 2024-08-16 中国科学院物理研究所 磁子结、磁子随机存储器、微波振荡和探测器、电子设备

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4389423B2 (ja) * 2001-12-21 2009-12-24 ソニー株式会社 磁気抵抗効果素子およびその製造方法並びに磁気メモリ装置
JP2006196613A (ja) * 2005-01-12 2006-07-27 Sony Corp 記憶素子及びその製造方法、メモリ
JP4693450B2 (ja) * 2005-03-22 2011-06-01 株式会社東芝 磁気抵抗効果素子および磁気メモリ
JP4504273B2 (ja) * 2005-07-06 2010-07-14 株式会社東芝 磁気抵抗効果素子および磁気メモリ
JP2007027575A (ja) * 2005-07-20 2007-02-01 Toshiba Corp 磁気抵抗効果素子および磁気メモリ
JP2007266498A (ja) * 2006-03-29 2007-10-11 Toshiba Corp 磁気記録素子及び磁気メモリ
US7652915B2 (en) * 2006-12-19 2010-01-26 Hitachi Global Storage Technologies Netherlands B.V. High density spin torque three dimensional (3D) memory arrays addressed with microwave current
US7579197B1 (en) * 2008-03-04 2009-08-25 Qualcomm Incorporated Method of forming a magnetic tunnel junction structure
US7885105B2 (en) * 2008-03-25 2011-02-08 Qualcomm Incorporated Magnetic tunnel junction cell including multiple vertical magnetic domains
US7893511B2 (en) * 2008-07-17 2011-02-22 Qimonda Ag Integrated circuit, memory module, and method of manufacturing an integrated circuit
US8295082B2 (en) * 2008-08-15 2012-10-23 Qualcomm Incorporated Gate level reconfigurable magnetic logic
WO2010080542A1 (en) * 2008-12-17 2010-07-15 Yadav Technology, Inc. Spin-transfer torque magnetic random access memory having magnetic tunnel junction with perpendicular magnetic anisotropy
US8422285B2 (en) * 2009-10-30 2013-04-16 Grandis, Inc. Method and system for providing dual magnetic tunneling junctions usable in spin transfer torque magnetic memories
JP5087067B2 (ja) * 2009-12-03 2012-11-28 株式会社東芝 磁気抵抗効果素子および磁気メモリ
US8625337B2 (en) * 2010-05-06 2014-01-07 Qualcomm Incorporated Method and apparatus of probabilistic programming multi-level memory in cluster states of bi-stable elements
US8878318B2 (en) * 2011-09-24 2014-11-04 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and method for a MRAM device with an oxygen absorbing cap layer

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