JP2014160839A5 - - Google Patents

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Publication number
JP2014160839A5
JP2014160839A5 JP2014077077A JP2014077077A JP2014160839A5 JP 2014160839 A5 JP2014160839 A5 JP 2014160839A5 JP 2014077077 A JP2014077077 A JP 2014077077A JP 2014077077 A JP2014077077 A JP 2014077077A JP 2014160839 A5 JP2014160839 A5 JP 2014160839A5
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JP
Japan
Prior art keywords
electrode
layer
depositing
mask
mtj
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Withdrawn
Application number
JP2014077077A
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English (en)
Japanese (ja)
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JP2014160839A (ja
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Priority claimed from US12/405,461 external-priority patent/US8125040B2/en
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Publication of JP2014160839A publication Critical patent/JP2014160839A/ja
Publication of JP2014160839A5 publication Critical patent/JP2014160839A5/ja
Withdrawn legal-status Critical Current

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JP2014077077A 2008-04-18 2014-04-03 ２つのマスクを用いる磁気トンネル接合素子の製造方法 Withdrawn JP2014160839A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US4616708P 2008-04-18 2008-04-18
US61/046,167 2008-04-18
US12/405,461 2009-03-17
US12/405,461 US8125040B2 (en) 2008-04-18 2009-03-17 Two mask MTJ integration for STT MRAM

Related Parent Applications (1)

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JP2011505157A Division JP2011518440A (ja) 2008-04-18 2009-04-15 ２つのマスクを用いる磁気トンネル接合素子の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2015029705A Division JP2015144287A (ja) 2008-04-18 2015-02-18 ２つのマスクを用いる磁気トンネル接合素子の製造方法

Publications (2)

Publication Number Publication Date
JP2014160839A JP2014160839A (ja) 2014-09-04
JP2014160839A5 true JP2014160839A5 (enExample) 2014-12-11

Family

ID=40791514

Family Applications (3)

Application Number Title Priority Date Filing Date
JP2011505157A Withdrawn JP2011518440A (ja) 2008-04-18 2009-04-15 ２つのマスクを用いる磁気トンネル接合素子の製造方法
JP2014077077A Withdrawn JP2014160839A (ja) 2008-04-18 2014-04-03 ２つのマスクを用いる磁気トンネル接合素子の製造方法
JP2015029705A Pending JP2015144287A (ja) 2008-04-18 2015-02-18 ２つのマスクを用いる磁気トンネル接合素子の製造方法

Family Applications Before (1)

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JP2011505157A Withdrawn JP2011518440A (ja) 2008-04-18 2009-04-15 ２つのマスクを用いる磁気トンネル接合素子の製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2015029705A Pending JP2015144287A (ja) 2008-04-18 2015-02-18 ２つのマスクを用いる磁気トンネル接合素子の製造方法

Country Status (7)

Country Link
US (1) US8125040B2 (enExample)
EP (2) EP2800159A1 (enExample)
JP (3) JP2011518440A (enExample)
KR (1) KR101200008B1 (enExample)
CN (1) CN102007614B (enExample)
TW (1) TW201007730A (enExample)
WO (1) WO2009129283A1 (enExample)

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US9905751B2 (en) 2015-10-20 2018-02-27 Taiwan Semiconductor Manufacturing Company, Ltd. Magnetic tunnel junction with reduced damage
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US9853210B2 (en) * 2015-11-17 2017-12-26 International Business Machines Corporation Reduced process degradation of spin torque magnetoresistive random access memory
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US9805795B2 (en) 2016-01-08 2017-10-31 Samsung Electronics Co., Ltd. Zero leakage, high noise margin coupled giant spin hall based retention latch
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US10522749B2 (en) 2017-05-15 2019-12-31 Taiwan Semiconductor Manufacturing Company, Ltd. Combined physical and chemical etch to reduce magnetic tunnel junction (MTJ) sidewall damage
US10043851B1 (en) 2017-08-03 2018-08-07 Headway Technologies, Inc. Etch selectivity by introducing oxidants to noble gas during physical magnetic tunnel junction (MTJ) etching
US10359699B2 (en) 2017-08-24 2019-07-23 Taiwan Semiconductor Manufacturing Company, Ltd. Self-adaptive halogen treatment to improve photoresist pattern and magnetoresistive random access memory (MRAM) device uniformity
US10585630B2 (en) 2017-09-11 2020-03-10 Samsung Electronics Co., Ltd. Selectorless 3D stackable memory
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US10879077B2 (en) 2017-10-30 2020-12-29 Taiwan Semiconductor Manufacturing Company Ltd. Planarization apparatus and planarization method thereof
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