JP2014044983A - 端子構造、並びにこれを備える半導体素子及びモジュール基板 - Google Patents
端子構造、並びにこれを備える半導体素子及びモジュール基板 Download PDFInfo
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- JP2014044983A JP2014044983A JP2012184990A JP2012184990A JP2014044983A JP 2014044983 A JP2014044983 A JP 2014044983A JP 2012184990 A JP2012184990 A JP 2012184990A JP 2012184990 A JP2012184990 A JP 2012184990A JP 2014044983 A JP2014044983 A JP 2014044983A
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- bump
- layer
- opening
- insulating coating
- terminal structure
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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Abstract
【解決手段】好適な端子構造は、基材と、基材上に形成された電極と、基材上及び電極上に形成され、電極の少なくとも一部を露出させる開口を有する絶縁性被覆層と、電極上の開口内の領域に、上面が絶縁性被覆層における開口の周縁部よりも低い位置となるように形成された、Niを含むアンダーバンプ金属層と、アンダーバンプ金属層上の開口内の領域に形成された、Sn及びTiを含むドーム状のバンプとを備え、アンダーバンプ金属層とバンプとの境界の端部と、絶縁性被覆層における開口部分の内壁とが接している。
【選択図】図2
Description
まず、好適な実施形態に係る端子構造について説明する。図2は、好適な実施形態に係る端子構造の断面構成を模式的に示す図である。
次に、上述した構成を有する端子構造の製造方法の好適な実施形態について説明する。
上述したような構成を有する端子構造1は、半導体素子等に好適に適用することができる。例えば、半導体素子の場合、基材10としては、シリコン基板等の表面ないしは内部に半導体回路が形成されたものを適用することができる。また、外部電極20としては、半導体回路と電気的に接続されたものを適用することができる。このような半導体素子であれば、隣接するバンプ間隔を狭くすることができることから、半導体デバイスの微細化に対する要求に十分に対応することが可能である。
また、上述したような構成を有する端子構造1は、半導体素子等を搭載するモジュール基板等にも好適に適用することができる。例えば、モジュール基板の場合、基材10としては、有機基板等の表面ないしは内部に配線回路が形成されたものを適用することができる。また、外部電極20としては、配線回路と電気的に接続されたものを適用することができる。このようなモジュール基板であれば、隣接するバンプ間隔を狭くすることができることから、電子デバイスの微細化に対する要求に十分に対応することが可能である。
(基材の準備)
まず、図4(a)に示すような、外部電極20及び絶縁性被覆層30が形成された基材10(5×5mm、厚み0.6mm)を準備した。基材10の材質、外部電極20の材質及びピッチPe、絶縁性被覆層30の材質及び高さ(外部電極20表面からの高さ)、並びに、絶縁性被覆層30における開口35の直径L0及び開口35間の距離P0は、それぞれ表1に示す通りとした。なお、開口は、互いに等間隔で10×10(個)となるように配置した。また、各構成の直径、高さや距離等は、いずれも走査型電子顕微鏡(SEM)等を用いて観察することで測定した。表1中、外部電極20の材質について、「Cu」とは、基材10上に予め設けられていた銅箔をエッチングすることにより形成したものを示し、「Al」とは、基材10上に直接Al−0.5質量%Cuをスパッタすることにより形成したものを示す。
次に、図4(b)に示すように、絶縁性被覆層30の開口35に露出した外部電極20の表面に対し、所定の前処理(脱脂、酸洗、活性化処理又はジンケート処理)を行った後、無電解ニッケルめっきを行い、絶縁性被覆層30の開口35内を充填するとともに、その上面が、絶縁性被覆層30における開口35の周縁部よりも低いUBM層70を形成した。このようにして形成したUBM層70の高さ(外部電極20の表面からの高さ)は、表1に示す通りであった。
次に、図4(c)に示すように、還元型無電解スズめっきを行い、UBM層70と絶縁性被覆層30の一部とが覆われるようにスズめっき層80を形成して、前駆体基板12を得た。このようにして形成されたスズめっき層80の高さ(外部電極20の表面からの高さ)は、表1に示す通りであった。
スズ化合物(塩化第一スズ):10g/L(スズとして)
含リン有機錯化剤(水酸基含有ホスホン酸):100g/L
有機イオウ化合物(スルフィド基含有有機イオウ化合物):100ppm
酸化防止剤(亜リン酸化合物):40g/L
還元剤(三塩化チタン): 5g/L(チタンとして)
上記のようにして得られた前駆体基板12を、窒素雰囲気中(酸素濃度500ppm)、250℃で30秒間保持して、スズめっき層80を溶融し、さらにこれを急冷して凝固させることで、図4(d)に示すようなドーム状のバンプ85を有する端子構造1(実施例1の端子構造)を備えるTEG基板を得た。リフローにより得られたバンプ85の高さ(外部電極20の表面からの高さ)、バンプ85を頂部側からみた場合の直径、及び、バンプ85中のTi含有量は、表1に示す通りであった。なお、バンプ85中のTi含有量は、得られた端子構造のバンプを酸で溶解、抽出し、その抽出液のICP発光分光分析を行い、Sn量に対するTi量を算出することにより測定した。
端子構造の各要素がそれぞれ表1に示すものとなるように変更したこと以外は、実施例1と同様にして、実施例2〜8の端子構造を備えるTEG基板を製造した。
[比較例1]
(基材の準備)
まず、実施例1と同様にして、外部電極及び絶縁性被覆層が形成された基材を準備した。基材の材質、外部電極の材質及びピッチPe、絶縁性被覆層の材質及び高さ(外部電極表面からの高さ)、並びに、絶縁性被覆層における開口の直径及び開口間の距離は、それぞれ表1に示す通りとした。
次に、絶縁性被覆層の開口に露出した外部電極の表面及び絶縁性被覆層の表面に対し、スパッタリングにより厚さ0.1μmの銅層をシード層として形成した(図1(a)参照)。
次に、UBM層の表面に対して、電解はんだめっきを行い、はんだめっき層を形成した(図1(b)参照)。このとき、はんだめっき層はUBM層の上面にのみ形成されていた。このようにして形成したスズめっき層の高さ(外部電極の表面からの高さ)は、表1に示す通りであった。
上記のようにして得られた前駆体基板に対し、窒素雰囲気中(酸素濃度500ppm)、250℃で30秒間保持して、スズめっき層を溶融し、さらにこれを急冷して凝固させることで、ドーム状のバンプを有する端子構造を備えるTEG基板を得た(図1(d)参照)。リフローにより得られたバンプの高さ(外部電極20の表面からの高さ)、バンプを頂部側からみた場合の直径、及び、バンプ中のTi含有量は、表1に示す通りであった。
端子構造の各要素がそれぞれ表1に示すものとなるように変更したこと以外は、比較例1と同様にして、比較例3〜5の端子構造を備えるTEG基板を製造した。
(バンプ形成性の評価)
各実施例及び比較例で得られた端子構造について、目視により、以下のようにしてバンプ形成性の評価を行った。具体的には、隣接するバンプ同士が独立して形成されておりショートしていなかったものをOK、隣接するバンプ同士が一対でもショートしていたものをNGとし、得られた結果を表1に示した。なお、比較例3、5についてはショートが確認されたため、上述したバンプの高さ、バンプの直径、及び、バンプ中のTi含有量についての計測は行わなかった。
各実施例及び比較例で得られた端子構造について、以下のようにしてバンプ強度の評価を行った。具体的には、まず、二枚一対のTEG基板のバンプ(10×10個)を、フリップチップ実装機によりFace to Faceで接合することで、バンプ強度試験試料を作製した。そして、このバンプ強度試験試料における一方のTEG基板の背面を固定し、他方のTEG基板を横方向にせん断するように負荷を掛けた際の、端子構造における破壊モード(破断位置)を評価した。バンプ内での破壊モードのみ観察されたものを、バンプ強度に優れるとしてAと評価し、不良モードとされるUBM層界面での破壊モードが確認されたものを、バンプ強度に劣るとしてBと評価した。なお、隣接するバンプ同士がショートしていた比較例3、5については、バンプ強度評価を行わなかった。結果を表1に示す。
Claims (4)
- 基材と、
前記基材上に形成された電極と、
前記基材上及び前記電極上に形成され、前記電極の少なくとも一部を露出させる開口を有する絶縁性被覆層と、
前記電極上の前記開口内の領域に、上面が前記絶縁性被覆層における前記開口の周縁部よりも低い位置となるように形成された、Niを含むアンダーバンプ金属層と、
前記アンダーバンプ金属層上の前記開口内の領域に形成された、Sn及びTiを含むドーム状のバンプと、を備え、
前記アンダーバンプ金属層と前記バンプとの境界の端部と、前記絶縁性被覆層における前記開口部分の内壁と、が接している、
端子構造。 - 前記内壁の周方向の全体にわたって、前記アンダーバンプ金属層と前記バンプとの境界の端部と、前記内壁と、が接している、請求項1記載の端子構造。
- 請求項1又は2記載の端子構造を備える半導体素子。
- 請求項1又は2記載の端子構造を備えるモジュール基板。
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KR1020130087805A KR20140026250A (ko) | 2012-08-24 | 2013-07-25 | 단자 구조, 및 이것을 구비하는 반도체 소자 및 모듈 기판 |
US13/960,330 US9257402B2 (en) | 2012-08-24 | 2013-08-06 | Terminal structure, and semiconductor element and module substrate comprising the same |
TW102128365A TWI479628B (zh) | 2012-08-24 | 2013-08-07 | Terminal construction and its semiconductor components and module substrate |
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JP2010067711A (ja) * | 2008-09-09 | 2010-03-25 | Panasonic Corp | 半導体装置及びその製造方法 |
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US9257402B2 (en) | 2016-02-09 |
JP6155571B2 (ja) | 2017-07-05 |
KR20140026250A (ko) | 2014-03-05 |
TWI479628B (zh) | 2015-04-01 |
TW201413902A (zh) | 2014-04-01 |
DE102013108986A1 (de) | 2014-02-27 |
DE102013108986B4 (de) | 2019-07-25 |
US20140054770A1 (en) | 2014-02-27 |
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