JP5099644B2 - 電子部品、半導体パッケージ及び電子機器 - Google Patents
電子部品、半導体パッケージ及び電子機器 Download PDFInfo
- Publication number
- JP5099644B2 JP5099644B2 JP2008517858A JP2008517858A JP5099644B2 JP 5099644 B2 JP5099644 B2 JP 5099644B2 JP 2008517858 A JP2008517858 A JP 2008517858A JP 2008517858 A JP2008517858 A JP 2008517858A JP 5099644 B2 JP5099644 B2 JP 5099644B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- ubm
- rich
- electrode pad
- barrier metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 68
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 306
- 239000000956 alloy Substances 0.000 claims abstract description 306
- 229910000679 solder Inorganic materials 0.000 claims abstract description 172
- 230000004888 barrier function Effects 0.000 claims abstract description 85
- 229910052751 metal Inorganic materials 0.000 claims abstract description 63
- 239000002184 metal Substances 0.000 claims abstract description 63
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 57
- 229910052802 copper Inorganic materials 0.000 claims abstract description 54
- 229910003336 CuNi Inorganic materials 0.000 claims abstract description 53
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 229910052698 phosphorus Inorganic materials 0.000 claims description 25
- 230000007423 decrease Effects 0.000 abstract description 30
- 230000015572 biosynthetic process Effects 0.000 abstract description 19
- 230000007774 longterm Effects 0.000 abstract description 9
- 238000003860 storage Methods 0.000 abstract description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 227
- 239000010949 copper Substances 0.000 description 213
- 239000000203 mixture Substances 0.000 description 42
- 238000007747 plating Methods 0.000 description 24
- 238000000034 method Methods 0.000 description 22
- 238000009713 electroplating Methods 0.000 description 10
- 150000002500 ions Chemical class 0.000 description 10
- 239000000463 material Substances 0.000 description 10
- 238000007772 electroless plating Methods 0.000 description 7
- 229910000765 intermetallic Inorganic materials 0.000 description 7
- 229910052718 tin Inorganic materials 0.000 description 7
- 238000004458 analytical method Methods 0.000 description 6
- 230000008859 change Effects 0.000 description 6
- 230000004907 flux Effects 0.000 description 6
- KWSLGOVYXMQPPX-UHFFFAOYSA-N 5-[3-(trifluoromethyl)phenyl]-2h-tetrazole Chemical compound FC(F)(F)C1=CC=CC(C2=NNN=N2)=C1 KWSLGOVYXMQPPX-UHFFFAOYSA-N 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- 239000003054 catalyst Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- 229910001379 sodium hypophosphite Inorganic materials 0.000 description 5
- 229910007637 SnAg Inorganic materials 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 238000005304 joining Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 230000009467 reduction Effects 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- 229910008433 SnCU Inorganic materials 0.000 description 3
- 229910007116 SnPb Inorganic materials 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 229910052763 palladium Inorganic materials 0.000 description 3
- 230000002265 prevention Effects 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 230000008439 repair process Effects 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- 230000035882 stress Effects 0.000 description 3
- 229910052719 titanium Inorganic materials 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910005887 NiSn Inorganic materials 0.000 description 2
- -1 SnAgCu Inorganic materials 0.000 description 2
- 229910005728 SnZn Inorganic materials 0.000 description 2
- 239000012298 atmosphere Substances 0.000 description 2
- 238000004090 dissolution Methods 0.000 description 2
- 238000002149 energy-dispersive X-ray emission spectroscopy Methods 0.000 description 2
- 239000002241 glass-ceramic Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000011835 investigation Methods 0.000 description 2
- 229910052742 iron Inorganic materials 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N iron Substances [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 239000012299 nitrogen atmosphere Substances 0.000 description 2
- 238000010587 phase diagram Methods 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 238000001878 scanning electron micrograph Methods 0.000 description 2
- 238000000550 scanning electron microscopy energy dispersive X-ray spectroscopy Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- NWONKYPBYAMBJT-UHFFFAOYSA-L zinc sulfate Chemical compound [Zn+2].[O-]S([O-])(=O)=O NWONKYPBYAMBJT-UHFFFAOYSA-L 0.000 description 2
- 241000132023 Bellis perennis Species 0.000 description 1
- 235000005633 Chrysanthemum balsamita Nutrition 0.000 description 1
- 229910017482 Cu 6 Sn 5 Inorganic materials 0.000 description 1
- 229910000570 Cupronickel Inorganic materials 0.000 description 1
- 229910003322 NiCu Inorganic materials 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910002056 binary alloy Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000008139 complexing agent Substances 0.000 description 1
- YOCUPQPZWBBYIX-UHFFFAOYSA-N copper nickel Chemical compound [Ni].[Cu] YOCUPQPZWBBYIX-UHFFFAOYSA-N 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 239000000696 magnetic material Substances 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000006179 pH buffering agent Substances 0.000 description 1
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000003405 preventing effect Effects 0.000 description 1
- 229910002059 quaternary alloy Inorganic materials 0.000 description 1
- 238000005464 sample preparation method Methods 0.000 description 1
- 238000004626 scanning electron microscopy Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000003381 stabilizer Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 229910002058 ternary alloy Inorganic materials 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/16—Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
- H01L23/18—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
- H01L23/24—Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
- H01L2224/0345—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/0346—Plating
- H01L2224/03462—Electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/0346—Plating
- H01L2224/03464—Electroless plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/036—Manufacturing methods by patterning a pre-deposited material
- H01L2224/03618—Manufacturing methods by patterning a pre-deposited material with selective exposure, development and removal of a photosensitive material, e.g. of a photosensitive conductive resin
- H01L2224/0362—Photolithography
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/038—Post-treatment of the bonding area
- H01L2224/03828—Applying flux
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05073—Single internal layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05083—Three-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05075—Plural internal layers
- H01L2224/0508—Plural internal layers being stacked
- H01L2224/05084—Four-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05118—Zinc [Zn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05157—Cobalt [Co] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/0516—Iron [Fe] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05164—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05169—Platinum [Pt] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05171—Chromium [Cr] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05571—Disposition the external layer being disposed in a recess of the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05655—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
- H01L2224/1132—Screen printing, i.e. using a stencil
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/11444—Manufacturing methods by blanket deposition of the material of the bump connector in gaseous form
- H01L2224/1145—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
- H01L2224/11462—Electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/115—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/115—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
- H01L2224/11502—Pre-existing or pre-deposited material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/115—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
- H01L2224/1152—Self-assembly, e.g. self-agglomeration of the bump material in a fluid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/118—Post-treatment of the bump connector
- H01L2224/11848—Thermal treatments, e.g. annealing, controlled cooling
- H01L2224/11849—Reflowing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13005—Structure
- H01L2224/13006—Bump connector larger than the underlying bonding area, e.g. than the under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13022—Disposition the bump connector being at least partially embedded in the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75702—Means for aligning in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/812—Applying energy for connecting
- H01L2224/8121—Applying energy for connecting using a reflow oven
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/81447—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/81438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/81455—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83104—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus by applying pressure, e.g. by injection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01007—Nitrogen [N]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01011—Sodium [Na]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01022—Titanium [Ti]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01027—Cobalt [Co]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01028—Nickel [Ni]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0103—Zinc [Zn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01327—Intermediate phases, i.e. intermetallics compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3512—Cracking
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/36—Material effects
- H01L2924/365—Metallurgical effects
- H01L2924/3651—Formation of intermetallics
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3463—Solder compositions in relation to features of the printed circuit board or the mounting process
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Description
通常、SnPb、SnAg、SnCu,SnAgCu、SnZn、SnZnBi,SnInなどのハンダバンプを用いてフリップチップ接続をする場合、リフローによる接合時、リペア工程時、製品の高温使用時などに、ハンダバンプの主成分であるSnがLSIチップのAlやCuの電極パッドや配線に拡散して電気不良が発生する場合がある。
(a)従来のLSIチップや、プリント基板、フレキシブル基板などの配線基板では、AlやCuの電極パッド上に、電解Ni膜上にAu膜を設けたUBMや、無電解NiP膜上にAu膜を設けたUBMを形成していた。そして、このUBMによりSnAg、SnAgCu、SnCu、SnPbなどのハンダバンプと接続していた。しかしながら、このようなUBMを用いた場合、ハンダバンプとバリアメタル層(UBM)との界面に針状のNi3Sn4や(Ni、Cu)3Sn4などのNiリッチな合金が形成されやすくなっていた。このようなNiリッチな合金が形成された接続構造では接合界面に対して応力や衝撃が加わった場合、このNiリッチな合金層で破断して接合強度が低下する現象がしばしば発生していた。特に、もともとハンダ中に全くCuを含まない場合や、ハンダ中のCu量が少ない場合などでは、この合金層で破壊し接合強度が低くなる傾向が大きくなっていた。
(a)Niリッチな(Ni、Cu)3Sn4合金の形成と成長、
(b)Pリッチ層の発生と成長、
(c)UBMの完全溶解によるハンダバンプと電極パッドの接触、
(d)AuSn合金の形成による接合強度低下。
各電子部材上に設けられた電極パッドと、
前記電極パッドを覆うように設けられたバリアメタル層と、
前記バリアメタル層を覆うように設けられた、平均Ni/Cu比が2.3以下のCuNiSn系合金層と、
前記バリアメタル層及びCuNiSn系合金層を介して、互いに異なる電子部材上に設けられた電極パッド間を電気的に接続するように設けられたハンダバンプとを有し、
前記バリアメタル層は、前記CuNiSn系合金層に接するように、15〜60at%のCu及び40〜85at%のNiを含むCuNi系合金層を有することを特徴とする半導体パッケージ。
各電子部材上に設けられた電極パッドと、
前記電極パッドを覆うように設けられたバリアメタル層と、
前記バリアメタル層を覆うように設けられた、平均Ni/Cu比が2.3以下のCuNiSn系合金層と、
前記バリアメタル層とCuNiSn系合金層間に設けられたPを含むPリッチ層と、
前記バリアメタル層、CuNiSn系合金層及びPリッチ層を介して、互いに異なる電子部材上に設けられた電極パッド間を電気的に接続するように設けられたハンダバンプとを有し、
前記バリアメタル層は、前記Pリッチ層に接するように、15at%以上のCu、40at%以上のNi、及び0at%を超え25at%以下のPを含むCuNiP系合金層を有することを特徴とする半導体パッケージ。
各電子部材上に設けられた電極パッドと、
前記電極パッドを覆うように設けられたバリアメタル層と、
前記バリアメタル層を覆うように設けられた、平均Ni/Cu比が2.3以下のCuNiSn系合金層と、
前記バリアメタル層とCuNiSn系合金層間に設けられたPを含むPリッチ層と、
前記バリアメタル層、CuNiSn系合金層及びPリッチ層を介して、互いに異なる電子部材上に設けられた電極パッド間を電気的に接続するように設けられたハンダバンプとを有し、
前記バリアメタル層は、前記Pリッチ層に接するように、44〜60at%のCu、29〜40at%のNi及び8〜16at%のPを含み、かつNi含有量がP含有量の2.5倍以上であるCuNiP系合金層を有することを特徴とする半導体パッケージ。
なお、本明細書において、「at%」とは原子数の割合を表し、「原子%」と記載することもできる。
また、上記「5」及び「6」に記載の「Pを含むPリッチ層」には、第1Pリッチ層及び第2Pリッチ層が含まれる。
(a)Niリッチ金属間化合物の成長による接合強度低下
(b)PリッチNiP層やCuNiP層の形成による接合強度低下
(c)バリア性の喪失による接合強度低下
(d)AuSn合金の形成による接合強度低下。
2:電極パッド
3:UBM
4:パッシベーション
5:ハンダバンプ
6:CuNiSn系合金層
7:第1Pリッチ層
8:第2Pリッチ層
9:中間層
21:マザーボード
22:インターポーザー基板
23:半導体チップ
24:一次接続用ハンダバンプ
25:二次接続用ハンダバンプ
26:プリント基板の電極パッド
27:インターポーザー基板の二次接続用電極パッド
28:インターポーザー基板の一次接続用電極パッド
29:半導体チップの電極パッド
30:プリント基板の電極パッド上のUBM
31:インターポーザー基板の二次接続用電極パッドのUBM
32:インターポーザー基板の一次接続用電極パッドのUBM
33:半導体チップの電極パッドのUBM
34:アンダーフィル樹脂
35:モールド樹脂
101:半導体チップ
102:半導体チップのフェイスダウンボンディング表面の金属電極(アルミ電極)
103:SiN絶縁膜
104:チタン膜(中間金属層の中の一層)
105:銅−ニッケル合金膜中間金属層
106:ハンダバンプ
107:セラッミク(絶縁)基板
108:配線(金属パターン)
109:NiP(またはNiCuP)層
110:高P−NiP(またはNiCuP)層
111:NiSn(またはNiCuSn)層
112:ハンダバンプ
(第1の実施形態)
図1に示すように本発明による電子部品1の一例では、基板又は半導体素子上に設けられたAl、Cu、Agなどの電極パッド2上にUBM(バリアメタル層)3が形成されている。この電極パッドは基板の配線、又は半導体素子と電気的に接続されている。
・Cuリッチな(Cu、Ni)6Sn5:24〜55at%のCu、0〜24at%のNi、40〜50at%のSnを含むCuNiSn合金
・Cuリッチな(Cu、Ni)3Sn:35〜75at%のCu、0〜35at%のNi、20〜30at%のSnを含むCuNiSn合金
・Niリッチな(Ni,Cu)3Sn4:20〜45at%のNi、0〜20at%のCu、55〜65at%のSnを含むCuNiSn合金。
以下、本発明の作用効果について説明する。
本発明では、(1)CuNi系合金層中のCu含有量を15〜60at%、Ni含有量を40〜85at%、(2)CuNiP系合金層中のCu含有量を15tat%以上、Ni含有量を40at%以上、P含有量を0at%を超え、25at%以下、又は(3)CuNiP系合金層中のCu含有量を44〜60at%、Ni含有量を29〜40at%及びP含有量を8〜16at%とし、かつNi含有量がP含有量の2.5倍以上である。これにより、高温環境下の使用後でもNiリッチ(Ni,Cu)3Sn4やNi3Sn4の合金層の発生を大幅に抑制することができる。
ここで、図5に一例としてUBMにCuNiP系合金を用い、ハンダバンプとしてSnAgCuを用いたときの、UBM中のCu含有量に対するCuNiSn系合金層中の平均Ni/Cu比率の関係を示す。
なお、図5において、試料の作成及び各特性値の測定は以下のようにして行なった。
Niイオン、Cuイオン、次亜リン酸ナトリウムを含むめっき液を用いて無電解めっきを行ない、この際、めっき液中のNiイオン、Cuイオン、次亜リン酸ナトリウムの濃度を変化させてCu含有量の異なるCuNiP系合金製のUBMを形成した。
リフロー炉を用い、MAX300℃・窒素雰囲気下で、UBM上にフラックスで固定したSnAgCu(=96.5:3:0.5)ハンダバンプを溶解させて接合させた。なお、リフロー8回後の試料を作製する場合は、このリフロー作業を8回繰り返した。
ハンダバンプとUBMを接合した界面を断面加工により露出させ、UBMをSEM−EDSにより組成分析し、Cu含有量を測定した。
ハンダバンプとUBMを接合した界面を断面加工により露出させ、CuNiSn系合金層に相当する部分をSEM−EDSにより組成分析し、平均Ni/Cu比を測定した。平均Ni/Cu値を算出する場合には、厚さ2μm×幅50μmの領域において、SEM−EDXによるエリア組成分析を実施し求めた。ただし、CuNiSn系合金層が薄い場合などエリア分析が難しい場合は、点分析によりCuNiSn系合金層を10箇所、測定して平均値を求めることで、平均Ni/Cu値を求めた。
130μmφのAl電極上に形成した5μm程度のUBM上に、150μmφのSnAgCu(=96.5:3:0.5)のハンダバンプを形成した試料について、デイジ社のコールドプル強度試験装置により、バンププル強度を測定した。
従来の無電解NiPを用いたUBMでは、ハンダバンプ接合時にUBM中のNiがハンダバンプへ拡散することによりPリッチNiP層(Ni3Pを主成分とする層)等が形成され、応力や衝撃が加わった場合にこの部分で破壊が生じて接合強度が低下する問題があった。しかし、本発明では、ハンダに対して拡散速度の速いCuがUBM中に高含量で含有されていることにより、UBMにもある程度、ハンダバンプ中に含まれるSnが拡散しやすくなっている。このため、Snを含まないPリッチNiP層等の発生を大幅に抑制でき、接合強度の低下を防止できる。
(UBM中のNi組成と接合強度との関係)
本発明では,UBM中にCuに比べて高いバリア性を有する、(1)Niを40〜85at%含有させたCuNi系合金層、又は(2)Niを40at%以上、含有させたCuNiP系合金層を用いることにより、ハンダに対するバリア性を確保し、高温保持後の接合強度の低下を防止している。一例として、本発明で形成したCuNiP系合金のUBMによるSnAgCuハンダバンプに対するバリア性を図8に示す。図8は、UBM中のNi含有率とリフロー後のUBM溶解膜厚の関係を示している。ここで、溶解膜厚とは、ハンダバンプを形成する前後において、減少したUBMの膜厚のことを表す。また、図8において、各特性値の測定は以下のようにして行なった。
リフロー炉を用い、MAX300℃・窒素雰囲気下で、UBM上にフラックスで固定したSnAgCu(=96.5:3:0.5)ハンダバンプを溶解させて接合させた。リフロー8回後の試料を作製する場合は、このリフロー作業を8回繰り返した。
ハンダバンプとUBMを接合した界面を断面加工により露出させ、UBMをSEM−EDSにより組成分析し、Ni含有量を測定した。
同一試料内において、ハンダバンプを形成した電極パッドと、ハンダバンプを形成していない電極パッドの両方をSEMで観察し、両者のUBMの膜厚差を実測することでUBM溶解膜厚を求めた。溶解膜厚の測定ポイントは10箇所とし、これらの平均値から溶解膜厚を求めた。
本発明の、(1)CuNi系合金や(2)、(3)CuNiP系合金を用いたUBMでは、従来のNi、NiP系合金などのUBMとは異なり、濡れ性の良いCuが15at%以上、含まれている。このため、これらのUBM上にCuNiSn系合金層を介してハンダバンプが形成されると、従来のAuめっき処理を施したCuNi膜やAuめっき処理を施したNiP膜のUBMに近いハンダ濡れ性が得られる。このCuによるハンダ濡れ性改善効果は、Cuが60at%以上まで多く増やさなくても得られる。
本発明の電子部品としては以上に述べてきたような構造のほかに、図10に示すように、Al、Cu、Agなどの電極パッド2とCuNi系合金層、CuNiP系合金層3との間に、中間層9を挟んだ2層以上の構造であっても構わない。ただし、CuNiSn系合金層と接続する最表面のバリアメタル層の組成がCuNi系合金、又はCuNiP系合金となっていることが必要である。
なお、中間層中の上記各合金は、以下の組成を有する。
・NiP系合金:Pを2〜25at%含むNiP系合金
・NiB系合金:Bを1〜10at%含むNiB系合金
・CoP系合金:Pを2〜25at%含むCoP系合金。
この中間層9を用いる理由の1つとしては、CuNi系合金層、CuNiP系合金層と電極パッド2との密着強度を更に改善できることが挙げられる。
本発明でここまでに述べてきた電子部品とは、プリント基板、フレキシブル基板、セラミックス基板、ガラスセラミックス基板、半導体基板上に設けられたものや、チップコンデンサー、チップ抵抗など、電気回路を構成する部品全般のことを指している。
本発明の接続構造を利用した半導体パッケージについて以下に実施例を述べる。まず、表面にAl電極パッドを有する半導体ウエハーに対して、Pd触媒処理、またはジンケート処理により表面の活性化を行った後、80℃に保った無電解CuNiPめっき液に20分ほど浸漬させ、半導体ウエハー表面にCuNiP系合金層を5μm程度、析出させる。電極パッド材料がCuの場合、Pd触媒を用いて電極パッドを活性化させることができ、電極パッド上に無電解CuNiP系合金層を選択的に形成することができる。なお、無電解CuNiPめっき液にはCuイオン、Niイオン、次亜リン酸ナトリウム、錯化剤、pH緩衝剤、安定剤などが適量、含まれている。この無電解CuNiPめっき液中の、CuイオンとNiイオンの量を調節することでCuを15at%以上、Niを40at%以上、Pを25at%以下、含むCuNiP系合金のUBMを5μm、形成することができる。
表面にCu電極パッドを有する半導体ウエハーに対し、スパッタリングによりTiなどの給電層を形成した後、フォトリソグラフィー技術によって電極パッド部分を開口させた。次に、CuイオンとNiイオンを含む電解CuNiめっき液に浸漬させて電流を流し、半導体ウエハー上にCuNi系合金層を5μm、析出させる。この電解めっきの場合も実施例1の無電解めっきと同様、めっき液中のCuとNiの含有量を調整し、所望の膜組成(Cu:15〜60at%、Ni:40〜85at%)が得られるようにする。なお、電解めっきによりCuNiP系合金層を形成する場合は、めっき液中に次亜リン酸ナトリウムなどのP源を添加すれば良い。
表面にCu電極パッドを有するビルドアップ基板に対して、Pd触媒処理を施し電極パッド表面を活性化させた後、先の実施例1に述べた無電解CuNiPめっき液に浸漬させてCuNiP系合金膜を5μm程度析出させる。その後、ハンダペーストを電極部分に印刷してリフローを行うことによりCuNiP系合金層上にSnAgハンダのプリコートを形成する。この後、このプリント基板にSnAgハンダバンプが形成されたCSPを実装することで、ハンダバンプとUBMとの界面に平均Ni/Cu比が2.3以下のCuNiSn系合金層及びPリッチ層を有する装置を作製する。
表面にめっきリード線とつながっているCu電極パッドを設けてあるプリント基板を電解CuNiめっき液中に浸漬させ、陰極側につないで電流を流すことで、Cuの電極パッド上にのみCuNi系合金層膜組成(膜組成はCu:15〜60at%、Ni:40〜85at%)を3μm形成する。その後、UBMを形成した電極パッド上に、SnAgCuペーストを印刷してリフローを行なうことによりUBM上にハンダバンプが形成され、ハンダバンプとUBMとの界面に平均Ni/Cu比が2.3以下のCuNiSn合金層の接合構造を有する装置を形成する。
表面にAg電極パッドが形成されたガラセラ基板に、Pd触媒処理を施し電極パッド表面を活性化させた後、まず密着性を高めるために無電解NiPめっき液に浸漬させ、NiP系合金を1μm程度、形成する。この後、このNiPめっき膜上にさらにPd触媒で活性化処理を行った上で無電解CuNiPめっき液に浸漬させて、Cu20at%、Ni60at%、P20at%のCuNiP系合金層を3μm程度、形成する。この後、この基板をSnAgCuハンダ溶融槽に浸漬させてCuNiP表面にハンダバンプを形成する。この後、リフロー炉に通すことでハンダバンプとUBMとの界面に平均Ni/Cu比が2.3以下のCuNiSn系合金層及びPリッチ層を有する接合構造を備えた装置を形成する。
表面にAl電極パッドを有する半導体ウエハーに対して、ジンケート処理により表面の活性化を行った後、80℃に保った無電解CuNiPめっき液に20分ほど浸漬させ、半導体ウエハー表面にCuNiP系合金層を5μm程度、析出させる。このとき無電解CuNiPめっき液中の次亜リン酸ナトリウム濃度を高くすることにより(0.1〜1.0mol/L程度)、44〜60at%のCu、29〜40at%のNi及び8〜16at%のPを含むCuNiP系合金のUBMを5μm、形成することができる。なお、電解めっきや無電解めっきでPをCuNiP系合金に共析させる場合、PはNiと共に共析する性質があるので、PはNi含有量の約40%以下しか析出させることができない。このため、CuNiP系合金中のNi含有量はP含有量の約2.5倍以上となる。
Claims (13)
- 基板上又は半導体素子上に設けられた電極パッドと、前記電極パッドを覆うように設けられたバリアメタル層とを有し、
前記バリアメタル層は、電極パッド側と反対側に15at%以上のCu、40at%以上のNi、及び0at%を超え、25at%以下のPを含むCuNiP系合金層を有することを特徴とする電子部品。 - 前記CuNiP系合金層中の平均Ni/Cu比が、0.60〜5.5であることを特徴とする請求項1に記載の電子部品。
- 基板上又は半導体素子上に設けられた電極パッドと、前記電極パッドを覆うように設けられたバリアメタル層とを有し、
前記バリアメタル層は、電極パッド側と反対側に44〜60at%のCu、29〜40at%のNi及び8〜16at%のPを含み、かつNi含有量がP含有量の2.5倍以上であるCuNiP系合金層を有することを特徴とする電子部品。 - 前記電極パッドと前記バリアメタル層との間に更に、Ni、NiP系合金、又はNiB系合金を含む中間層が形成されていることを特徴とする請求項1〜3の何れか1項に記載の電子部品。
- 基板及び半導体素子の少なくとも一方からなる複数の電子部材と、
各電子部材上に設けられた電極パッドと、
前記電極パッドを覆うように設けられたバリアメタル層と、
前記バリアメタル層を覆うように設けられた、平均Ni/Cu比が2.3以下のCuNiSn系合金層と、
前記バリアメタル層及びCuNiSn系合金層を介して、互いに異なる電子部材上に設けられた電極パッド間を電気的に接続するように設けられたハンダバンプと
を有し、
前記バリアメタル層は、前記CuNiSn系合金層に接するように、15〜60at%のCu及び40〜85at%のNiを含むCuNi系合金層を有することを特徴とする半導体パッケージ。 - 前記CuNi系合金層中の平均Ni/Cu比が、0.67〜5.7であることを特徴とする請求項5に記載の半導体パーケージ。
- 基板及び半導体素子の少なくとも一方からなる複数の電子部材と、
各電子部材上に設けられた電極パッドと、
前記電極パッドを覆うように設けられたバリアメタル層と、
前記バリアメタル層を覆うように設けられた、平均Ni/Cu比が2.3以下のCuNiSn系合金層と、
前記バリアメタル層とCuNiSn系合金層間に設けられたPを含むPリッチNiCuSnP層又はPを含むPリッチNiSnP層と、
前記バリアメタル層、CuNiSn系合金層、並びに、Pを含むPリッチNiCuSnP層又はPを含むPリッチNiSnP層を介して、互いに異なる電子部材上に設けられた電極パッド間を電気的に接続するように設けられたハンダバンプと
を有し、
前記バリアメタル層は、前記Pを含むPリッチNiCuSnP層又はPを含むPリッチNiSnP層に接するように、15at%以上のCu、40at%以上のNi、及び0at%を超え25at%以下のPを含むCuNiP系合金層を有することを特徴とする半導体パッケージ。 - 前記CuNiP系合金層中の平均Ni/Cu比が、0.60〜5.5であることを特徴とする請求項7に記載の半導体パーケージ。
- 基板及び半導体素子の少なくとも一方からなる複数の電子部材と、
各電極部材上に設けられた電極パッドと、
前記電極パッドを覆うように設けられたバリアメタル層と、
前記バリアメタル層を覆うように設けられた、平均Ni/Cu比が2.3以下のCuNiSn系合金層と、
前記バリアメタル層とCuNiSn系合金層間に設けられたPを含むPリッチNiCuSnP層又はPを含むPリッチNiSnP層と、
前記バリアメタル層、CuNiSn系合金層、並びに、Pを含むPリッチNiCuSnP層又はPを含むPリッチNiSnP層を介して、互いに異なる電子部材上に設けられた電極パッド間を電気的に接続するように設けられたハンダバンプと
を有し、
前記バリアメタル層は、前記Pを含むPリッチNiCuSnP層又はPを含むPリッチNiSnP層に接するように、44〜60at%のCu、29〜40at%のNi及び8〜16at%のPを含み、かつNi含有量がP含有量の2.5倍以上であるCuNiP系合金層を有することを特徴とする半導体パッケージ。 - 前記電極パッドと前記バリアメタル層との間に更に、中間層が形成されていることを特徴とする請求項5〜9の何れか1項に記載の半導体パッケージ。
- 前記中間層が、Ni、NiP系合金、又はNiB系合金を含むことを特徴とする請求項10に記載の半導体パッケージ。
- 前記バリアメタル層からハンダバンプまでの間に、Auを含まないことを特徴とする請求項5〜11の何れか1項に記載の半導体パッケージ。
- 請求項5〜12の何れか1項に記載の半導体パッケージを有することを特徴とする電子機器。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008517858A JP5099644B2 (ja) | 2006-05-29 | 2007-05-22 | 電子部品、半導体パッケージ及び電子機器 |
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006148207 | 2006-05-29 | ||
JP2006148207 | 2006-05-29 | ||
JP2007010094 | 2007-01-19 | ||
JP2007010094 | 2007-01-19 | ||
JP2008517858A JP5099644B2 (ja) | 2006-05-29 | 2007-05-22 | 電子部品、半導体パッケージ及び電子機器 |
PCT/JP2007/060423 WO2007138922A1 (ja) | 2006-05-29 | 2007-05-22 | 電子部品、半導体パッケージ及び電子機器 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2007138922A1 JPWO2007138922A1 (ja) | 2009-10-01 |
JP5099644B2 true JP5099644B2 (ja) | 2012-12-19 |
Family
ID=38778441
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008517858A Expired - Fee Related JP5099644B2 (ja) | 2006-05-29 | 2007-05-22 | 電子部品、半導体パッケージ及び電子機器 |
Country Status (5)
Country | Link |
---|---|
US (1) | US20090174052A1 (ja) |
EP (1) | EP2023384A4 (ja) |
JP (1) | JP5099644B2 (ja) |
CN (4) | CN102157458B (ja) |
WO (1) | WO2007138922A1 (ja) |
Families Citing this family (30)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102157458B (zh) * | 2006-05-29 | 2012-10-17 | 日本电气株式会社 | 电子部件、半导体封装件和电子器件 |
KR20090042556A (ko) * | 2007-10-26 | 2009-04-30 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
US20090134016A1 (en) * | 2007-11-28 | 2009-05-28 | International Business Machines Corporation | Underbump metallurgy employing sputter-deposited nickel titanium copper alloy |
JP2009238905A (ja) * | 2008-03-26 | 2009-10-15 | Nippon Telegr & Teleph Corp <Ntt> | 半導体素子の実装構造および半導体素子の実装方法 |
US20090297879A1 (en) * | 2008-05-12 | 2009-12-03 | Texas Instruments Incorporated | Structure and Method for Reliable Solder Joints |
US20120280023A1 (en) * | 2008-07-10 | 2012-11-08 | Lsi Corporation | Soldering method and related device for improved resistance to brittle fracture |
US8039311B2 (en) * | 2008-09-05 | 2011-10-18 | Stats Chippac Ltd. | Leadless semiconductor chip carrier system |
US9082762B2 (en) * | 2009-12-28 | 2015-07-14 | International Business Machines Corporation | Electromigration-resistant under-bump metallization of nickel-iron alloys for Sn-rich solder bumps in Pb-free flip-clip |
JP5273073B2 (ja) * | 2010-03-15 | 2013-08-28 | オムロン株式会社 | 電極構造及び当該電極構造を備えたマイクロデバイス用パッケージ |
US8581420B2 (en) | 2010-10-18 | 2013-11-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Under-bump metallization (UBM) structure and method of forming the same |
KR101604255B1 (ko) * | 2011-08-16 | 2016-03-17 | 가부시키가이샤 아루박 | 부품의 제조 방법 및 부품 |
JP5979883B2 (ja) * | 2012-01-16 | 2016-08-31 | 株式会社Kelk | 熱電素子およびこれを備えた熱電モジュール |
JP5966874B2 (ja) * | 2012-01-27 | 2016-08-10 | Tdk株式会社 | 構造体、及びそれを含む電子部品、プリント配線板 |
JP6076020B2 (ja) * | 2012-02-29 | 2017-02-08 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
US8912087B2 (en) * | 2012-08-01 | 2014-12-16 | Infineon Technologies Ag | Method of fabricating a chip package |
JP6015240B2 (ja) | 2012-08-24 | 2016-10-26 | Tdk株式会社 | 端子構造及び半導体素子 |
JP6155571B2 (ja) | 2012-08-24 | 2017-07-05 | Tdk株式会社 | 端子構造、並びにこれを備える半導体素子及びモジュール基板 |
JP6015239B2 (ja) | 2012-08-24 | 2016-10-26 | Tdk株式会社 | 端子構造、並びにこれを備える半導体素子及びモジュール基板 |
JP6326723B2 (ja) | 2012-08-24 | 2018-05-23 | Tdk株式会社 | 端子構造及び半導体素子 |
US9245770B2 (en) * | 2012-12-20 | 2016-01-26 | Stats Chippac, Ltd. | Semiconductor device and method of simultaneous molding and thermalcompression bonding |
JP2014192383A (ja) * | 2013-03-27 | 2014-10-06 | Fujitsu Ltd | 電子部品及び電子装置の製造方法 |
JP6197619B2 (ja) * | 2013-12-09 | 2017-09-20 | 富士通株式会社 | 電子装置及び電子装置の製造方法 |
US9699914B2 (en) * | 2014-10-20 | 2017-07-04 | Averatek Corporation | Patterning of electroless metals by selective deactivation of catalysts |
JP6587891B2 (ja) * | 2015-10-08 | 2019-10-09 | イビデン株式会社 | プリント配線板およびその製造方法 |
US20170110392A1 (en) * | 2015-10-15 | 2017-04-20 | Advanced Semiconductor Engineering, Inc. | Semiconductor package structure and method for manufacturing the same structure |
US9984987B2 (en) | 2016-08-05 | 2018-05-29 | Nanya Technology Corporation | Semiconductor structure and manufacturing method thereof |
JP6967252B2 (ja) * | 2017-11-09 | 2021-11-17 | 株式会社クオルテック | 電子部品の製造方法、及び電子部品 |
US10388627B1 (en) | 2018-07-23 | 2019-08-20 | Mikro Mesa Technology Co., Ltd. | Micro-bonding structure and method of forming the same |
US10347602B1 (en) * | 2018-07-23 | 2019-07-09 | Mikro Mesa Technology Co., Ltd. | Micro-bonding structure |
US20240113060A1 (en) * | 2021-02-22 | 2024-04-04 | Societe de Commercialisation des Produits de la Recherche Appliquée Socpra Sciences et Génie S.E.C. | Heterogeneous solder bump structure |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06188284A (ja) * | 1992-12-18 | 1994-07-08 | Hitachi Ltd | 半導体集積回路装置 |
JP2003303842A (ja) * | 2002-04-12 | 2003-10-24 | Nec Electronics Corp | 半導体装置およびその製造方法 |
WO2005041290A1 (ja) * | 2003-10-24 | 2005-05-06 | Nikko Materials Co., Ltd. | ニッケル合金スパッタリングターゲット及びニッケル合金薄膜 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR900003849B1 (ko) * | 1986-07-11 | 1990-06-02 | 가부시기가이샤 히다찌세이사꾸쇼 | 배선 기판과 이를 사용한 서말 프린팅 헤드 |
JPH0684919A (ja) | 1992-09-03 | 1994-03-25 | Sharp Corp | フリップチップ形半導体装置のフェイスダウンボンディング用バンプ電極及びその作製方法 |
CN1314225A (zh) * | 2000-02-18 | 2001-09-26 | 德克萨斯仪器股份有限公司 | 铜镀层集成电路焊点的结构和方法 |
JP3910363B2 (ja) | 2000-12-28 | 2007-04-25 | 富士通株式会社 | 外部接続端子 |
JP4656275B2 (ja) * | 2001-01-15 | 2011-03-23 | 日本電気株式会社 | 半導体装置の製造方法 |
KR100476301B1 (ko) * | 2002-07-27 | 2005-03-15 | 한국과학기술원 | 전기도금법에 의한 반도체 소자의 플립칩 접속용 ubm의형성방법 |
US7427557B2 (en) * | 2004-03-10 | 2008-09-23 | Unitive International Limited | Methods of forming bumps using barrier layers as etch masks |
DE102005051857A1 (de) * | 2005-05-25 | 2007-02-22 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | UBM-PAD, Lötkontakt und Verfahren zur Herstellung einer Lötverbindung |
CN102157458B (zh) * | 2006-05-29 | 2012-10-17 | 日本电气株式会社 | 电子部件、半导体封装件和电子器件 |
-
2007
- 2007-05-22 CN CN2011100421454A patent/CN102157458B/zh not_active Expired - Fee Related
- 2007-05-22 CN CN200780019384XA patent/CN101454887B/zh not_active Expired - Fee Related
- 2007-05-22 CN CN2012101828814A patent/CN102738106A/zh active Pending
- 2007-05-22 US US12/298,285 patent/US20090174052A1/en not_active Abandoned
- 2007-05-22 CN CN201210183161.XA patent/CN102738107B/zh not_active Expired - Fee Related
- 2007-05-22 JP JP2008517858A patent/JP5099644B2/ja not_active Expired - Fee Related
- 2007-05-22 EP EP07743857A patent/EP2023384A4/en not_active Withdrawn
- 2007-05-22 WO PCT/JP2007/060423 patent/WO2007138922A1/ja active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06188284A (ja) * | 1992-12-18 | 1994-07-08 | Hitachi Ltd | 半導体集積回路装置 |
JP2003303842A (ja) * | 2002-04-12 | 2003-10-24 | Nec Electronics Corp | 半導体装置およびその製造方法 |
WO2005041290A1 (ja) * | 2003-10-24 | 2005-05-06 | Nikko Materials Co., Ltd. | ニッケル合金スパッタリングターゲット及びニッケル合金薄膜 |
Also Published As
Publication number | Publication date |
---|---|
CN102738107A (zh) | 2012-10-17 |
US20090174052A1 (en) | 2009-07-09 |
EP2023384A1 (en) | 2009-02-11 |
CN102157458A (zh) | 2011-08-17 |
EP2023384A4 (en) | 2013-01-02 |
CN102738107B (zh) | 2014-08-27 |
WO2007138922A1 (ja) | 2007-12-06 |
CN102738106A (zh) | 2012-10-17 |
CN102157458B (zh) | 2012-10-17 |
CN101454887A (zh) | 2009-06-10 |
JPWO2007138922A1 (ja) | 2009-10-01 |
CN101454887B (zh) | 2011-03-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5099644B2 (ja) | 電子部品、半導体パッケージ及び電子機器 | |
US8378485B2 (en) | Solder interconnect by addition of copper | |
JP4195886B2 (ja) | 無鉛はんだを用い反応バリア層を有するフリップ・チップ用相互接続構造を形成するための方法 | |
US9607936B2 (en) | Copper bump joint structures with improved crack resistance | |
TWI452657B (zh) | 用於改良耐脆裂性之焊接方法及相關裝置 | |
US7800240B2 (en) | Under bump metallurgy structure and wafer structure using the same and method of manufacturing wafer structure | |
US20070152331A1 (en) | Tin-bismuth (Sn-Bi) family alloy solder and semiconductor device using the same | |
TWI302722B (en) | Ubm pad, solder contact and methods for creating a solder joint | |
JP2001308129A (ja) | 鉛フリーバンプの形成方法 | |
JP2003338517A (ja) | 基板上に無鉛はんだ合金を形成する方法 | |
CN114256184A (zh) | 混合接合结构、焊膏组成物、半导体器件及其制造方法 | |
JP2000216196A (ja) | 半田接合方法並びに電子装置及びその製造方法 | |
JP6729331B2 (ja) | 電子装置及び電子装置の製造方法 | |
WO2004105053A1 (ja) | 導電性ボール、電子部品の電極の形成方法および電子部品ならびに電子機器 | |
TWI242866B (en) | Process of forming lead-free bumps on electronic component | |
US7325716B2 (en) | Dense intermetallic compound layer | |
TW201415563A (zh) | 具有奈米雙晶銅之電性連接體、其製備方法、以及包含其之電性連接結構 | |
JP2003290974A (ja) | 電子回路装置の接合構造及びそれに用いる電子部品 | |
JP2000150574A (ja) | 半導体装置及び半田による接合方法 | |
JP2007123577A (ja) | 半導体装置 | |
TWI247396B (en) | Bump and the fabricating method thereof | |
JPH10261643A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20100316 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120717 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120801 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120828 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120918 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20151005 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5099644 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313117 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |