JP2015195382A - 半導体構造およびその製造方法 - Google Patents
半導体構造およびその製造方法 Download PDFInfo
- Publication number
- JP2015195382A JP2015195382A JP2015098864A JP2015098864A JP2015195382A JP 2015195382 A JP2015195382 A JP 2015195382A JP 2015098864 A JP2015098864 A JP 2015098864A JP 2015098864 A JP2015098864 A JP 2015098864A JP 2015195382 A JP2015195382 A JP 2015195382A
- Authority
- JP
- Japan
- Prior art keywords
- cyanide
- silver alloy
- bath
- alloy bump
- bump body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 127
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 63
- 229910001316 Ag alloy Inorganic materials 0.000 claims abstract description 199
- XFXPMWWXUTWYJX-UHFFFAOYSA-N Cyanide Chemical compound N#[C-] XFXPMWWXUTWYJX-UHFFFAOYSA-N 0.000 claims abstract description 126
- 239000004020 conductor Substances 0.000 claims abstract description 41
- 238000007747 plating Methods 0.000 claims abstract description 13
- 238000009713 electroplating Methods 0.000 claims description 96
- 150000003839 salts Chemical class 0.000 claims description 76
- 229910052751 metal Inorganic materials 0.000 claims description 71
- 239000002184 metal Substances 0.000 claims description 71
- 238000000034 method Methods 0.000 claims description 56
- 239000002245 particle Substances 0.000 claims description 56
- 239000011521 glass Substances 0.000 claims description 37
- 229910000679 solder Inorganic materials 0.000 claims description 31
- 238000007772 electroless plating Methods 0.000 claims description 30
- 239000000758 substrate Substances 0.000 claims description 29
- -1 oxalate ions Chemical class 0.000 claims description 19
- 238000000137 annealing Methods 0.000 claims description 12
- 230000005496 eutectics Effects 0.000 claims description 7
- 238000005304 joining Methods 0.000 claims description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052710 silicon Inorganic materials 0.000 abstract description 4
- 239000010703 silicon Substances 0.000 abstract description 4
- 239000010410 layer Substances 0.000 description 246
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 55
- 239000010931 gold Substances 0.000 description 50
- 229910045601 alloy Inorganic materials 0.000 description 48
- 239000000956 alloy Substances 0.000 description 48
- 229910052737 gold Inorganic materials 0.000 description 32
- 229910052709 silver Inorganic materials 0.000 description 32
- 239000004332 silver Substances 0.000 description 31
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 28
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 27
- 239000000243 solution Substances 0.000 description 23
- 238000012360 testing method Methods 0.000 description 13
- 238000005259 measurement Methods 0.000 description 12
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Chemical compound [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 12
- 239000000463 material Substances 0.000 description 11
- 239000010936 titanium Substances 0.000 description 11
- 239000006185 dispersion Substances 0.000 description 10
- 229910052763 palladium Inorganic materials 0.000 description 10
- 239000011135 tin Substances 0.000 description 10
- 239000003795 chemical substances by application Substances 0.000 description 9
- 239000010949 copper Substances 0.000 description 9
- 238000002161 passivation Methods 0.000 description 9
- 238000006243 chemical reaction Methods 0.000 description 8
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- MUBZPKHOEPUJKR-UHFFFAOYSA-L Oxalate Chemical compound [O-]C(=O)C([O-])=O MUBZPKHOEPUJKR-UHFFFAOYSA-L 0.000 description 6
- 238000005229 chemical vapour deposition Methods 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 238000004626 scanning electron microscopy Methods 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000009826 distribution Methods 0.000 description 5
- 230000008018 melting Effects 0.000 description 5
- 238000002844 melting Methods 0.000 description 5
- 239000000203 mixture Substances 0.000 description 5
- 239000006104 solid solution Substances 0.000 description 5
- 229910052719 titanium Inorganic materials 0.000 description 5
- 238000004627 transmission electron microscopy Methods 0.000 description 5
- 229910017750 AgSn Inorganic materials 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 238000004458 analytical method Methods 0.000 description 4
- 229910002056 binary alloy Inorganic materials 0.000 description 4
- 229920001721 polyimide Polymers 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 229910002058 ternary alloy Inorganic materials 0.000 description 4
- 229910052718 tin Inorganic materials 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 3
- 229910018731 Sn—Au Inorganic materials 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 229910000765 intermetallic Inorganic materials 0.000 description 3
- 239000007791 liquid phase Substances 0.000 description 3
- 239000011159 matrix material Substances 0.000 description 3
- 230000007935 neutral effect Effects 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 239000004033 plastic Substances 0.000 description 3
- 229910052697 platinum Inorganic materials 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 3
- 229910002695 AgAu Inorganic materials 0.000 description 2
- 229910001020 Au alloy Inorganic materials 0.000 description 2
- 238000012935 Averaging Methods 0.000 description 2
- AFVFQIVMOAPDHO-UHFFFAOYSA-N Methanesulfonic acid Chemical compound CS(O)(=O)=O AFVFQIVMOAPDHO-UHFFFAOYSA-N 0.000 description 2
- FOIXSVOLVBLSDH-UHFFFAOYSA-N Silver ion Chemical compound [Ag+] FOIXSVOLVBLSDH-UHFFFAOYSA-N 0.000 description 2
- 229910007116 SnPb Inorganic materials 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 2
- 239000000654 additive Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 238000000429 assembly Methods 0.000 description 2
- 230000000712 assembly Effects 0.000 description 2
- 239000010953 base metal Substances 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 239000008393 encapsulating agent Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 238000011049 filling Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 229910021645 metal ion Inorganic materials 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000010587 phase diagram Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910001128 Sn alloy Inorganic materials 0.000 description 1
- 229910020836 Sn-Ag Inorganic materials 0.000 description 1
- 229910020988 Sn—Ag Inorganic materials 0.000 description 1
- 238000002441 X-ray diffraction Methods 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000008139 complexing agent Substances 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 238000010894 electron beam technology Methods 0.000 description 1
- 238000001803 electron scattering Methods 0.000 description 1
- 239000003353 gold alloy Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 229940098779 methanesulfonic acid Drugs 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 230000000877 morphologic effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- MUJIDPITZJWBSW-UHFFFAOYSA-N palladium(2+) Chemical compound [Pd+2] MUJIDPITZJWBSW-UHFFFAOYSA-N 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 239000010944 silver (metal) Substances 0.000 description 1
- 238000002791 soaking Methods 0.000 description 1
- 238000010561 standard procedure Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000004094 surface-active agent Substances 0.000 description 1
- 230000009897 systematic effect Effects 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
- 238000009827 uniform distribution Methods 0.000 description 1
- 238000004073 vulcanization Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910001868 water Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
- H01L24/742—Apparatus for manufacturing bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
- H01L2224/0345—Physical vapour deposition [PVD], e.g. evaporation, or sputtering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/03444—Manufacturing methods by blanket deposition of the material of the bonding area in gaseous form
- H01L2224/03452—Chemical vapour deposition [CVD], e.g. laser CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/0346—Plating
- H01L2224/03462—Electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/034—Manufacturing methods by blanket deposition of the material of the bonding area
- H01L2224/0346—Plating
- H01L2224/03464—Electroless plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/036—Manufacturing methods by patterning a pre-deposited material
- H01L2224/0361—Physical or chemical etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/039—Methods of manufacturing bonding areas involving a specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/03—Manufacturing methods
- H01L2224/039—Methods of manufacturing bonding areas involving a specific sequence of method steps
- H01L2224/03912—Methods of manufacturing bonding areas involving a specific sequence of method steps the bump being used as a mask for patterning the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05005—Structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/0502—Disposition
- H01L2224/05026—Disposition the internal layer being disposed in a recess of the surface
- H01L2224/05027—Disposition the internal layer being disposed in a recess of the surface the internal layer extending out of an opening
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05144—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05164—Palladium [Pd] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/05001—Internal layers
- H01L2224/05099—Material
- H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
- H01L2224/05166—Titanium [Ti] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05541—Structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05575—Plural external layers
- H01L2224/05576—Plural external layers being mutually engaged together, e.g. through inserts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05575—Plural external layers
- H01L2224/05578—Plural external layers being disposed next to each other, e.g. side-to-side arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05639—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/05647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
- H01L2224/11462—Electroplating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
- H01L2224/1146—Plating
- H01L2224/11464—Electroless plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/1147—Manufacturing methods using a lift-off mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/118—Post-treatment of the bump connector
- H01L2224/1182—Applying permanent coating, e.g. in-situ coating
- H01L2224/11825—Plating, e.g. electroplating, electroless plating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/118—Post-treatment of the bump connector
- H01L2224/11848—Thermal treatments, e.g. annealing, controlled cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/119—Methods of manufacturing bump connectors involving a specific sequence of method steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/119—Methods of manufacturing bump connectors involving a specific sequence of method steps
- H01L2224/11901—Methods of manufacturing bump connectors involving a specific sequence of method steps with repetition of the same manufacturing step
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/119—Methods of manufacturing bump connectors involving a specific sequence of method steps
- H01L2224/11901—Methods of manufacturing bump connectors involving a specific sequence of method steps with repetition of the same manufacturing step
- H01L2224/11902—Multiple masking steps
- H01L2224/11906—Multiple masking steps with modification of the same mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13005—Structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
- H01L2224/13082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13144—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/1356—Disposition
- H01L2224/13562—On the entire exposed surface of the core
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/1356—Disposition
- H01L2224/13563—Only on parts of the surface of the core, i.e. partial coating
- H01L2224/13564—Only on the bonding interface of the bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/1357—Single coating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/13599—Material
- H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13644—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/1354—Coating
- H01L2224/13599—Material
- H01L2224/136—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13647—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/81498—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/81499—Material of the matrix
- H01L2224/8159—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/81498—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/81598—Fillers
- H01L2224/81599—Base material
- H01L2224/8169—Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/81498—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/81598—Fillers
- H01L2224/81699—Coating material
- H01L2224/817—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/81738—Coating material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/81744—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/8185—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/8185—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/81855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/81862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83104—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus by applying pressure, e.g. by injection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Electroplating Methods And Accessories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
- Electroplating And Plating Baths Therefor (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Abstract
【解決手段】 半導体ダイ上に導体パッド102を形成し、導体パッド102上にシード層105を形成し、シード層105上に第1のマスク層109を画成し、第1のマスク層109内に銀合金バンプ体101を形成する。銀合金バンプ体101の形成において、第1のシアン化物系浴を調製する。第1のシアン化物系浴のpH値を、約6から約8の範囲内に制御し、第1のシアン化物系浴中に半導体ダイを浸漬し、半導体ダイに、約0.1ASD(10A/m2)から約0.5ASD(50A/m2)の電気メッキ電流密度を印加する。
【選択図】図17
Description
定義
本開示を記載し、特許請求の範囲を作成する上で、下記に述べられた定義にしたがって、以下の用語法が使用される。
KAg(CN)2 → K+ + Ag+ + 2CN-
KAu(CN)2 → K+ + Au+ + 2CN-
K2Pd(CN)4 → 2K+ + Pd2+ + 4CN-
図16に示されたアノード111は白金電極を含み、そこで生じる反応は:
2H2O → 4H+ + O2(g) + 4e-
であり得る。
実施の形態1は、Xが約0.01から約0.1の範囲にある、Ag1-xAux合金バンプ体101を有する、図3に示された半導体構造20を製造する方法を提供する。半導体構造20の製造に採用された操作は、本開示に先に論じられたように、図13、14、15、16、17および18を参照することができる。図13において、UBM層104がパッシベーション層103および導体パッド102の一部分の上に形成されており、これらの層はデバイス100上に形成されている。実施の形態1において、デバイス100は半導体ダイを含む。図14において、UBM層104上にシード層105が形成されている。図15において、シード層105上に第1のマスク層109のパターンが形成されており、第1のマスク層109にいくつかの開口109Aが画成されている。実施の形態1において、開口109Aは導体パッド102上に位置している。図16は、電気メッキ操作による第1のマスク層109内の銀合金バンプ体101の形成を示している。
実施の形態2は、Xが約0.01から約0.1の範囲にある、Ag1-xPdx合金バンプ体101を有する、図3に示された半導体構造20を製造する方法を提供する。半導体構造20の製造に採用された操作は、本開示に先に論じられたように、図13、14、15、16、17および18を参照することができる。第1のシアン化物系浴の含有量を除いて、実施の形態2における他の製造操作は、実施の形態1に記載されたものを参照することができる。
実施の形態3は、Xが約0.01から約0.1の範囲にある、Ag1-x(AuPd)x合金バンプ体101を有する、図3に示された半導体構造20を製造する方法を提供する。半導体構造20の製造に採用された操作は、本開示に先に論じられたように、図13、14、15、16、17および18を参照することができる。第1のシアン化物系浴の含有量を除いて、実施の形態3における他の製造操作は、実施の形態1および2に記載されたものを参照することができる。
実施の形態4は、Xが約0.01から約0.1の範囲にある、Ag1-xAux、Ag1-xPdx、またはAg1-x(AuPd)x合金バンプ体101、およびその銀合金バンプ体101の上面のみにある金属層107を有する、図6に示された多層バンプ構造40を製造する方法を提供する。多層バンプ構造40の製造に採用された操作は、本開示に先に論じられたように、図13、14、15、16、17、19および20を参照することができる。図13において、UBM層104がパッシベーション層103および導体パッド102の一部分の上に形成されており、これらの層はデバイス100上に形成されている。実施の形態4において、デバイス100は半導体ダイを含む。図14において、UBM層104上にシード層105が形成されている。図15において、シード層105上に第1のマスク層109のパターンが形成されており、第1のマスク層109にいくつかの開口109Aが画成されている。実施の形態4において、開口109Aは導体パッド102上に位置している。図16は、電気メッキ操作による第1のマスク層109内の銀合金バンプ体101の形成を示している。
実施の形態5は、Xが約0.01から約0.1の範囲にある、Ag1-xAux、Ag1-xPdx、またはAg1-x(AuPd)x合金バンプ体101、およびその銀合金バンプ体101の上面だけでなく側壁にある金属層107を有する、多層バンプ構造を製造する方法を提供する。多層バンプ構造の製造に採用された操作は、本開示に先に論じられたように、図13、14、15、16、17、21、22、23、24および26を参照することができる。図13において、UBM層104がパッシベーション層103および導体パッド102の一部分の上に形成されており、これらの層はデバイス100上に形成されている。実施の形態5において、デバイス100は半導体ダイを含む。図14において、UBM層104上にシード層105が形成されている。図15において、シード層105上に第1のマスク層109のパターンが形成されており、第1のマスク層109にいくつかの開口109Aが画成されている。実施の形態5において、開口109Aは導体パッド102上に位置している。図16は、電気メッキ操作による第1のマスク層109内の銀合金バンプ体101の形成を示している。
実施の形態6は、Xが約0.01から約0.1の範囲にある、Ag1-xAux、Ag1-xPdx、またはAg1-x(AuPd)x合金バンプ体101、およびその銀合金バンプ体101の上面だけでなく側壁にある金属層107を有する、多層バンプ構造において金属層107を製造する無電界メッキ方法を提供する。多層バンプ構造の製造に採用された操作は、本開示に先に論じられたように、図13、14、15、16、17、25および26を参照することができる。図13において、UBM層104がパッシベーション層103および導体パッド102の一部分の上に形成されており、これらの層はデバイス100上に形成されている。実施の形態6において、デバイス100は半導体ダイを含む。図14において、UBM層104上にシード層105が形成されている。図15において、シード層105上に第1のマスク層109のパターンが形成されており、第1のマスク層109にいくつかの開口109Aが画成されている。実施の形態6において、開口109Aは導体パッド102上に位置している。図16は、電気メッキ操作による第1のマスク層109内の銀合金バンプ体101の形成を示している。
30,50,60 チップオンフィルム(COF)半導体構造
40 多層バンプ構造
70,80,90 チップオンガラス(COG)半導体構造
100 デバイス
101 銀合金バンプ体
102 導体パッド
103 パッシベーション層
104 バンプ下地金属(UBM)層
105 シード層
111 アノード
112 カソード
113 電気メッキ浴
115 無電界メッキ浴
301 フレキシブルフィルム
302 導電層
304 封止剤
306,308 はんだ層
401 ガラス基板
Claims (20)
- 半導体構造を製造する方法において、
半導体ダイ上に導体パッドを形成する工程、
前記導体パッド上にシード層を形成する工程、
前記シード層上に第1のマスク層を画成する工程、および
前記第1のマスク層内に銀合金バンプ体を形成する工程であって、
第1のシアン化物系浴を調製する工程と、
前記第1のシアン化物系浴のpH値を、6から8の範囲内に制御する工程と、
前記第1のシアン化物系浴中に半導体ダイを浸漬する工程と、
厚さが9μmから15μmの前記銀合金バンプ体が得られるまで、前記半導体ダイに、0.1ASD(10A/m2)から0.5ASD(50A/m2)の電気メッキ電流密度を印加する工程と、
を含む工程、
を有してなり、
前記第1のシアン化物系浴を調製する工程は、KAg(CN)2およびその塩を前記第1のシアン化物系浴に導入する工程を含むことを特徴とする方法。 - 前記第1のシアン化物系浴を調製する工程は、KAu(CN)2およびその塩を前記第1のシアン化物系浴に導入する工程を含む、請求項1記載の方法。
- 前記KAu(CN)2およびその塩を第1のシアン化物系浴に導入する工程は、KAu(CN)2の量を、前記第1のシアン化物系浴中に添加される塩の合計において、10質量%から60質量%の範囲内に制御する工程を含む、請求項2記載の方法。
- 前記第1のシアン化物系浴を調製する工程は、2ml/Lから5ml/Lの濃度を有するシュウ酸イオンおよびその塩を、前記第1のシアン化物系浴に導入する工程を含む、請求項1記載の方法。
- 前記第1のシアン化物系浴を調製する工程は、K2Pd(CN)4およびその塩を前記第1のシアン化物系浴に導入する工程をさらに含む、請求項1記載の方法。
- 前記K2Pd(CN)4およびその塩を第1のシアン化物系浴に導入する工程は、K2Pd(CN)4の量を、前記第1のシアン化物系浴中に添加される塩の合計において、10質量%から30質量%の範囲内に制御する工程を含む、請求項5記載の方法。
- 前記銀合金バンプ体を200から300℃の温度で焼き鈍す工程をさらに含む、請求項1記載の方法。
- 前記銀合金バンプ体を焼き鈍す工程が30から60分の期間を含む、請求項7記載の方法。
- 前記第1のシアン化物系浴の温度を40から50℃の範囲内に制御する工程をさらに含む、請求項1記載の方法。
- 半導体構造を製造する方法において、
半導体ダイ上に導体パッドを形成する工程、
前記導体パッド上にシード層を形成する工程、
前記シード層上に第1のマスク層を画成する工程、
前記第1のマスク層内に、0.4μmから1.1μmの範囲内の粒径を含む銀合金バンプ体を形成する工程であって、
第1のシアン化物系浴を調製する工程と、
前記第1のシアン化物系浴のpH値を、6から8の範囲内に制御する工程と、
前記第1のシアン化物系浴中に半導体ダイを浸漬する工程と、
前記半導体ダイに、0.1ASD(10A/m2)から0.5ASD(50A/m2)の電気メッキ電流密度を印加する工程と、
を含む工程、および
前記銀合金バンプ体の上面に金属層を形成する工程、
を有してなり、
前記銀合金バンプ体の上面に前記金属層を形成する前記工程において、前記半導体ダイが、KAu(CN)2を含む第2のシアン化物系浴中に浸漬される
ことを特徴とする方法。 - 前記第1のシアン化物系浴を調製する前記工程が、KAg(CN)2、KAu(CN)2およびK2Pd(CN)4の内の少なくとも1つを含む、40から50℃の溶液を調整する工程を含むことを特徴とする請求項10記載の方法。
- 前記銀合金バンプ体をフレキシブルフィルムに接合する工程をさらに含むことを特徴とする請求項10記載の方法。
- 前記銀合金バンプ体をフレキシブルフィルムに接合する前記工程が、前記銀合金バンプ体と前記フレキシブルフィルム上のはんだ層との間の接合部をSu−Ag共融温度以上に制御する工程を含む、請求項12記載の方法。
- 前記銀合金バンプ体をガラス基板に接合する工程をさらに含むことを特徴とする請求項10記載の方法。
- 前記銀合金バンプ体をガラス基板に接合する前記工程が、前記銀合金バンプ体と前記ガラス基板との間に異方性導電膜(ACF)を施す工程を含む、請求項14記載の方法。
- 前記銀合金バンプ体の上面に前記金属層を形成する前記工程が、電気メッキ操作または無電界メッキ操作を行う工程を含むことを特徴とする請求項10記載の方法。
- 前記無電界メッキ操作のための浴の温度が、80から90℃の範囲内にあることを特徴とする請求項16記載の方法。
- 前記第1のシアン化物系浴を調製する工程は、2ml/Lから5ml/Lの濃度を有するシュウ酸イオンおよびその塩を、前記第1のシアン化物系浴に導入する工程を含む、請求項10記載の方法。
- 半導体構造を製造する方法において、
半導体ダイ上に導体パッドを形成する工程、
前記導体パッド上にシード層を形成する工程、
前記シード層上に第1のマスク層を画成する工程、
前記第1のマスク層内に銀合金バンプ体を形成する工程であって、
第1のシアン化物系浴を調製する工程と、
前記第1のシアン化物系浴のpH値を、6から8の範囲内に制御する工程と、
前記第1のシアン化物系浴中に半導体ダイを浸漬する工程と、
前記半導体ダイに、0.1ASD(10A/m2)から0.5ASD(50A/m2)の電気メッキ電流密度を印加する工程と、
を含む工程、および
電気メッキ操作または無電界メッキ操作により、前記銀合金バンプ体の上面と側壁を覆う金属層を形成する工程、
を有してなり、
前記電気メッキ操作または前記無電界メッキ操作は、前記半導体ダイを、KAu(CN)2を含むメッキ浴中に浸漬する処理を含み、
前記銀合金バンプ体の粒径の平均値から離れた1標準偏差と、前記平均値との差が、0.2μmから0.4μmの範囲内であることを特徴とする方法。 - 前記銀合金バンプ体の上面と側壁を覆う前記金属層を形成する前記工程が、
前記シード層上に削減された第1のマスク層を形成する工程、および
前記削減された第1のマスク層内に前記金属層を形成する工程、
を含む、請求項19記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/078,240 US8877630B1 (en) | 2013-11-12 | 2013-11-12 | Semiconductor structure having a silver alloy bump body and manufacturing method thereof |
US14/078,240 | 2013-11-12 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014005798A Division JP2022008700A (ja) | 2013-11-12 | 2014-01-16 | 半導体構造およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2015195382A true JP2015195382A (ja) | 2015-11-05 |
JP6149306B2 JP6149306B2 (ja) | 2017-06-21 |
Family
ID=49639774
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014005798A Pending JP2022008700A (ja) | 2013-11-12 | 2014-01-16 | 半導体構造およびその製造方法 |
JP2015098864A Active JP6149306B2 (ja) | 2013-11-12 | 2015-05-14 | 半導体構造およびその製造方法 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014005798A Pending JP2022008700A (ja) | 2013-11-12 | 2014-01-16 | 半導体構造およびその製造方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US8877630B1 (ja) |
EP (1) | EP2879169B1 (ja) |
JP (2) | JP2022008700A (ja) |
KR (1) | KR101545402B1 (ja) |
CN (1) | CN104099653B (ja) |
TW (1) | TWI462204B (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7391692B2 (ja) | 2020-02-05 | 2023-12-05 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20150171039A1 (en) * | 2013-12-13 | 2015-06-18 | Chipmos Technologies Inc. | Redistribution layer alloy structure and manufacturing method thereof |
CN112981482B (zh) * | 2021-02-02 | 2022-05-13 | 无锡华友微电子有限公司 | 一种在半导体晶圆上电镀导电材质的方法 |
CN113337860B (zh) * | 2021-08-02 | 2021-11-09 | 华芯半导体研究院(北京)有限公司 | 在芯片晶圆表面进行电镀的方法及其应用 |
CN117238781B (zh) * | 2023-11-16 | 2024-02-23 | 江苏芯德半导体科技有限公司 | 一种晶圆级超薄四边无引脚芯片封装方法及芯片封装结构 |
CN117542818B (zh) * | 2024-01-10 | 2024-04-05 | 深圳市联合蓝海应用材料科技股份有限公司 | 一种金银合金凸块及其制备方法和应用 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06184789A (ja) * | 1992-12-22 | 1994-07-05 | Asahi Glass Co Ltd | 耐酸化性金属部材、メッキ液、及び回路装置 |
JP2004193457A (ja) * | 2002-12-13 | 2004-07-08 | Nec Kansai Ltd | 二層バンプの形成方法 |
JP2004288855A (ja) * | 2003-03-20 | 2004-10-14 | Rohm Co Ltd | 半導体装置 |
JP2005123247A (ja) * | 2003-10-14 | 2005-05-12 | Seiko Epson Corp | 半導体装置及びその製造方法 |
JP2009071093A (ja) * | 2007-09-14 | 2009-04-02 | Ne Chemcat Corp | バンプ及びバンプ形成方法 |
JP2013036072A (ja) * | 2011-08-05 | 2013-02-21 | Furukawa Electric Co Ltd:The | 可動接点部品用被覆複合材および可動接点部品、スイッチならびにその製造方法 |
Family Cites Families (39)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3466233A (en) * | 1967-05-23 | 1969-09-09 | Engelhard Ind Inc | Gold plating |
DE2121150C3 (de) * | 1971-04-24 | 1980-08-21 | Schering Ag, 1000 Berlin Und 4619 Bergkamen | Verfahren zur galvanischen Abscheidung von Goldlegierungen |
US4121982A (en) * | 1978-02-03 | 1978-10-24 | American Chemical & Refining Company Incorporated | Gold alloy plating bath and method |
JPS5824509B2 (ja) * | 1980-05-08 | 1983-05-21 | 日本鉱業株式会社 | 銀パラジウム合金メツキ液及び銀パラジウム合金メツキ方法 |
JPS58176969A (ja) * | 1982-04-09 | 1983-10-17 | Toshiba Corp | 半導体装置 |
DE4406419C1 (de) * | 1994-02-28 | 1995-04-13 | Heraeus Gmbh W C | Bad zum galvanischen Abscheiden von Silber-Gold-Legierungen |
US5516412A (en) * | 1995-05-16 | 1996-05-14 | International Business Machines Corporation | Vertical paddle plating cell |
JP3285294B2 (ja) | 1995-08-08 | 2002-05-27 | 太陽誘電株式会社 | 回路モジュールの製造方法 |
US6040702A (en) * | 1997-07-03 | 2000-03-21 | Micron Technology, Inc. | Carrier and system for testing bumped semiconductor components |
US5973405A (en) * | 1997-07-22 | 1999-10-26 | Dytak Corporation | Composite electrical contact structure and method for manufacturing the same |
US5965945A (en) * | 1998-11-12 | 1999-10-12 | Advanced Micro Devices, Inc. | Graded PB for C4 pump technology |
US6926796B1 (en) * | 1999-01-29 | 2005-08-09 | Matsushita Electric Industrial Co., Ltd. | Electronic parts mounting method and device therefor |
US7070687B2 (en) * | 2001-08-14 | 2006-07-04 | Intel Corporation | Apparatus and method of surface treatment for electrolytic and electroless plating of metals in integrated circuit manufacturing |
US7012333B2 (en) * | 2002-12-26 | 2006-03-14 | Ebara Corporation | Lead free bump and method of forming the same |
JP4758614B2 (ja) * | 2003-04-07 | 2011-08-31 | ローム・アンド・ハース・エレクトロニック・マテリアルズ,エル.エル.シー. | 電気めっき組成物および方法 |
US20050092611A1 (en) * | 2003-11-03 | 2005-05-05 | Semitool, Inc. | Bath and method for high rate copper deposition |
US7713859B2 (en) * | 2005-08-15 | 2010-05-11 | Enthone Inc. | Tin-silver solder bumping in electronics manufacture |
US7397121B2 (en) * | 2005-10-28 | 2008-07-08 | Megica Corporation | Semiconductor chip with post-passivation scheme formed over passivation layer |
EP1783548B1 (en) * | 2005-11-08 | 2017-03-08 | Rohm and Haas Electronic Materials LLC | Method of forming a patterned layer on a substrate |
JP2007142271A (ja) * | 2005-11-21 | 2007-06-07 | Tanaka Electronics Ind Co Ltd | バンプ材料および接合構造 |
US20070114663A1 (en) * | 2005-11-23 | 2007-05-24 | Brown Derrick L | Alloys for flip chip interconnects and bumps |
TWI287846B (en) | 2006-03-17 | 2007-10-01 | Advanced Semiconductor Eng | Method for forming metal bumps |
KR100744149B1 (ko) * | 2006-08-30 | 2007-08-01 | 삼성전자주식회사 | 은 범프를 이용한 반도체 패키지 구조 및 형성 방법 |
JP4881129B2 (ja) * | 2006-11-07 | 2012-02-22 | メタローテクノロジーズジャパン株式会社 | 金バンプ又は金配線形成用非シアン系電解金めっき浴 |
US20080128019A1 (en) * | 2006-12-01 | 2008-06-05 | Applied Materials, Inc. | Method of metallizing a solar cell substrate |
US8193636B2 (en) * | 2007-03-13 | 2012-06-05 | Megica Corporation | Chip assembly with interconnection by metal bump |
US7919859B2 (en) * | 2007-03-23 | 2011-04-05 | Intel Corporation | Copper die bumps with electromigration cap and plated solder |
SG148056A1 (en) * | 2007-05-17 | 2008-12-31 | Micron Technology Inc | Integrated circuit packages, methods of forming integrated circuit packages, and methods of assembling intgrated circuit packages |
EP2221396A1 (en) * | 2008-12-31 | 2010-08-25 | Rohm and Haas Electronic Materials LLC | Lead-Free Tin Alloy Electroplating Compositions and Methods |
US8193555B2 (en) * | 2009-02-11 | 2012-06-05 | Megica Corporation | Image and light sensor chip packages |
US8153905B2 (en) * | 2009-02-27 | 2012-04-10 | Ibiden Co., Ltd. | Method for manufacturing printed wiring board and printed wiring board |
US8318596B2 (en) * | 2010-02-11 | 2012-11-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Pillar structure having a non-planar surface for semiconductor devices |
CN102376863A (zh) * | 2010-08-06 | 2012-03-14 | 晶元光电股份有限公司 | 发光元件的制造方法 |
JP2012038965A (ja) * | 2010-08-09 | 2012-02-23 | Lapis Semiconductor Co Ltd | 半導体装置及びその製造方法 |
US9404194B2 (en) * | 2010-12-01 | 2016-08-02 | Novellus Systems, Inc. | Electroplating apparatus and process for wafer level packaging |
US20120325671A2 (en) * | 2010-12-17 | 2012-12-27 | Tel Nexx, Inc. | Electroplated lead-free bump deposition |
CN102851719B (zh) * | 2011-06-29 | 2016-01-27 | 比亚迪股份有限公司 | 一种锆基非晶合金复合材料及其制备方法 |
US8888984B2 (en) * | 2012-02-09 | 2014-11-18 | Rohm And Haas Electronic Materials Llc | Plating bath and method |
US8980077B2 (en) * | 2012-03-30 | 2015-03-17 | Rohm And Haas Electronic Materials Llc | Plating bath and method |
-
2013
- 2013-11-12 US US14/078,240 patent/US8877630B1/en active Active
- 2013-11-22 TW TW102142573A patent/TWI462204B/zh active
- 2013-11-25 EP EP13194234.4A patent/EP2879169B1/en active Active
- 2013-11-29 KR KR1020130147555A patent/KR101545402B1/ko active IP Right Grant
- 2013-12-11 CN CN201310680470.2A patent/CN104099653B/zh active Active
-
2014
- 2014-01-16 JP JP2014005798A patent/JP2022008700A/ja active Pending
-
2015
- 2015-05-14 JP JP2015098864A patent/JP6149306B2/ja active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06184789A (ja) * | 1992-12-22 | 1994-07-05 | Asahi Glass Co Ltd | 耐酸化性金属部材、メッキ液、及び回路装置 |
JP2004193457A (ja) * | 2002-12-13 | 2004-07-08 | Nec Kansai Ltd | 二層バンプの形成方法 |
JP2004288855A (ja) * | 2003-03-20 | 2004-10-14 | Rohm Co Ltd | 半導体装置 |
JP2005123247A (ja) * | 2003-10-14 | 2005-05-12 | Seiko Epson Corp | 半導体装置及びその製造方法 |
JP2009071093A (ja) * | 2007-09-14 | 2009-04-02 | Ne Chemcat Corp | バンプ及びバンプ形成方法 |
JP2013036072A (ja) * | 2011-08-05 | 2013-02-21 | Furukawa Electric Co Ltd:The | 可動接点部品用被覆複合材および可動接点部品、スイッチならびにその製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7391692B2 (ja) | 2020-02-05 | 2023-12-05 | 新光電気工業株式会社 | 配線基板及び配線基板の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US8877630B1 (en) | 2014-11-04 |
KR101545402B1 (ko) | 2015-08-18 |
KR20150054607A (ko) | 2015-05-20 |
TW201444004A (zh) | 2014-11-16 |
CN104099653B (zh) | 2015-10-28 |
EP2879169A3 (en) | 2015-08-26 |
CN104099653A (zh) | 2014-10-15 |
TWI462204B (zh) | 2014-11-21 |
JP6149306B2 (ja) | 2017-06-21 |
JP2022008700A (ja) | 2022-01-14 |
EP2879169A2 (en) | 2015-06-03 |
EP2879169B1 (en) | 2019-10-23 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5636122B1 (ja) | 半導体構造およびその製造方法 | |
JP6149306B2 (ja) | 半導体構造およびその製造方法 | |
TWI532131B (zh) | 半導體結構及其製造方法 | |
US10249588B2 (en) | Designs and methods for conductive bumps | |
US8497200B2 (en) | Method to form solder alloy deposits on substrates | |
US8957323B2 (en) | Electrical connecting element having nano-twinned copper, method of fabricating the same, and electrical connecting structure comprising the same | |
TWI476878B (zh) | 包含有具優選方向成長之CuSn晶粒之電性連接結構及其製備方法 | |
US9721913B2 (en) | Semiconductor package and method of manufacturing thereof | |
KR20040011628A (ko) | 전기도금법에 의한 반도체 소자의 플립칩 접속용 ubm의형성방법 | |
US20060011482A1 (en) | Electrocodeposition of lead free tin alloys | |
JP2010040691A (ja) | 鉛フリーバンプ形成方法 | |
TWI482231B (zh) | 具有奈米雙晶銅之電性連接體、其製備方法、以及包含其之電性連接結構 | |
CN117542818B (zh) | 一种金银合金凸块及其制备方法和应用 | |
KR101693609B1 (ko) | 필러범프제조방법 및 이를 이용하여 제조된 필러범프 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20160520 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20160628 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160926 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20170221 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20170322 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20170428 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6149306 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |