JP2013538460A5 - - Google Patents

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Publication number
JP2013538460A5
JP2013538460A5 JP2013528332A JP2013528332A JP2013538460A5 JP 2013538460 A5 JP2013538460 A5 JP 2013538460A5 JP 2013528332 A JP2013528332 A JP 2013528332A JP 2013528332 A JP2013528332 A JP 2013528332A JP 2013538460 A5 JP2013538460 A5 JP 2013538460A5
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JP
Japan
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conductive
semiconductor chip
layer
tsvs
conductor
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JP2013528332A
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Japanese (ja)
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JP6013336B2 (ja
JP2013538460A (ja
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Priority claimed from US12/878,542 external-priority patent/US9437561B2/en
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Publication of JP2013538460A5 publication Critical patent/JP2013538460A5/ja
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JP2013528332A 2010-09-09 2011-09-09 冗長シリコン貫通ビアを伴う半導体チップ Active JP6013336B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/878,542 US9437561B2 (en) 2010-09-09 2010-09-09 Semiconductor chip with redundant thru-silicon-vias
US12/878,542 2010-09-09
PCT/US2011/051027 WO2012034034A1 (en) 2010-09-09 2011-09-09 Semiconductor chip with redundant thru-silicon-vias

Publications (3)

Publication Number Publication Date
JP2013538460A JP2013538460A (ja) 2013-10-10
JP2013538460A5 true JP2013538460A5 (enExample) 2014-10-30
JP6013336B2 JP6013336B2 (ja) 2016-10-25

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JP2013528332A Active JP6013336B2 (ja) 2010-09-09 2011-09-09 冗長シリコン貫通ビアを伴う半導体チップ

Country Status (5)

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US (3) US9437561B2 (enExample)
EP (1) EP2614523B1 (enExample)
JP (1) JP6013336B2 (enExample)
KR (1) KR101850121B1 (enExample)
WO (1) WO2012034034A1 (enExample)

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US9515017B2 (en) * 2014-12-18 2016-12-06 Intel Corporation Ground via clustering for crosstalk mitigation
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WO2018125069A1 (en) * 2016-12-28 2018-07-05 Intel Corporation Methods of forming substrate interconnect structures for enhanced thin seed conduction
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US11121301B1 (en) 2017-06-19 2021-09-14 Rigetti & Co, Inc. Microwave integrated quantum circuits with cap wafers and their methods of manufacture
KR102019355B1 (ko) 2017-11-01 2019-09-09 삼성전자주식회사 반도체 패키지
KR102498883B1 (ko) 2018-01-31 2023-02-13 삼성전자주식회사 전류를 분산시키는 관통 전극들을 포함하는 반도체 장치
TWI705547B (zh) * 2019-03-12 2020-09-21 力成科技股份有限公司 晶片封裝結構及其製造方法
US11804479B2 (en) * 2019-09-27 2023-10-31 Advanced Micro Devices, Inc. Scheme for enabling die reuse in 3D stacked products
KR20210071539A (ko) 2019-12-06 2021-06-16 삼성전자주식회사 인터포저, 반도체 패키지, 및 인터포저의 제조 방법
US11515173B2 (en) * 2019-12-27 2022-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices and methods of manufacturing
CN113053758A (zh) 2019-12-27 2021-06-29 台湾积体电路制造股份有限公司 半导体器件的制造方法
TWI773360B (zh) * 2021-06-03 2022-08-01 矽品精密工業股份有限公司 電子封裝件及其承載結構與製法
US11955417B2 (en) 2021-12-14 2024-04-09 Industrial Technology Research Institute Electronic device having substrate with electrically floating vias
US12292603B2 (en) 2022-09-19 2025-05-06 Globalfoundries U.S. Inc. PIC structure with wire(s) between z-stop supports on side of optical device attach cavity

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