JP2013084740A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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Abstract
【解決手段】第2トランジスタ170のゲート電極171を半導体基板1に対するマスクとして半導体基板1へイオン注入を行うことにより、第2トランジスタのドレイン175を形成するとともに、第2トランジスタ170のゲート電極171へイオン注入を行う。
【選択図】図7
Description
集光膜430は、層内レンズ450の屈折率よりも低い屈折率を有する。これにより、層内レンズ450から集光膜430に斜めに入射した光を集光膜430内での屈折により、導光部材420に向けて集光することができる。典型的な集光膜430は酸化シリコン層を含む。集光膜は、酸化シリコン層と導光部材420の間に、酸化シリコン層と導光部材420との間の屈折率を有する中間屈折率層を有することが好ましい。集光膜430は、酸化シリコン層と層内レンズとの間に、酸化シリコン層と層内レンズ450の間の屈折率を有する中間屈折率層を有することが好ましい。これら集光膜430の中間屈折率層は、酸化シリコン層と導光部材420あるいは酸化シリコン層と層内レンズ450との間の反射を抑制することができる。導光部材420や層内レンズ450が窒化シリコンからなる場合、中間屈折率層は酸窒化シリコンからなることが好ましい。中間屈折率層は酸化シリコン層よりも薄いことが好ましい。
120 転送ゲート
121 転送ゲート電極
130 信号生成部
132 増幅トランジスタ(第1トランジスタ)
1320 増幅ゲート電極
133 リセットトランジスタ(第1トランジスタ)
1330 リセットゲート電極
1332 ドレイン
135 第5半導体領域
140 信号処理部
170 第2トランジスタ
173 サイドウォールスペーサ
180 第3トランジスタ
200A 第1部材
200B 第1部材
200C 第1部材
207 第2部材
1 半導体基板
21 ポリシリコン膜
20 絶縁膜
Claims (11)
- 第1トランジスタと、第2トランジスタと、を備える半導体装置の製造方法であって、
半導体基板を覆うポリシリコン膜の上に設けられた絶縁膜をパターニングすることにより、前記ポリシリコン膜の上に前記絶縁膜から第1部材および第2部材を形成する第1工程と、
前記第1部材をマスクとして前記ポリシリコン膜をパターニングすることにより、前記ポリシリコン膜から前記第1トランジスタのゲート電極を形成し、前記第2部材をマスクとして前記ポリシリコン膜をパターニングすることにより、前記ポリシリコン膜から前記第2トランジスタのゲート電極を形成する第2工程と、
前記第1部材を前記第1トランジスタの前記ゲート電極に対するマスクとし、前記第1トランジスタの前記ゲート電極を前記半導体基板に対するマスクとして、前記半導体基板へイオン注入を行うことにより、前記第1トランジスタのドレインを形成する第3工程と、
前記第2部材を薄くする第4工程と、
前記第4工程の後に、前記第2トランジスタのゲート電極を前記半導体基板に対するマスクとして前記半導体基板へイオン注入を行うことにより、前記第2トランジスタのドレインを形成するとともに、前記第2トランジスタの前記ゲート電極の不純物濃度が、前記第1トランジスタの前記ゲート電極の不純物濃度と異なるように、前記第2トランジスタの前記ゲート電極へイオン注入を行う第5工程を有することを特徴とする半導体装置の製造方法。 - 前記第5工程における前記イオン注入により、前記第2トランジスタの前記ゲート電極の不純物濃度を前記第1トランジスタの前記ゲート電極の不純物濃度の3/2倍以上にする、請求項1に記載の半導体装置の製造方法。
- 前記第1工程は、前記ポリシリコン膜へ不純物を導入する段階と、前記不純物が導入された前記ポリシリコン膜の上に前記絶縁膜を形成する段階と、を含む、請求項1または2に記載の半導体装置の製造方法。
- 前記第5工程の後に、前記第2トランジスタの前記ゲート電極の上面と前記第2トランジスタのドレインの表面の少なくとも一方をシリサイド化する第6工程を有する、請求項1乃至3のいずれか一項に記載の半導体装置の製造方法。
- 前記第4工程の前に、前記第2トランジスタの前記ゲート電極をマスクとして前記半導体基板へイオン注入を行うことにより、前記第2トランジスタの前記ドレインの低濃度部を形成し、
前記第4工程において、前記第2部材を薄くすると同時に、前記第2トランジスタのサイドウォールスペーサを形成し、
前記第5工程において、前記サイドウォールスペーサおよび前記第2トランジスタの前記ゲート電極を前記半導体基板に対するマスクとして前記半導体基板へイオン注入を行うことにより、前記第2トランジスタの前記ドレインの前記低濃度部より高い不純物濃度を有する高濃度部を形成する、請求項1乃至4のいずれか一項に記載の半導体装置の製造方法。 - 前記第2トランジスタと反対導電型の第3トランジスタを含む半導体装置の製造方法であって、
前記第2工程において、前記第2部材をマスクとして前記ポリシリコン膜をパターニングすることにより、前記第3トランジスタのゲート電極と前記第2トランジスタの前記ゲート電極とを一体的に形成する、請求項1乃至5のいずれか一項に記載の半導体装置の製造方法。 - 前記第1部材に接するとともに前記第1トランジスタの前記ゲート電極に接続するコンタクトプラグを形成する段階と、前記第2トランジスタの前記ゲート電極に接続するコンタクトプラグを形成する段階と、を含む第7工程を有する、請求項1乃至6のいずれか一項に記載の半導体装置の製造方法。
- 前記半導体装置は、光電変換部と、前記光電変換部で生じた信号電荷に基づく電気信号を生成する信号生成部と、前記電気信号を処理する信号処理部と、を備え、前記信号生成部が前記第1トランジスタを含み、前記信号処理部が前記第2トランジスタを含む、請求項1乃至7のいずれか一項に記載の半導体装置の製造方法。
- 下記の要件(a)および(b)の少なくとも一方を満たす、請求項8に記載の半導体装置の製造方法。
(a)前記第1トランジスタは、前記信号電荷の量に応じたゲート電圧が加わる増幅トランジスタである。
(b)前記第1トランジスタは、前記電気信号の量に応じたゲート電圧が加わる増幅トランジスタの前記ゲート電圧をリセットするリセットトランジスタであり、前記第2トランジスタは、前記リセットトランジスタの前記ゲート電圧よりも振幅の小さい電圧信号及び/又は周波数の高い電圧信号が印加されるゲートを有する。 - 前記半導体装置は、光電変換部と、前記光電変換部で生じた信号電荷に基づく電気信号を生成する信号生成部と、前記信号電荷を前記光電変換部から前記信号生成部へ転送する転送ゲートと、前記電気信号を処理する信号処理部と、を備え、
前記転送ゲートが前記第1トランジスタのゲートであり、前記光電変換部が前記第1トランジスタのソースであり、前記信号生成部の半導体領域が前記第1トランジスタのドレインであり、前記信号処理部が前記第2トランジスタを含む、請求項1乃至7のいずれか一項に記載の半導体装置の製造方法。 - 前記第1工程の前に、前記光電変換部の、前記信号電荷と同極性の電荷を多数キャリアとする半導体領域を形成する工程を有し、前記第4工程を前記第3工程の後に行う、請求項9乃至10のいずれか一項に記載の半導体装置の製造方法。
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