JP2012124282A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2012124282A JP2012124282A JP2010272916A JP2010272916A JP2012124282A JP 2012124282 A JP2012124282 A JP 2012124282A JP 2010272916 A JP2010272916 A JP 2010272916A JP 2010272916 A JP2010272916 A JP 2010272916A JP 2012124282 A JP2012124282 A JP 2012124282A
- Authority
- JP
- Japan
- Prior art keywords
- frequency
- semiconductor chip
- terminal
- semiconductor device
- matching circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 170
- 239000003990 capacitor Substances 0.000 claims abstract description 89
- 238000009499 grossing Methods 0.000 claims abstract description 36
- 239000000758 substrate Substances 0.000 claims description 35
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 4
- 229910002704 AlGaN Inorganic materials 0.000 claims description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 2
- 229910003460 diamond Inorganic materials 0.000 claims description 2
- 239000010432 diamond Substances 0.000 claims description 2
- 229910052594 sapphire Inorganic materials 0.000 claims description 2
- 239000010980 sapphire Substances 0.000 claims description 2
- 229910052751 metal Inorganic materials 0.000 description 38
- 239000002184 metal Substances 0.000 description 38
- 229910002601 GaN Inorganic materials 0.000 description 16
- 239000004020 conductor Substances 0.000 description 16
- 150000004767 nitrides Chemical class 0.000 description 16
- 150000001875 compounds Chemical class 0.000 description 15
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 13
- 238000012986 modification Methods 0.000 description 12
- 230000004048 modification Effects 0.000 description 12
- 238000010586 diagram Methods 0.000 description 11
- 240000004050 Pentaglottis sempervirens Species 0.000 description 4
- 235000004522 Pentaglottis sempervirens Nutrition 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 238000004088 simulation Methods 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 229910000927 Ge alloy Inorganic materials 0.000 description 2
- 229910001182 Mo alloy Inorganic materials 0.000 description 2
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 2
- 229910001128 Sn alloy Inorganic materials 0.000 description 2
- BYDQGSVXQDOSJJ-UHFFFAOYSA-N [Ge].[Au] Chemical compound [Ge].[Au] BYDQGSVXQDOSJJ-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- WUUZKBJEUBFVMV-UHFFFAOYSA-N copper molybdenum Chemical compound [Cu].[Mo] WUUZKBJEUBFVMV-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- JVPLOXQKFGYFMN-UHFFFAOYSA-N gold tin Chemical compound [Sn].[Au] JVPLOXQKFGYFMN-UHFFFAOYSA-N 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 229910052750 molybdenum Inorganic materials 0.000 description 2
- 239000011733 molybdenum Substances 0.000 description 2
- -1 nitride compound Chemical class 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 230000005533 two-dimensional electron gas Effects 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910001252 Pd alloy Inorganic materials 0.000 description 1
- 229910001260 Pt alloy Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000691 measurement method Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 241000894007 species Species 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
- H01L23/043—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
- H01L23/047—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body the other leads being parallel to the base
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/642—Capacitive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6611—Wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6644—Packaging aspects of high-frequency amplifiers
- H01L2223/665—Bias feed arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6644—Packaging aspects of high-frequency amplifiers
- H01L2223/6655—Matching arrangements, e.g. arrangement of inductive and capacitive components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6666—High-frequency adaptations for passive devices for decoupling, e.g. bypass capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6688—Mixed frequency adaptations, i.e. for operation at different frequencies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41758—Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
- H01L29/812—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12032—Schottky diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13051—Heterojunction bipolar transistor [HBT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13062—Junction field-effect transistor [JFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13063—Metal-Semiconductor Field-Effect Transistor [MESFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13064—High Electron Mobility Transistor [HEMT, HFET [heterostructure FET], MODFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/146—Mixed devices
- H01L2924/1461—MEMS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/163—Connection portion, e.g. seal
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/163—Connection portion, e.g. seal
- H01L2924/164—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
- Microwave Amplifiers (AREA)
- Amplifiers (AREA)
Abstract
【解決手段】高周波半導体チップと、高周波半導体チップの入力側に配置された入力整合回路と、高周波半導体チップの出力側に配置された出力整合回路と、入力整合回路に接続された高周波入力端子と、出力整合回路に接続された高周波出力端子と、高周波半導体チップに接続される平滑化キャパシタ用端子とを備え、高周波半導体チップと、入力整合回路と、出力整合回路とが1つのパッケージに収納された半導体装置。
【選択図】図2
Description
(パッケージ構造)
実施の形態に係る半導体装置1を搭載するパッケージの模式的鳥瞰構成であって、メタルキャップ10は図1(a)に示すように表され、メタルシールリング14aは図1(b)に示すように表され、金属壁16は図1(c)に示すように表され、導体ベースプレート200、および入力側絶縁層20a・出力側絶縁層20b・キャパシタ端子用絶縁層40b上に配置された入力ストリップライン19a・出力ストリップライン19b・キャパシタ用ストリップライン39bは図1(d)に示すように表される。
導体ベースプレート200は、例えば、モリブデン、銅モリブデン合金などの導電性金属によって形成されている。さらに、導体ベースプレート200の表面には、例えば、Au、Ni、Ag、Ag−Pt合金、Ag−Pd合金などのメッキ導体を形成してもよい。また、導体ベースプレート200には、Cu/Mo/アルミナ基板などの積層構造を用いても良い。
金属壁16の材質としては、例えば、アルミニウム、モリブデン、銅モリブデン合金などの導電性金属によって形成されている。
メタルキャップ10は、図1(a)に示すように、平板形状を備える。
―平面パターン構成―
実施の形態に係る半導体装置1の模式的平面パターン構成は図2に示すように表され、図2のI−I線に沿う模式的断面構造は図3に示すように表され、図2のII−II線に沿う模式的断面構造は図4に示すように表され、図2のIII−III線に沿う模式的断面構造は図5に示すように表される。
実施の形態に係る半導体装置1の模式的回路構成は、図6に示すように、高周波半導体チップ24と、高周波半導体チップ24の入力側に配置された入力整合回路17と、高周波半導体チップ24の出力側に配置された出力整合回路18と、入力整合回路17に接続された入力ストリップライン19aと、入力ストリップライン19aに接続された高周波入力端子21aと、出力整合回路18に接続された出力ストリップライン19bと、出力ストリップライン19bに接続された高周波出力端子21bと、高周波半導体チップ24の出力側に配置されたキャパシタ接続回路80と、キャパシタ接続回路80に接続された平滑化キャパシタ用端子41bとを備える。ここで、高周波半導体チップ24と、入力整合回路17と、出力整合回路18とが金属壁16で囲まれた1つのパッケージに収納されている。
実施の形態に係る半導体装置1に適用する高周波半導体チップ24の模式的平面パターン構成の拡大図は、図9(a)に示すように表され、図9(a)のJ部分の拡大図は、図9(b)に示すように表される。また、実施の形態に係る半導体装置1に適用する高周波半導体チップ24の構造例1〜4であって、図9(b)のIV−IV線に沿う模式的断面構造例1〜4は、それぞれ図10〜図13に示すように表される。
図9(b)のIV−IV線に沿う模式的断面構成として、実施の形態に係る半導体装置1に適用する高周波半導体チップ24のFETセルの構造例1は、図10に示すように、半絶縁性基板110と、半絶縁性基板110上に配置された窒化物系化合物半導体層112と、窒化物系化合物半導体層112上に配置されたアルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118と、アルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118上に配置されたソースフィンガー電極120、ゲートフィンガー電極124およびドレインフィンガー電極122とを備える。窒化物系化合物半導体層112とアルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118との界面には、2次元電子ガス(2DEG:Two Dimensional Electron Gas)層116が形成されている。図10に示す構造例1では、ヘテロ接合電界効果トランジスタ(HFET:Hetero-junction Field Effect Transistor)若しくは高電子移動度トランジスタ(HEMT:High Electron Mobility Transistor)が示されている。
図9(b)のIV−IV線に沿う模式的断面構成として、実施の形態に係る半導体装置1に適用する高周波半導体チップ24のFETセルの構造例2は、図11に示すように、半絶縁性基板110と、半絶縁性基板110上に配置された窒化物系化合物半導体層112と、窒化物系化合物半導体層112上に配置されたソース領域126およびドレイン領域128と、ソース領域126上に配置されたソースフィンガー電極120、窒化物系化合物半導体層112上に配置されたゲートフィンガー電極124およびドレイン領域128上に配置されたドレインフィンガー電極122とを備える。窒化物系化合物半導体層112とゲートフィンガー電極124との界面には、ショットキーコンタクト(Schottky Contact)が形成されている。図11に示す構造例2では、金属−半導体電界効果トランジスタ(MESFET:Metal Semiconductor Field Effect Transistor)が示されている。
図9(b)のIV−IV線に沿う模式的断面構成として、実施の形態に係る半導体装置1に適用する高周波半導体チップ24のFETセルの構造例3は、図12に示すように、半絶縁性基板110と、半絶縁性基板110上に配置された窒化物系化合物半導体層112と、窒化物系化合物半導体層112上に配置されたアルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118と、アルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118上に配置されたソースフィンガー電極120およびドレインフィンガー電極122と、アルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118上のリセス部に配置されたゲートフィンガー電極124とを備える。窒化物系化合物半導体層112とアルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118との界面には、2DEG層116が形成されている。図12に示す構造例3では、HFET若しくはHEMTが示されている。
図9(b)のIV−IV線に沿う模式的断面構成として、実施の形態に係る半導体装置1に適用する高周波半導体チップ24のFETセルの構造例4は、図13に示すように、半絶縁性基板110と、半絶縁性基板110上に配置された窒化物系化合物半導体層112と、窒化物系化合物半導体層112上に配置されたアルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118と、アルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118上に配置されたソースフィンガー電極120およびドレインフィンガー電極122と、アルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118上の2段リセス部に配置されたゲートフィンガー電極124とを備える。窒化物系化合物半導体層112とアルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)118との界面には、2DEG層116が形成されている。図13に示す構造例4では、HFET若しくはHEMTが示されている。
実施の形態の変形例に係る半導体装置1aを搭載するパッケージの模式的鳥瞰構成であって、メタルキャップ10は図14(a)に示すように表され、メタルシールリング14aは図14(b)に示すように表され、金属壁16は図14(c)に示すように表され、導体ベースプレート200、入力側絶縁層20a・出力側絶縁層20b・キャパシタ端子用絶縁層40b上に配置された入力ストリップライン19a・出力ストリップライン19b・キャパシタ用ストリップライン39b、および入力側絶縁層20a・出力側絶縁層20b・キャパシタ端子用絶縁層40b上に配置されるフィードスルー上層部22は図14(d)に示すように表される。
実施形態およびその変形例を説明したが、この実施形態およびその変形例は、例として提示したものであり、発明の範囲を限定することは意図していない。この新規な実施形態は、その他の様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。この実施形態やその変形は、発明の範囲や要旨に含まれるとともに、特許請求の範囲に記載された発明とその均等の範囲に含まれる。
10…メタルキャップ
11、12、14、15…ボンディングワイヤ
14a…メタルシールリング
16…金属壁
17…入力整合回路
18…出力整合回路
19a…入力ストリップライン
19b…出力ストリップライン
20a…入力側絶縁層
20b…出力側絶縁層
21a…高周波入力端子
21b…高周波出力端子
22…フィードスルー上層部
24…高周波半導体チップ
26…入力回路基板
28…出力回路基板
39b…キャパシタ用ストリップライン
40b…キャパシタ端子用絶縁層
41b…平滑化キャパシタ用端子
80…キャパシタ接続回路
110…半絶縁性基板
112…窒化物系化合物半導体層(GaNエピタキシャル成長層)
116…2次元電子ガス(2DEG)層
118…アルミニウム窒化ガリウム層(AlxGa1-xN)(0.1≦x≦1)
120…ソースフィンガー電極
122…ドレインフィンガー電極
124…ゲートフィンガー電極
126…ソース領域
128…ドレイン領域
200…導体ベースプレート
G,G1,G2,…,G10…ゲート端子電極
S,S11,S12,…,S101,S102…ソース端子電極
D,D1,D2,…,D10…ドレイン端子電極
SC11,SC12,…,SC91,SC92,SC101,SC102…VIAホール
CBR…バイパスリザバーキャパシタ(平滑化キャパシタ)
IPK…電流振幅
ΔV…リップル電圧
Δf…差分周波数
BW1、BW2、BW3…平滑化キャパシタ接続用ボンディングワイヤ
Claims (10)
- 高周波半導体チップと、
前記高周波半導体チップの入力側に配置された入力整合回路と、
前記高周波半導体チップの出力側に配置された出力整合回路と、
前記入力整合回路に接続された高周波入力端子と、
前記出力整合回路に接続された高周波出力端子と、
前記高周波半導体チップに接続される平滑化キャパシタ用端子と
を備え、前記高周波半導体チップと、前記入力整合回路と、前記出力整合回路とが1つのパッケージに収納されたことを特徴とする半導体装置。 - 前記平滑化キャパシタ用端子と接地電位間に接続された平滑化キャパシタを備え、
平滑化キャパシタの値をCBR、電流振幅の値をIPK、許容できるリップル電圧の値をΔV、差分周波数の値をΔfとすると、前記平滑化キャパシタは、CBR=IPK×(1/2πΔf)/△V以上の値を有することを特徴とする請求項1に記載の半導体装置。 - 前記高周波半導体チップに接続されたキャパシタ用ストリップラインを備え、前記平滑化キャパシタ用端子は、前記キャパシタ用ストリップラインを介して、前記高周波半導体チップのドレイン端子電極に接続されたことを特徴とする請求項1に記載の半導体装置。
- 前記高周波半導体チップのドレイン端子電極と前記キャパシタ用ストリップラインとの間を接続する平滑化キャパシタ接続用ボンディングワイヤを備えることを特徴とする請求項3に記載の半導体装置。
- 前記入力整合回路に接続された入力ストリップラインを備え、前記高周波入力端子は、前記入力ストリップラインを介して前記高周波半導体チップのゲート端子電極に接続されたことを特徴とする請求項1に記載の半導体装置。
- 前記出力整合回路に接続された出力ストリップラインを備え、前記高周波出力端子は、前記出力ストリップラインを介して前記高周波半導体チップの前記ドレイン端子電極に接続されたことを特徴とする請求項1に記載の半導体装置。
- 前記高周波出力端子と、前記平滑化キャパシタ用端子は、互いに隣接して配置されたことを特徴とする請求項1〜6のいずれか1項に記載の半導体装置。
- 前記高周波出力端子と、前記平滑化キャパシタ用端子は、四辺形の互いに隣接する辺に配置されたことを特徴とする請求項1〜6のいずれか1項に記載の半導体装置。
- 前記高周波半導体チップは、
半絶縁性基板と、
前記半絶縁性基板の第1表面に配置され,それぞれ複数のフィンガーを有するゲートフィンガー電極、ソースフィンガー電極およびドレインフィンガー電極と、
前記半絶縁性基板の第1表面に配置され,前記ゲートフィンガー電極、前記ソースフィンガー電極および前記ドレインフィンガー電極ごとに複数のフィンガーをそれぞれ束ねて形成した複数のゲート端子電極、複数のソース端子電極およびドレイン端子電極と、
前記ソース端子電極の下部に配置されたVIAホールと、
前記半絶縁性基板の第1表面と反対側の第2表面に配置され、前記ソース端子電極に対して前記VIAホールを介して接続された接地電極と
を備えることを特徴とする請求項1に記載の半導体装置。 - 前記半絶縁性基板は、GaAs基板、SiC基板、GaN基板、SiC基板上にGaNエピタキシャル層を形成した基板、SiC基板上にGaN/AlGaNからなるヘテロ接合エピタキシャル層を形成した基板、サファイア基板、若しくはダイヤモンド基板のいずれかであることを特徴とする請求項9に記載の半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010272916A JP5269864B2 (ja) | 2010-12-07 | 2010-12-07 | 半導体装置 |
US13/164,217 US8912647B2 (en) | 2010-12-07 | 2011-06-20 | Semiconductor device for smoothing the voltage of the end face of a drain of a high frequency semiconductor chip |
EP11170565.3A EP2463906B1 (en) | 2010-12-07 | 2011-06-20 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010272916A JP5269864B2 (ja) | 2010-12-07 | 2010-12-07 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012124282A true JP2012124282A (ja) | 2012-06-28 |
JP5269864B2 JP5269864B2 (ja) | 2013-08-21 |
Family
ID=45002549
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010272916A Active JP5269864B2 (ja) | 2010-12-07 | 2010-12-07 | 半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US8912647B2 (ja) |
EP (1) | EP2463906B1 (ja) |
JP (1) | JP5269864B2 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5588419B2 (ja) * | 2011-10-26 | 2014-09-10 | 株式会社東芝 | パッケージ |
JP5983117B2 (ja) * | 2012-07-11 | 2016-08-31 | 三菱電機株式会社 | 半導体装置 |
WO2015046209A1 (ja) * | 2013-09-27 | 2015-04-02 | 京セラ株式会社 | 蓋体、パッケージおよび電子装置 |
CN110622286A (zh) * | 2017-05-17 | 2019-12-27 | 三菱电机株式会社 | 放大器 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0260205A (ja) * | 1988-08-25 | 1990-02-28 | Matsushita Electric Ind Co Ltd | マイクロ波集積回路とその製造方法 |
JPH05152876A (ja) * | 1991-11-26 | 1993-06-18 | Toshiba Corp | 電力リミツテイング素子 |
JP2000183222A (ja) * | 1998-12-16 | 2000-06-30 | Matsushita Electronics Industry Corp | 半導体装置およびその製造方法 |
JP2001111364A (ja) * | 1999-10-12 | 2001-04-20 | Nec Corp | マイクロ波増幅器 |
JP2007060616A (ja) * | 2005-07-29 | 2007-03-08 | Mitsubishi Electric Corp | 高周波電力増幅器 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2538617B1 (fr) | 1982-12-28 | 1986-02-28 | Thomson Csf | Boitier d'encapsulation pour semiconducteur de puissance, a isolement entree-sortie ameliore |
JPH0269002A (ja) | 1988-09-05 | 1990-03-08 | Fujitsu Ltd | マイクロ波・ミリ波集積装置 |
JP2864841B2 (ja) * | 1992-02-04 | 1999-03-08 | 三菱電機株式会社 | 高周波高出力トランジスタ |
US5422615A (en) * | 1992-09-14 | 1995-06-06 | Hitachi, Ltd. | High frequency circuit device |
JPH07297609A (ja) * | 1994-04-28 | 1995-11-10 | Nec Yamagata Ltd | 半導体装置 |
JP3060981B2 (ja) | 1997-02-21 | 2000-07-10 | 日本電気株式会社 | マイクロ波増幅器 |
JP4163818B2 (ja) * | 1999-07-07 | 2008-10-08 | 三菱電機株式会社 | 内部整合型トランジスタ |
JP4322414B2 (ja) * | 2000-09-19 | 2009-09-02 | 株式会社ルネサステクノロジ | 半導体装置 |
JP2003068571A (ja) * | 2001-08-27 | 2003-03-07 | Nec Corp | 可変コンデンサおよび可変インダクタ並びにそれらを備えた高周波回路モジュール |
CN1623232B (zh) | 2002-01-24 | 2010-05-26 | Nxp股份有限公司 | 射频放大器装置以及与其相关的模块和方法 |
US7087977B2 (en) * | 2002-09-27 | 2006-08-08 | Renesas Technology Corp. | Semiconductor device including multiple wiring layers and circuits operating in different frequency bands |
JP4049112B2 (ja) * | 2004-03-09 | 2008-02-20 | 株式会社日立製作所 | 電子装置 |
JP4519637B2 (ja) | 2004-12-28 | 2010-08-04 | 株式会社東芝 | 半導体装置 |
JP4575261B2 (ja) | 2005-09-14 | 2010-11-04 | 株式会社東芝 | 高周波用パッケージ |
CN101162928A (zh) * | 2006-10-13 | 2008-04-16 | 松下电器产业株式会社 | 高频功率放大器 |
JP2008288769A (ja) * | 2007-05-16 | 2008-11-27 | Panasonic Corp | 高周波回路、半導体装置、および高周波電力増幅装置 |
WO2009128035A1 (en) * | 2008-04-15 | 2009-10-22 | Nxp B.V. | High frequency field-effect transistor |
JP5434019B2 (ja) * | 2008-09-03 | 2014-03-05 | 三菱電機株式会社 | 検査用治具 |
-
2010
- 2010-12-07 JP JP2010272916A patent/JP5269864B2/ja active Active
-
2011
- 2011-06-20 EP EP11170565.3A patent/EP2463906B1/en active Active
- 2011-06-20 US US13/164,217 patent/US8912647B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0260205A (ja) * | 1988-08-25 | 1990-02-28 | Matsushita Electric Ind Co Ltd | マイクロ波集積回路とその製造方法 |
JPH05152876A (ja) * | 1991-11-26 | 1993-06-18 | Toshiba Corp | 電力リミツテイング素子 |
JP2000183222A (ja) * | 1998-12-16 | 2000-06-30 | Matsushita Electronics Industry Corp | 半導体装置およびその製造方法 |
JP2001111364A (ja) * | 1999-10-12 | 2001-04-20 | Nec Corp | マイクロ波増幅器 |
JP2007060616A (ja) * | 2005-07-29 | 2007-03-08 | Mitsubishi Electric Corp | 高周波電力増幅器 |
Also Published As
Publication number | Publication date |
---|---|
US20120138954A1 (en) | 2012-06-07 |
US8912647B2 (en) | 2014-12-16 |
EP2463906B1 (en) | 2021-11-24 |
EP2463906A3 (en) | 2013-03-06 |
EP2463906A2 (en) | 2012-06-13 |
JP5269864B2 (ja) | 2013-08-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5323167B2 (ja) | パッケージ | |
JP5450313B2 (ja) | 高周波半導体用パッケージおよびその作製方法 | |
KR20230018451A (ko) | 다이 전면측 상의 기둥 접속과 배면측 상의 수동 디바이스 통합을 위한 방법들 | |
KR20100029697A (ko) | 고주파 패키지 장치 및 그 제조 방법 | |
JP2017103678A (ja) | 高周波半導体増幅器 | |
JP5269864B2 (ja) | 半導体装置 | |
JP2012038837A (ja) | パッケージおよびその作製方法 | |
JP2009176930A (ja) | 半導体装置およびその製造方法 | |
US7990223B1 (en) | High frequency module and operating method of the same | |
JP2012182306A (ja) | Mmic用パッケージ | |
JP2012178525A (ja) | パッケージ | |
JP5734727B2 (ja) | 半導体装置 | |
TWI469275B (zh) | Package | |
JP5851334B2 (ja) | 高周波半導体用パッケージ | |
JP5843703B2 (ja) | 高周波半導体用パッケージ | |
JP2012182386A (ja) | パッケージ | |
JP2012209334A (ja) | ミリ波帯用薄型パッケージおよびその製造方法 | |
JP5513991B2 (ja) | 高周波モジュールおよびその動作方法 | |
JP2012234910A (ja) | 半導体装置およびその製造方法 | |
JP5951265B2 (ja) | 広帯域増幅器 | |
JP2011250360A (ja) | 高周波モジュール | |
TWI836222B (zh) | 用於在裸晶之前側上之柱連接及在裸晶之後側上之被動裝置整合之方法 | |
US20240145413A1 (en) | Semiconductor device | |
JP2012146910A (ja) | 半導体装置 | |
JP2012146728A (ja) | パッケージ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20121011 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20121106 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20121221 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20130416 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20130508 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 5269864 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |