JP2010534897A5 - - Google Patents

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Publication number
JP2010534897A5
JP2010534897A5 JP2010518407A JP2010518407A JP2010534897A5 JP 2010534897 A5 JP2010534897 A5 JP 2010534897A5 JP 2010518407 A JP2010518407 A JP 2010518407A JP 2010518407 A JP2010518407 A JP 2010518407A JP 2010534897 A5 JP2010534897 A5 JP 2010534897A5
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JP
Japan
Prior art keywords
indicator
memory
memory unit
independently
valid data
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JP2010518407A
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English (en)
Japanese (ja)
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JP2010534897A (ja
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Priority claimed from US11/828,569 external-priority patent/US7590021B2/en
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Publication of JP2010534897A publication Critical patent/JP2010534897A/ja
Publication of JP2010534897A5 publication Critical patent/JP2010534897A5/ja
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JP2010518407A 2007-07-26 2008-07-25 有効データインジケータの使用によってダイナミックｒａｍ電力消費を減らすシステムおよび方法 Pending JP2010534897A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/828,569 US7590021B2 (en) 2007-07-26 2007-07-26 System and method to reduce dynamic RAM power consumption via the use of valid data indicators
PCT/US2008/071153 WO2009015324A1 (en) 2007-07-26 2008-07-25 System and method to reduce dynamic ram power consumption via the use of valid data indicators

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2014105630A Division JP2014197446A (ja) 2007-07-26 2014-05-21 有効データインジケータの使用によってダイナミックｒａｍ電力消費を減らすシステムおよび方法

Publications (2)

Publication Number Publication Date
JP2010534897A JP2010534897A (ja) 2010-11-11
JP2010534897A5 true JP2010534897A5 (enExample) 2015-04-16

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ID=39862963

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2010518407A Pending JP2010534897A (ja) 2007-07-26 2008-07-25 有効データインジケータの使用によってダイナミックｒａｍ電力消費を減らすシステムおよび方法
JP2014105630A Pending JP2014197446A (ja) 2007-07-26 2014-05-21 有効データインジケータの使用によってダイナミックｒａｍ電力消費を減らすシステムおよび方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2014105630A Pending JP2014197446A (ja) 2007-07-26 2014-05-21 有効データインジケータの使用によってダイナミックｒａｍ電力消費を減らすシステムおよび方法

Country Status (12)

Country Link
US (1) US7590021B2 (enExample)
EP (1) EP2020659B1 (enExample)
JP (2) JP2010534897A (enExample)
KR (1) KR101107798B1 (enExample)
CN (1) CN101765887A (enExample)
AT (1) ATE528763T1 (enExample)
BR (1) BRPI0814590A8 (enExample)
CA (1) CA2693811C (enExample)
ES (1) ES2375230T3 (enExample)
MX (1) MX2010000954A (enExample)
RU (1) RU2435237C1 (enExample)
WO (1) WO2009015324A1 (enExample)

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WO2012074724A1 (en) 2010-12-03 2012-06-07 Rambus Inc. Memory refresh method and devices
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CN108231109B (zh) 2014-06-09 2021-01-29 华为技术有限公司 动态随机存取存储器dram的刷新方法、设备以及系统
US20160155491A1 (en) * 2014-11-27 2016-06-02 Advanced Micro Devices, Inc. Memory persistence management control
KR102373544B1 (ko) 2015-11-06 2022-03-11 삼성전자주식회사 요청 기반의 리프레쉬를 수행하는 메모리 장치, 메모리 시스템 및 메모리 장치의 동작방법
EP4534065A3 (en) 2015-12-04 2025-06-04 ICU Medical, Inc. Systems methods and components for transferring medical fluids
US9972375B2 (en) * 2016-04-15 2018-05-15 Via Alliance Semiconductor Co., Ltd. Sanitize-aware DRAM controller
USD851745S1 (en) 2016-07-19 2019-06-18 Icu Medical, Inc. Medical fluid transfer system
JP6765941B2 (ja) * 2016-11-22 2020-10-07 理想科学工業株式会社 半導体メモリ管理装置
US10437499B2 (en) * 2017-12-22 2019-10-08 Nanya Technology Corporation Hybrid memory system and method of operating the same
US10762946B2 (en) 2018-12-31 2020-09-01 Micron Technology, Inc. Memory with partial array refresh
US10811076B1 (en) 2019-06-29 2020-10-20 Intel Corporation Battery life based on inhibited memory refreshes
US11721384B2 (en) * 2020-04-17 2023-08-08 Advanced Micro Devices, Inc. Hardware-assisted dynamic random access memory (DRAM) row merging
KR20240059151A (ko) 2022-10-27 2024-05-07 삼성전자주식회사 메모리 장치, 그것을 포함하는 메모리 시스템 및 그것의 동작 방법

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