MX2010000954A - Sistema y metodo para reducir el consumo de potencia ram dinamica mediante el uso de indicadores de datos validos. - Google Patents
Sistema y metodo para reducir el consumo de potencia ram dinamica mediante el uso de indicadores de datos validos.Info
- Publication number
- MX2010000954A MX2010000954A MX2010000954A MX2010000954A MX2010000954A MX 2010000954 A MX2010000954 A MX 2010000954A MX 2010000954 A MX2010000954 A MX 2010000954A MX 2010000954 A MX2010000954 A MX 2010000954A MX 2010000954 A MX2010000954 A MX 2010000954A
- Authority
- MX
- Mexico
- Prior art keywords
- valid data
- power consumption
- dynamic ram
- reduce dynamic
- consumption via
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40622—Partial refresh of memory arrays
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/406—Refreshing of dynamic cells
- G11C2211/4065—Low level details of refresh operations
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Power Sources (AREA)
- Memory System (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/828,569 US7590021B2 (en) | 2007-07-26 | 2007-07-26 | System and method to reduce dynamic RAM power consumption via the use of valid data indicators |
| PCT/US2008/071153 WO2009015324A1 (en) | 2007-07-26 | 2008-07-25 | System and method to reduce dynamic ram power consumption via the use of valid data indicators |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| MX2010000954A true MX2010000954A (es) | 2010-03-10 |
Family
ID=39862963
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| MX2010000954A MX2010000954A (es) | 2007-07-26 | 2008-07-25 | Sistema y metodo para reducir el consumo de potencia ram dinamica mediante el uso de indicadores de datos validos. |
Country Status (12)
| Country | Link |
|---|---|
| US (1) | US7590021B2 (enExample) |
| EP (1) | EP2020659B1 (enExample) |
| JP (2) | JP2010534897A (enExample) |
| KR (1) | KR101107798B1 (enExample) |
| CN (1) | CN101765887A (enExample) |
| AT (1) | ATE528763T1 (enExample) |
| BR (1) | BRPI0814590A8 (enExample) |
| CA (1) | CA2693811C (enExample) |
| ES (1) | ES2375230T3 (enExample) |
| MX (1) | MX2010000954A (enExample) |
| RU (1) | RU2435237C1 (enExample) |
| WO (1) | WO2009015324A1 (enExample) |
Families Citing this family (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8237723B2 (en) * | 2007-06-07 | 2012-08-07 | Apple Inc. | Deferred deletion and cleanup for graphics resources |
| US7991921B2 (en) * | 2008-03-11 | 2011-08-02 | Freescale Semiconductor, Inc. | System and method for reducing power consumption of memory in an I/O controller |
| CA3068441C (en) | 2009-07-29 | 2024-01-09 | Icu Medical, Inc. | Fluid transfer devices and methods of use |
| US9411674B2 (en) * | 2010-03-19 | 2016-08-09 | Microsoft Technology Licensing, Llc | Providing hardware resources having different reliabilities for use by an application |
| US8412882B2 (en) | 2010-06-18 | 2013-04-02 | Microsoft Corporation | Leveraging chip variability |
| CA2813096C (en) | 2010-09-30 | 2019-10-29 | Chiesi Farmaceutici S.P.A. | Use of magnesium stearate in dry powder formulations for inhalation |
| WO2012074724A1 (en) | 2010-12-03 | 2012-06-07 | Rambus Inc. | Memory refresh method and devices |
| KR102481494B1 (ko) | 2011-12-22 | 2022-12-26 | 아이씨유 메디칼 인코퍼레이티드 | 의료용 유체 전달 시스템, 유체 전달 방법, 전자 의료용 유체 전달 시스템, 및 전자 의료용 유체 전달 시스템 이용 방법 |
| EP2620838B1 (en) | 2012-01-26 | 2015-04-22 | ST-Ericsson SA | Automatic partial array self-refresh |
| CN108231109B (zh) | 2014-06-09 | 2021-01-29 | 华为技术有限公司 | 动态随机存取存储器dram的刷新方法、设备以及系统 |
| US20160155491A1 (en) * | 2014-11-27 | 2016-06-02 | Advanced Micro Devices, Inc. | Memory persistence management control |
| KR102373544B1 (ko) | 2015-11-06 | 2022-03-11 | 삼성전자주식회사 | 요청 기반의 리프레쉬를 수행하는 메모리 장치, 메모리 시스템 및 메모리 장치의 동작방법 |
| EP4534065A3 (en) | 2015-12-04 | 2025-06-04 | ICU Medical, Inc. | Systems methods and components for transferring medical fluids |
| US9972375B2 (en) * | 2016-04-15 | 2018-05-15 | Via Alliance Semiconductor Co., Ltd. | Sanitize-aware DRAM controller |
| USD851745S1 (en) | 2016-07-19 | 2019-06-18 | Icu Medical, Inc. | Medical fluid transfer system |
| JP6765941B2 (ja) * | 2016-11-22 | 2020-10-07 | 理想科学工業株式会社 | 半導体メモリ管理装置 |
| US10437499B2 (en) * | 2017-12-22 | 2019-10-08 | Nanya Technology Corporation | Hybrid memory system and method of operating the same |
| US10762946B2 (en) | 2018-12-31 | 2020-09-01 | Micron Technology, Inc. | Memory with partial array refresh |
| US10811076B1 (en) | 2019-06-29 | 2020-10-20 | Intel Corporation | Battery life based on inhibited memory refreshes |
| US11721384B2 (en) * | 2020-04-17 | 2023-08-08 | Advanced Micro Devices, Inc. | Hardware-assisted dynamic random access memory (DRAM) row merging |
| KR20240059151A (ko) | 2022-10-27 | 2024-05-07 | 삼성전자주식회사 | 메모리 장치, 그것을 포함하는 메모리 시스템 및 그것의 동작 방법 |
Family Cites Families (26)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5537346A (en) * | 1994-05-20 | 1996-07-16 | Samsung Electronics Co., Ltd. | Semiconductor memory device obtaining high bandwidth and signal line layout method thereof |
| JPH09312094A (ja) * | 1996-05-23 | 1997-12-02 | Nec Eng Ltd | リフレッシュ制御システム |
| JPH10177786A (ja) * | 1996-12-16 | 1998-06-30 | Nec Shizuoka Ltd | メモリリフレッシュ制御装置および方法 |
| JPH1196756A (ja) * | 1997-09-26 | 1999-04-09 | Fujitsu Ltd | 半導体記憶装置 |
| US6415353B1 (en) * | 1998-10-01 | 2002-07-02 | Monolithic System Technology, Inc. | Read/write buffers for complete hiding of the refresh of a semiconductor memory and method of operating same |
| JP2000113667A (ja) * | 1998-10-07 | 2000-04-21 | Nec Corp | Ｄｒａｍ装置 |
| JP2000123568A (ja) * | 1998-10-14 | 2000-04-28 | Ricoh Co Ltd | Ｄｒａｍリフレッシュ制御回路およびリフレッシュ制御回路を内蔵したｄｒａｍ |
| JP2000339953A (ja) * | 1999-05-27 | 2000-12-08 | Ricoh Co Ltd | Ｄｒａｍリフレッシュ制御回路 |
| JP2001243767A (ja) * | 2000-02-25 | 2001-09-07 | Nec Microsystems Ltd | 揮発性メモリを用いたｆｉｆｏメモリ |
| JP2002373489A (ja) | 2001-06-15 | 2002-12-26 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US6742097B2 (en) | 2001-07-30 | 2004-05-25 | Rambus Inc. | Consolidation of allocated memory to reduce power consumption |
| US20030053361A1 (en) * | 2001-09-20 | 2003-03-20 | Haitao Zhang | EDRAM based architecture |
| JP2004047051A (ja) * | 2002-05-17 | 2004-02-12 | Matsushita Electric Ind Co Ltd | メモリ制御装置および方法ならびにプログラム |
| EP1408510A3 (en) | 2002-05-17 | 2005-05-18 | Matsushita Electric Industrial Co., Ltd. | Memory control apparatus, method and program |
| KR100535071B1 (ko) | 2002-11-07 | 2005-12-07 | 주식회사 하이닉스반도체 | 셀프 리프레쉬 장치 |
| JP2004259343A (ja) * | 2003-02-25 | 2004-09-16 | Renesas Technology Corp | 半導体記憶装置 |
| US6876593B2 (en) * | 2003-07-01 | 2005-04-05 | Intel Corporation | Method and apparatus for partial refreshing of DRAMS |
| US20050078538A1 (en) * | 2003-09-30 | 2005-04-14 | Rainer Hoehler | Selective address-range refresh |
| US7236416B2 (en) * | 2004-05-21 | 2007-06-26 | Qualcomm Incorporated | Method and system for controlling refresh in volatile memories |
| US7088633B2 (en) * | 2004-05-27 | 2006-08-08 | Qualcomm Incorporated | Method and system for providing seamless self-refresh for directed bank refresh in volatile memories |
| US7184350B2 (en) * | 2004-05-27 | 2007-02-27 | Qualcomm Incorporated | Method and system for providing independent bank refresh for volatile memories |
| US7079440B2 (en) * | 2004-05-27 | 2006-07-18 | Qualcomm Incorporated | Method and system for providing directed bank refresh for volatile memories |
| US8122187B2 (en) * | 2004-07-02 | 2012-02-21 | Qualcomm Incorporated | Refreshing dynamic volatile memory |
| US7930471B2 (en) * | 2004-11-24 | 2011-04-19 | Qualcomm Incorporated | Method and system for minimizing impact of refresh operations on volatile memory performance |
| US7342841B2 (en) | 2004-12-21 | 2008-03-11 | Intel Corporation | Method, apparatus, and system for active refresh management |
| US7953921B2 (en) * | 2004-12-28 | 2011-05-31 | Qualcomm Incorporated | Directed auto-refresh synchronization |
-
2007
- 2007-07-26 US US11/828,569 patent/US7590021B2/en active Active
-
2008
- 2008-03-25 ES ES08005492T patent/ES2375230T3/es active Active
- 2008-03-25 AT AT08005492T patent/ATE528763T1/de not_active IP Right Cessation
- 2008-03-25 EP EP08005492A patent/EP2020659B1/en active Active
- 2008-07-25 KR KR1020107004191A patent/KR101107798B1/ko not_active Expired - Fee Related
- 2008-07-25 JP JP2010518407A patent/JP2010534897A/ja active Pending
- 2008-07-25 MX MX2010000954A patent/MX2010000954A/es active IP Right Grant
- 2008-07-25 CA CA2693811A patent/CA2693811C/en not_active Expired - Fee Related
- 2008-07-25 WO PCT/US2008/071153 patent/WO2009015324A1/en not_active Ceased
- 2008-07-25 RU RU2010107059/08A patent/RU2435237C1/ru not_active IP Right Cessation
- 2008-07-25 CN CN200880100528A patent/CN101765887A/zh active Pending
- 2008-07-25 BR BRPI0814590A patent/BRPI0814590A8/pt not_active IP Right Cessation
-
2014
- 2014-05-21 JP JP2014105630A patent/JP2014197446A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| EP2020659A1 (en) | 2009-02-04 |
| JP2014197446A (ja) | 2014-10-16 |
| KR101107798B1 (ko) | 2012-01-25 |
| US20090027989A1 (en) | 2009-01-29 |
| JP2010534897A (ja) | 2010-11-11 |
| RU2435237C1 (ru) | 2011-11-27 |
| ES2375230T3 (es) | 2012-02-27 |
| US7590021B2 (en) | 2009-09-15 |
| KR20100047286A (ko) | 2010-05-07 |
| BRPI0814590A2 (pt) | 2015-01-20 |
| CA2693811A1 (en) | 2009-01-29 |
| EP2020659B1 (en) | 2011-10-12 |
| ATE528763T1 (de) | 2011-10-15 |
| CA2693811C (en) | 2013-11-12 |
| RU2010107059A (ru) | 2011-09-10 |
| BRPI0814590A8 (pt) | 2019-01-02 |
| WO2009015324A1 (en) | 2009-01-29 |
| CN101765887A (zh) | 2010-06-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| FG | Grant or registration |