CN101765887A - 经由使用有效数据指示符减少动态ram功率消耗的系统和方法 - Google Patents

经由使用有效数据指示符减少动态ram功率消耗的系统和方法 Download PDF

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Publication number
CN101765887A
CN101765887A CN200880100528A CN200880100528A CN101765887A CN 101765887 A CN101765887 A CN 101765887A CN 200880100528 A CN200880100528 A CN 200880100528A CN 200880100528 A CN200880100528 A CN 200880100528A CN 101765887 A CN101765887 A CN 101765887A
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CN
China
Prior art keywords
refresh
designator
memory unit
independently
valid data
Prior art date
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Pending
Application number
CN200880100528A
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English (en)
Chinese (zh)
Inventor
杰拉尔德·保罗·米夏拉克
巴里·乔·沃尔福德
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Qualcomm Inc
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Qualcomm Inc
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Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of CN101765887A publication Critical patent/CN101765887A/zh
Pending legal-status Critical Current

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40622Partial refresh of memory arrays
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072Circuits for initialization, powering up or down, clearing memory or presetting
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409Read-write [R-W] circuits 
    • G11C11/4093Input/output [I/O] data interface arrangements, e.g. data buffers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/401Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C2211/406Refreshing of dynamic cells
    • G11C2211/4065Low level details of refresh operations

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Power Sources (AREA)
  • Memory System (AREA)
CN200880100528A 2007-07-26 2008-07-25 经由使用有效数据指示符减少动态ram功率消耗的系统和方法 Pending CN101765887A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/828,569 2007-07-26
US11/828,569 US7590021B2 (en) 2007-07-26 2007-07-26 System and method to reduce dynamic RAM power consumption via the use of valid data indicators
PCT/US2008/071153 WO2009015324A1 (en) 2007-07-26 2008-07-25 System and method to reduce dynamic ram power consumption via the use of valid data indicators

Publications (1)

Publication Number Publication Date
CN101765887A true CN101765887A (zh) 2010-06-30

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN200880100528A Pending CN101765887A (zh) 2007-07-26 2008-07-25 经由使用有效数据指示符减少动态ram功率消耗的系统和方法

Country Status (12)

Country Link
US (1) US7590021B2 (enExample)
EP (1) EP2020659B1 (enExample)
JP (2) JP2010534897A (enExample)
KR (1) KR101107798B1 (enExample)
CN (1) CN101765887A (enExample)
AT (1) ATE528763T1 (enExample)
BR (1) BRPI0814590A8 (enExample)
CA (1) CA2693811C (enExample)
ES (1) ES2375230T3 (enExample)
MX (1) MX2010000954A (enExample)
RU (1) RU2435237C1 (enExample)
WO (1) WO2009015324A1 (enExample)

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CN108231109B (zh) 2014-06-09 2021-01-29 华为技术有限公司 动态随机存取存储器dram的刷新方法、设备以及系统
US20160155491A1 (en) * 2014-11-27 2016-06-02 Advanced Micro Devices, Inc. Memory persistence management control
KR102373544B1 (ko) 2015-11-06 2022-03-11 삼성전자주식회사 요청 기반의 리프레쉬를 수행하는 메모리 장치, 메모리 시스템 및 메모리 장치의 동작방법
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JP6765941B2 (ja) * 2016-11-22 2020-10-07 理想科学工業株式会社 半導体メモリ管理装置
US10437499B2 (en) * 2017-12-22 2019-10-08 Nanya Technology Corporation Hybrid memory system and method of operating the same
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US11721384B2 (en) * 2020-04-17 2023-08-08 Advanced Micro Devices, Inc. Hardware-assisted dynamic random access memory (DRAM) row merging
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Publication number Priority date Publication date Assignee Title
CN106782642A (zh) * 2016-04-15 2017-05-31 上海兆芯集成电路有限公司 Dram控制器及其控制方法和计算机程序产品
CN106782642B (zh) * 2016-04-15 2020-02-07 上海兆芯集成电路有限公司 Dram控制器及其控制方法和计算机程序产品

Also Published As

Publication number Publication date
EP2020659A1 (en) 2009-02-04
JP2014197446A (ja) 2014-10-16
KR101107798B1 (ko) 2012-01-25
US20090027989A1 (en) 2009-01-29
JP2010534897A (ja) 2010-11-11
RU2435237C1 (ru) 2011-11-27
ES2375230T3 (es) 2012-02-27
US7590021B2 (en) 2009-09-15
KR20100047286A (ko) 2010-05-07
BRPI0814590A2 (pt) 2015-01-20
CA2693811A1 (en) 2009-01-29
EP2020659B1 (en) 2011-10-12
MX2010000954A (es) 2010-03-10
ATE528763T1 (de) 2011-10-15
CA2693811C (en) 2013-11-12
RU2010107059A (ru) 2011-09-10
BRPI0814590A8 (pt) 2019-01-02
WO2009015324A1 (en) 2009-01-29

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Application publication date: 20100630