JP2010532584A - 高ドープ単結晶シリコン基板の酸素析出物の抑制 - Google Patents

高ドープ単結晶シリコン基板の酸素析出物の抑制 Download PDF

Info

Publication number
JP2010532584A
JP2010532584A JP2010515104A JP2010515104A JP2010532584A JP 2010532584 A JP2010532584 A JP 2010532584A JP 2010515104 A JP2010515104 A JP 2010515104A JP 2010515104 A JP2010515104 A JP 2010515104A JP 2010532584 A JP2010532584 A JP 2010532584A
Authority
JP
Japan
Prior art keywords
wafer
highly doped
silicon substrate
temperature
oxygen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2010515104A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010532584A5 (enExample
Inventor
ロバート・ジェイ・ファルスター
ルカ・モイラーニ
リ・ドンミュン
チョ・チャンレ
マルコ・ラヴァーニ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SunEdison Inc
Original Assignee
MEMC Electronic Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MEMC Electronic Materials Inc filed Critical MEMC Electronic Materials Inc
Publication of JP2010532584A publication Critical patent/JP2010532584A/ja
Publication of JP2010532584A5 publication Critical patent/JP2010532584A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • H01L21/3225—Thermally inducing defects using oxygen present in the silicon body for intrinsic gettering
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/21—Circular sheet or circular blank

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
JP2010515104A 2007-06-29 2008-06-26 高ドープ単結晶シリコン基板の酸素析出物の抑制 Withdrawn JP2010532584A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/771,667 US20090004426A1 (en) 2007-06-29 2007-06-29 Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates
PCT/US2008/068284 WO2009006182A1 (en) 2007-06-29 2008-06-26 Suppression of oxygen precipitation in heavily doped single crystal silicon substrates

Publications (2)

Publication Number Publication Date
JP2010532584A true JP2010532584A (ja) 2010-10-07
JP2010532584A5 JP2010532584A5 (enExample) 2011-05-26

Family

ID=39672544

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010515104A Withdrawn JP2010532584A (ja) 2007-06-29 2008-06-26 高ドープ単結晶シリコン基板の酸素析出物の抑制

Country Status (7)

Country Link
US (2) US20090004426A1 (enExample)
EP (1) EP2168150A1 (enExample)
JP (1) JP2010532584A (enExample)
KR (1) KR20100039291A (enExample)
CN (1) CN101689504A (enExample)
TW (1) TW200919585A (enExample)
WO (1) WO2009006182A1 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090004458A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Diffusion Control in Heavily Doped Substrates
DE102008023054B4 (de) * 2008-05-09 2011-12-22 Siltronic Ag Verfahren zur Herstellung einer epitaxierten Halbleiterscheibe
US8627528B2 (en) * 2009-11-19 2014-01-14 Nike, Inc. Footwear customization kit
JP2011134830A (ja) * 2009-12-24 2011-07-07 Covalent Materials Corp エピタキシャルウェーハ
JP2011155130A (ja) * 2010-01-27 2011-08-11 Covalent Materials Tokuyama Corp エピタキシャルウェーハ及びその製造方法
US9483908B2 (en) 2010-08-20 2016-11-01 Micro-Gaming Ventures, LLC Methods and systems for conducting a competition within a gaming environment
FR2974180B1 (fr) * 2011-04-15 2013-04-26 Commissariat Energie Atomique Procede de determination de la concentration en oxygene interstitiel.
US10233562B2 (en) * 2013-04-24 2019-03-19 Sumco Techxiv Corporation Method for producing single crystal, and method for producing silicon wafer
US9634098B2 (en) * 2013-06-11 2017-04-25 SunEdison Semiconductor Ltd. (UEN201334164H) Oxygen precipitation in heavily doped silicon wafers sliced from ingots grown by the Czochralski method
US20150132931A1 (en) * 2013-07-01 2015-05-14 Solexel, Inc. High-throughput thermal processing methods for producing high-efficiency crystalline silicon solar cells
KR102384041B1 (ko) 2014-07-31 2022-04-08 글로벌웨이퍼스 씨오., 엘티디. 질소 도핑 및 공공 지배 실리콘 잉곳 및 그로부터 형성된, 반경방향으로 균일하게 분포된 산소 석출 밀도 및 크기를 갖는 열 처리 웨이퍼
CN111201341B (zh) * 2016-06-08 2023-04-04 环球晶圆股份有限公司 具有经改进的机械强度的高电阻率单晶硅锭及晶片
JP6579086B2 (ja) * 2016-11-15 2019-09-25 信越半導体株式会社 デバイス形成方法
CN114121626B (zh) * 2020-08-27 2025-08-15 联华电子股份有限公司 一种制作半导体元件的方法
CN114242571B (zh) * 2021-12-09 2025-07-04 全球能源互联网研究院有限公司 一种半导体结构的制备方法
CN115831710A (zh) * 2022-11-01 2023-03-21 中环领先半导体材料有限公司 降低硅衬底缺陷以抑制硅基氮化镓外延片翘曲的方法

Family Cites Families (70)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS583375B2 (ja) * 1979-01-19 1983-01-21 超エル・エス・アイ技術研究組合 シリコン単結晶ウエハ−の製造方法
JPS5680139A (en) * 1979-12-05 1981-07-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device
US4435896A (en) * 1981-12-07 1984-03-13 Bell Telephone Laboratories, Incorporated Method for fabricating complementary field effect transistor devices
US4437922A (en) * 1982-03-26 1984-03-20 International Business Machines Corporation Method for tailoring oxygen precipitate particle density and distribution silicon wafers
US4548654A (en) * 1983-06-03 1985-10-22 Motorola, Inc. Surface denuding of silicon wafer
JPS6031231A (ja) * 1983-07-29 1985-02-18 Toshiba Corp 半導体基体の製造方法
US4505759A (en) * 1983-12-19 1985-03-19 Mara William C O Method for making a conductive silicon substrate by heat treatment of oxygenated and lightly doped silicon single crystals
US4851358A (en) * 1988-02-11 1989-07-25 Dns Electronic Materials, Inc. Semiconductor wafer fabrication with improved control of internal gettering sites using rapid thermal annealing
US4868133A (en) * 1988-02-11 1989-09-19 Dns Electronic Materials, Inc. Semiconductor wafer fabrication with improved control of internal gettering sites using RTA
US5194395A (en) * 1988-07-28 1993-03-16 Fujitsu Limited Method of producing a substrate having semiconductor-on-insulator structure with gettering sites
JP2617798B2 (ja) * 1989-09-22 1997-06-04 三菱電機株式会社 積層型半導体装置およびその製造方法
US5024723A (en) * 1990-05-07 1991-06-18 Goesele Ulrich M Method of producing a thin silicon on insulator layer by wafer bonding and chemical thinning
IT1242014B (it) * 1990-11-15 1994-02-02 Memc Electronic Materials Procedimento per il trattamento di fette di silicio per ottenere in esse profili di precipitazione controllati per la produzione di componenti elettronici.
DE59010916D1 (de) * 1990-12-21 2000-11-30 Siemens Ag Verfahren zur Herstellung einer mit Arsen dotierten glatten polykristallinen Siliziumschicht für höchstintegrierte Schaltungen
US5131979A (en) * 1991-05-21 1992-07-21 Lawrence Technology Semiconductor EPI on recycled silicon wafers
US5137838A (en) * 1991-06-05 1992-08-11 National Semiconductor Corporation Method of fabricating P-buried layers for PNP devices
FR2681472B1 (fr) * 1991-09-18 1993-10-29 Commissariat Energie Atomique Procede de fabrication de films minces de materiau semiconducteur.
JP2726583B2 (ja) * 1991-11-18 1998-03-11 三菱マテリアルシリコン株式会社 半導体基板
JP2560178B2 (ja) * 1992-06-29 1996-12-04 九州電子金属株式会社 半導体ウェーハの製造方法
JPH0684925A (ja) * 1992-07-17 1994-03-25 Toshiba Corp 半導体基板およびその処理方法
KR0139730B1 (ko) * 1993-02-23 1998-06-01 사또오 후미오 반도체 기판 및 그 제조방법
US5401669A (en) * 1993-05-13 1995-03-28 Memc Electronic Materials, Spa Process for the preparation of silicon wafers having controlled distribution of oxygen precipitate nucleation centers
JPH0786289A (ja) * 1993-07-22 1995-03-31 Toshiba Corp 半導体シリコンウェハおよびその製造方法
JPH07106512A (ja) * 1993-10-04 1995-04-21 Sharp Corp 分子イオン注入を用いたｓｉｍｏｘ処理方法
US5451806A (en) * 1994-03-03 1995-09-19 Motorola, Inc. Method and device for sensing a surface temperature of an insulated gate semiconductor device
US5445975A (en) * 1994-03-07 1995-08-29 Advanced Micro Devices, Inc. Semiconductor wafer with enhanced pre-process denudation and process-induced gettering
JP2895743B2 (ja) * 1994-03-25 1999-05-24 信越半導体株式会社 Ｓｏｉ基板の製造方法
JP2874834B2 (ja) * 1994-07-29 1999-03-24 三菱マテリアル株式会社 シリコンウェーハのイントリンシックゲッタリング処理法
US5611855A (en) * 1995-01-31 1997-03-18 Seh America, Inc. Method for manufacturing a calibration wafer having a microdefect-free layer of a precisely predetermined depth
US5788763A (en) * 1995-03-09 1998-08-04 Toshiba Ceramics Co., Ltd. Manufacturing method of a silicon wafer having a controlled BMD concentration
US5593494A (en) * 1995-03-14 1997-01-14 Memc Electronic Materials, Inc. Precision controlled precipitation of oxygen in silicon
JP3085146B2 (ja) * 1995-05-31 2000-09-04 住友金属工業株式会社 シリコン単結晶ウェーハおよびその製造方法
US5792700A (en) * 1996-05-31 1998-08-11 Micron Technology, Inc. Semiconductor processing method for providing large grain polysilicon films
KR100240023B1 (ko) * 1996-11-29 2000-01-15 윤종용 반도체 웨이퍼 열처리방법 및 이에 따라 형성된 반도체 웨이퍼
US5789309A (en) * 1996-12-30 1998-08-04 Memc Electronic Materials, Inc. Method and system for monocrystalline epitaxial deposition
US6485807B1 (en) * 1997-02-13 2002-11-26 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects, and methods of preparing the same
US6503594B2 (en) * 1997-02-13 2003-01-07 Samsung Electronics Co., Ltd. Silicon wafers having controlled distribution of defects and slip
US6045610A (en) * 1997-02-13 2000-04-04 Samsung Electronics Co., Ltd. Methods of manufacturing monocrystalline silicon ingots and wafers by controlling pull rate profiles in a hot zone furnance
US5994761A (en) * 1997-02-26 1999-11-30 Memc Electronic Materials Spa Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor
MY137778A (en) * 1997-04-09 2009-03-31 Memc Electronic Materials Low defect density, ideal oxygen precipitating silicon
JPH1126390A (ja) * 1997-07-07 1999-01-29 Kobe Steel Ltd 欠陥発生防止方法
US5882987A (en) * 1997-08-26 1999-03-16 International Business Machines Corporation Smart-cut process for the production of thin semiconductor material films
TW429478B (en) * 1997-08-29 2001-04-11 Toshiba Corp Semiconductor device and method for manufacturing the same
US6051468A (en) * 1997-09-15 2000-04-18 Magepower Semiconductor Corp. Method of forming a semiconductor structure with uniform threshold voltage and punch-through tolerance
JP3395661B2 (ja) * 1998-07-07 2003-04-14 信越半導体株式会社 Ｓｏｉウエーハの製造方法
US6336968B1 (en) * 1998-09-02 2002-01-08 Memc Electronic Materials, Inc. Non-oxygen precipitating czochralski silicon wafers
EP1114454A2 (en) * 1998-09-02 2001-07-11 MEMC Electronic Materials, Inc. Silicon on insulator structure from low defect density single crystal silicon
WO2000013226A1 (en) * 1998-09-02 2000-03-09 Memc Electronic Materials, Inc. Process for preparing an ideal oxygen precipitating silicon wafer
DE69928434T2 (de) * 1998-09-02 2006-07-27 Memc Electronic Materials, Inc. Wärmebehandelte siliziumplättchen mit verbesserter eigengetterung
US6284384B1 (en) * 1998-12-09 2001-09-04 Memc Electronic Materials, Inc. Epitaxial silicon wafer with intrinsic gettering
AU2050900A (en) * 1998-12-28 2000-07-31 Fairchild Semiconductor Corporation Metal gate double diffusion mosfet with improved switching speed and reduced gate tunnel leakage
EP2037009B1 (en) * 1999-03-16 2013-07-31 Shin-Etsu Handotai Co., Ltd. Method for producing a bonded SOI wafer
US6346460B1 (en) * 1999-03-30 2002-02-12 Seh-America Low cost silicon substrate with impurity gettering and latch up protection and method of manufacture
US20030051656A1 (en) * 1999-06-14 2003-03-20 Charles Chiun-Chieh Yang Method for the preparation of an epitaxial silicon wafer with intrinsic gettering
US6339016B1 (en) * 2000-06-30 2002-01-15 Memc Electronic Materials, Inc. Method and apparatus for forming an epitaxial silicon wafer with a denuded zone
US6818197B2 (en) * 2000-09-25 2004-11-16 Mitsubishi Materials Silicon Corporation Epitaxial wafer
US20020084451A1 (en) * 2000-12-29 2002-07-04 Mohr Thomas C. Silicon wafers substantially free of oxidation induced stacking faults
CN1489643A (zh) * 2001-01-02 2004-04-14 Memc 用于制备具有改善的栅氧化层完整性的单晶硅的方法
US6743495B2 (en) * 2001-03-30 2004-06-01 Memc Electronic Materials, Inc. Thermal annealing process for producing silicon wafers with improved surface characteristics
US6897084B2 (en) * 2001-04-11 2005-05-24 Memc Electronic Materials, Inc. Control of oxygen precipitate formation in high resistivity CZ silicon
US20020179006A1 (en) * 2001-04-20 2002-12-05 Memc Electronic Materials, Inc. Method for the preparation of a semiconductor substrate with a non-uniform distribution of stabilized oxygen precipitates
JP2002368001A (ja) * 2001-06-07 2002-12-20 Denso Corp 半導体装置及びその製造方法
KR20040037031A (ko) * 2001-06-22 2004-05-04 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 이온 주입에 의한 고유 게터링을 갖는 실리콘 온인슐레이터 구조 제조 방법
JP2003124219A (ja) * 2001-10-10 2003-04-25 Sumitomo Mitsubishi Silicon Corp シリコンウエーハおよびエピタキシャルシリコンウエーハ
US6669777B2 (en) * 2001-12-06 2003-12-30 Seh America, Inc. Method of producing a high resistivity silicon wafer utilizing heat treatment that occurs during device fabrication
US6673147B2 (en) * 2001-12-06 2004-01-06 Seh America, Inc. High resistivity silicon wafer having electrically inactive dopant and method of producing same
KR100745309B1 (ko) * 2002-04-10 2007-08-01 엠이엠씨 일렉트로닉 머티리얼즈 인코포레이티드 이상적인 산소 침전 실리콘 웨이퍼에서 디누드 구역깊이를 조절하기 위한 방법
DE102004060624B4 (de) * 2004-12-16 2010-12-02 Siltronic Ag Halbleiterscheibe mit epitaktisch abgeschiedener Schicht und Verfahren zur Herstellung der Halbleiterscheibe
US7485928B2 (en) * 2005-11-09 2009-02-03 Memc Electronic Materials, Inc. Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering
US20090004458A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Diffusion Control in Heavily Doped Substrates

Also Published As

Publication number Publication date
CN101689504A (zh) 2010-03-31
US20110177682A1 (en) 2011-07-21
US20090004426A1 (en) 2009-01-01
EP2168150A1 (en) 2010-03-31
TW200919585A (en) 2009-05-01
KR20100039291A (ko) 2010-04-15
WO2009006182A1 (en) 2009-01-08

Similar Documents

Publication Publication Date Title
JP2010532584A (ja) 高ドープ単結晶シリコン基板の酸素析出物の抑制
JP2010532585A (ja) 高ドープ基板の拡散制御
JP2010532584A5 (enExample)
JP2006344823A (ja) Ｉｇｂｔ用のシリコンウェーハ及びその製造方法
JP2010161393A (ja) 窒素／炭素安定化された酸素析出核形成中心を有する理想的酸素析出を行ったシリコンウエハおよびその製造方法
US7201800B2 (en) Process for making silicon wafers with stabilized oxygen precipitate nucleation centers
US6808781B2 (en) Silicon wafers with stabilized oxygen precipitate nucleation centers and process for making the same
JP2004503086A (ja) 削剥領域を備えたシリコンウエハの製造方法及び製造装置
JP5076326B2 (ja) シリコンウェーハおよびその製造方法
JP5103745B2 (ja) 高周波ダイオードおよびその製造方法
US7242037B2 (en) Process for making non-uniform minority carrier lifetime distribution in high performance silicon power devices
JP2011054656A (ja) 高抵抗シリコンウェーハおよびその製造方法
JP4270713B2 (ja) シリコンエピタキシャルウェーハの製造方法
KR102808350B1 (ko) 탄소도프 실리콘 단결정 웨이퍼 및 그의 제조방법
EP3208366A1 (en) Fz silicon and method to prepare fz silicon
JP2011054655A (ja) 高周波デバイス向けシリコンウェーハおよびその製造方法
JP5922858B2 (ja) 高抵抗シリコンウェーハの製造方法
JP2017157812A (ja) ウェハの熱処理方法
EP1484789A1 (en) Non-uniform minority carrier lifetime distributions in high performance silicon power devices

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20110406

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20110406

A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20130306