JP2010514166A5 - - Google Patents

Download PDF

Info

Publication number
JP2010514166A5
JP2010514166A5 JP2009541642A JP2009541642A JP2010514166A5 JP 2010514166 A5 JP2010514166 A5 JP 2010514166A5 JP 2009541642 A JP2009541642 A JP 2009541642A JP 2009541642 A JP2009541642 A JP 2009541642A JP 2010514166 A5 JP2010514166 A5 JP 2010514166A5
Authority
JP
Japan
Prior art keywords
exposing
layer
oxygen
plasma
containing plasma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009541642A
Other languages
English (en)
Japanese (ja)
Other versions
JP5383501B2 (ja
JP2010514166A (ja
Filing date
Publication date
Application filed filed Critical
Priority claimed from PCT/US2007/087894 external-priority patent/WO2008077020A2/en
Publication of JP2010514166A publication Critical patent/JP2010514166A/ja
Publication of JP2010514166A5 publication Critical patent/JP2010514166A5/ja
Application granted granted Critical
Publication of JP5383501B2 publication Critical patent/JP5383501B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2009541642A 2006-12-18 2007-12-18 低エネルギーの高用量ヒ素、リン、ホウ素注入ウエハの安全な取り扱い Expired - Fee Related JP5383501B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US87057506P 2006-12-18 2006-12-18
US60/870,575 2006-12-18
PCT/US2007/087894 WO2008077020A2 (en) 2006-12-18 2007-12-18 Safe handling of low energy, high dose arsenic, phosphorus, and boron implanted wafers

Publications (3)

Publication Number Publication Date
JP2010514166A JP2010514166A (ja) 2010-04-30
JP2010514166A5 true JP2010514166A5 (enExample) 2010-12-09
JP5383501B2 JP5383501B2 (ja) 2014-01-08

Family

ID=39537046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009541642A Expired - Fee Related JP5383501B2 (ja) 2006-12-18 2007-12-18 低エネルギーの高用量ヒ素、リン、ホウ素注入ウエハの安全な取り扱い

Country Status (6)

Country Link
US (3) US20080153271A1 (enExample)
JP (1) JP5383501B2 (enExample)
KR (1) KR101369993B1 (enExample)
CN (1) CN101548190A (enExample)
TW (1) TWI508142B (enExample)
WO (1) WO2008077020A2 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8118946B2 (en) * 2007-11-30 2012-02-21 Wesley George Lau Cleaning process residues from substrate processing chamber components
CN102203946A (zh) * 2008-10-31 2011-09-28 应用材料股份有限公司 P3i工艺中掺杂分布的修正
US7858503B2 (en) * 2009-02-06 2010-12-28 Applied Materials, Inc. Ion implanted substrate having capping layer and method
TW201205648A (en) * 2010-06-23 2012-02-01 Tokyo Electron Ltd Plasma doping device, plasma doping method, method for manufacturing semiconductor element, and semiconductor element
US8501605B2 (en) 2011-03-14 2013-08-06 Applied Materials, Inc. Methods and apparatus for conformal doping
WO2012154373A2 (en) * 2011-05-11 2012-11-15 Applied Materials, Inc. Surface dose retention of dopants by pre-amorphization and post-implant passivation treatments
WO2013164940A1 (ja) * 2012-05-01 2013-11-07 東京エレクトロン株式会社 被処理基体にドーパントを注入する方法、及びプラズマドーピング装置
US9840523B2 (en) 2014-05-30 2017-12-12 Dow Corning Corporation Process of synthesizing diisopropylamino-disilanes
FR3033079B1 (fr) * 2015-02-19 2018-04-27 Ion Beam Services Procede de passivation d'un substrat et machine pour la mise en oeuvre de ce procede
KR102555142B1 (ko) * 2016-09-14 2023-07-13 어플라이드 머티어리얼스, 인코포레이티드 비소 관련 프로세스들을 위한 탈기 챔버
US11501972B2 (en) * 2020-07-22 2022-11-15 Applied Materials, Inc. Sacrificial capping layer for passivation using plasma-based implant process
US12494251B2 (en) * 2022-08-26 2025-12-09 Micron Technology, Inc. Memory circuitry and method used in forming memory circuitry

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4226667A (en) * 1978-10-31 1980-10-07 Bell Telephone Laboratories, Incorporated Oxide masking of gallium arsenide
US5196370A (en) * 1990-11-08 1993-03-23 Matsushita Electronics Corporation Method of manufacturing an arsenic-including compound semiconductor device
JP3103629B2 (ja) * 1990-11-08 2000-10-30 松下電子工業株式会社 砒化化合物半導体装置の製造方法
US6039851A (en) * 1995-03-22 2000-03-21 Micron Technology, Inc. Reactive sputter faceting of silicon dioxide to enhance gap fill of spaces between metal lines
JPH1131665A (ja) * 1997-07-11 1999-02-02 Hitachi Ltd 半導体集積回路装置の製造方法
KR100271043B1 (ko) * 1997-11-28 2000-11-01 구본준, 론 위라하디락사 액정표시장치의 기판 및 그 제조방법(liquid crystal display and method of manufacturing the same)
EP0932191A1 (en) * 1997-12-30 1999-07-28 International Business Machines Corporation Method of plasma etching doped polysilicon layers with uniform etch rates
US6376285B1 (en) * 1998-05-28 2002-04-23 Texas Instruments Incorporated Annealed porous silicon with epitaxial layer for SOI
US6239034B1 (en) * 1998-11-02 2001-05-29 Vanguard International Semiconductor Corporation Method of manufacturing inter-metal dielectric layers for semiconductor devices
US20020033233A1 (en) * 1999-06-08 2002-03-21 Stephen E. Savas Icp reactor having a conically-shaped plasma-generating section
JP2001085392A (ja) * 1999-09-10 2001-03-30 Toshiba Corp 半導体装置の製造方法
US6586318B1 (en) * 1999-12-28 2003-07-01 Xerox Corporation Thin phosphorus nitride film as an N-type doping source used in laser doping technology
US7037813B2 (en) * 2000-08-11 2006-05-02 Applied Materials, Inc. Plasma immersion ion implantation process using a capacitively coupled plasma source having low dissociation and low minimum plasma voltage
US7064399B2 (en) * 2000-09-15 2006-06-20 Texas Instruments Incorporated Advanced CMOS using super steep retrograde wells
US6613695B2 (en) * 2000-11-24 2003-09-02 Asm America, Inc. Surface preparation prior to deposition
US6566283B1 (en) * 2001-02-15 2003-05-20 Advanced Micro Devices, Inc. Silane treatment of low dielectric constant materials in semiconductor device manufacturing
US6855436B2 (en) * 2003-05-30 2005-02-15 International Business Machines Corporation Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal
KR100428769B1 (ko) * 2001-06-22 2004-04-28 삼성전자주식회사 반도체 롬 장치 형성 방법
JP4151884B2 (ja) * 2001-08-08 2008-09-17 独立行政法人理化学研究所 固体表面に複合金属酸化物のナノ材料が形成された材料の製造方法
US7003111B2 (en) * 2001-10-11 2006-02-21 International Business Machines Corporation Method, system, and program, for encoding and decoding input data
JP3578345B2 (ja) * 2002-03-27 2004-10-20 株式会社半導体先端テクノロジーズ 半導体装置の製造方法および半導体装置
JP4001498B2 (ja) * 2002-03-29 2007-10-31 東京エレクトロン株式会社 絶縁膜の形成方法及び絶縁膜の形成システム
US6743651B2 (en) * 2002-04-23 2004-06-01 International Business Machines Corporation Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen
US20040072446A1 (en) * 2002-07-02 2004-04-15 Applied Materials, Inc. Method for fabricating an ultra shallow junction of a field effect transistor
US6841457B2 (en) * 2002-07-16 2005-01-11 International Business Machines Corporation Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion
US20050205986A1 (en) * 2004-03-18 2005-09-22 Ikuroh Ichitsubo Module with integrated active substrate and passive substrate
US20060011906A1 (en) * 2004-07-14 2006-01-19 International Business Machines Corporation Ion implantation for suppression of defects in annealed SiGe layers
US7037818B2 (en) * 2004-08-20 2006-05-02 International Business Machines Corporation Apparatus and method for staircase raised source/drain structure
US7141457B2 (en) * 2004-11-18 2006-11-28 International Business Machines Corporation Method to form Si-containing SOI and underlying substrate with different orientations
US20060205192A1 (en) * 2005-03-09 2006-09-14 Varian Semiconductor Equipment Associates, Inc. Shallow-junction fabrication in semiconductor devices via plasma implantation and deposition
US7504314B2 (en) * 2005-04-06 2009-03-17 International Business Machines Corporation Method for fabricating oxygen-implanted silicon on insulation type semiconductor and semiconductor formed therefrom

Similar Documents

Publication Publication Date Title
JP2010514166A5 (enExample)
USRE47170E1 (en) Method of forming semiconductor patterns
JP2010512650A5 (enExample)
JP2010534935A5 (enExample)
TWI636485B (zh) 利用離子佈植於非晶碳膜中開發高蝕刻選擇性的硬光罩材料
JP2020502790A (ja) 半導体処理装置
JP2015111668A5 (enExample)
JP2017501591A5 (enExample)
TW200834245A (en) Method for manufacturing semiconductor device with four-layered laminate
TW200834662A (en) Wet photoresist stripping process and apparatus
WO2015074621A1 (zh) 控制浅沟槽深度微负载效应的刻蚀方法
JP2009531857A5 (enExample)
WO2013015559A2 (ko) 그래핀의 원자층 식각 방법
TW201243998A (en) Trench embedding method and film-forming apparatus
JP2018512727A5 (enExample)
JP2011530174A5 (enExample)
TW200629416A (en) Semiconductor device and fabrication method thereof
JP2006528418A5 (enExample)
JP2019517743A5 (enExample)
TW200802540A (en) Method and apparatus for providing mask in semiconductor processing
CN101167165A (zh) 增加pecvd氮化硅膜层的压缩应力的方法
CN1893028A (zh) 具有氧化物间隔层的应变源漏cmos的集成方法
JP2012507866A5 (enExample)
TW550664B (en) Method for forming a resist pattern and method for manufacturing a semiconductor device
TW200623264A (en) A method for forming a thin complete high-permittivity dielectric layer