KR101369993B1 - 낮은 에너지를 가지며 많은 양의 비소, 인, 및 붕소 주입된 웨이퍼의 안전한 핸들링 - Google Patents

낮은 에너지를 가지며 많은 양의 비소, 인, 및 붕소 주입된 웨이퍼의 안전한 핸들링 Download PDF

Info

Publication number
KR101369993B1
KR101369993B1 KR1020097015192A KR20097015192A KR101369993B1 KR 101369993 B1 KR101369993 B1 KR 101369993B1 KR 1020097015192 A KR1020097015192 A KR 1020097015192A KR 20097015192 A KR20097015192 A KR 20097015192A KR 101369993 B1 KR101369993 B1 KR 101369993B1
Authority
KR
South Korea
Prior art keywords
dopant
film
layer
exposing
substrate processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020097015192A
Other languages
English (en)
Korean (ko)
Other versions
KR20090100421A (ko
Inventor
마지드 에이. 포드
마노지 벨라이칼
카르티크 산타남
Original Assignee
어플라이드 머티어리얼스, 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 어플라이드 머티어리얼스, 인코포레이티드 filed Critical 어플라이드 머티어리얼스, 인코포레이티드
Publication of KR20090100421A publication Critical patent/KR20090100421A/ko
Application granted granted Critical
Publication of KR101369993B1 publication Critical patent/KR101369993B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/3003—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32357—Generation remote from the workpiece, e.g. down-stream
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • H01L21/2236—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase from or into a plasma phase

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Analytical Chemistry (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Physical Vapour Deposition (AREA)
KR1020097015192A 2006-12-18 2007-12-18 낮은 에너지를 가지며 많은 양의 비소, 인, 및 붕소 주입된 웨이퍼의 안전한 핸들링 Expired - Fee Related KR101369993B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US87057506P 2006-12-18 2006-12-18
US60/870,575 2006-12-18
PCT/US2007/087894 WO2008077020A2 (en) 2006-12-18 2007-12-18 Safe handling of low energy, high dose arsenic, phosphorus, and boron implanted wafers

Publications (2)

Publication Number Publication Date
KR20090100421A KR20090100421A (ko) 2009-09-23
KR101369993B1 true KR101369993B1 (ko) 2014-03-06

Family

ID=39537046

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020097015192A Expired - Fee Related KR101369993B1 (ko) 2006-12-18 2007-12-18 낮은 에너지를 가지며 많은 양의 비소, 인, 및 붕소 주입된 웨이퍼의 안전한 핸들링

Country Status (6)

Country Link
US (3) US20080153271A1 (enExample)
JP (1) JP5383501B2 (enExample)
KR (1) KR101369993B1 (enExample)
CN (1) CN101548190A (enExample)
TW (1) TWI508142B (enExample)
WO (1) WO2008077020A2 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8118946B2 (en) * 2007-11-30 2012-02-21 Wesley George Lau Cleaning process residues from substrate processing chamber components
WO2010051283A1 (en) * 2008-10-31 2010-05-06 Applied Materials, Inc. Doping profile modification in p3i process
US7858503B2 (en) * 2009-02-06 2010-12-28 Applied Materials, Inc. Ion implanted substrate having capping layer and method
JP2013534712A (ja) * 2010-06-23 2013-09-05 東京エレクトロン株式会社 プラズマドーピング装置、プラズマドーピング方法、半導体素子の製造方法、および半導体素子
US8501605B2 (en) * 2011-03-14 2013-08-06 Applied Materials, Inc. Methods and apparatus for conformal doping
US20120289036A1 (en) * 2011-05-11 2012-11-15 Applied Materials, Inc. Surface dose retention of dopants by pre-amorphization and post implant passivation treatments
US20150132929A1 (en) * 2012-05-01 2015-05-14 Tokyo Electron Limited Method for injecting dopant into substrate to be processed, and plasma doping apparatus
EP3149011A4 (en) 2014-05-30 2018-06-13 Dow Corning Corporation Process of synthesizing diisopropylaminw-disilanes
FR3033079B1 (fr) * 2015-02-19 2018-04-27 Ion Beam Services Procede de passivation d'un substrat et machine pour la mise en oeuvre de ce procede
KR102555142B1 (ko) 2016-09-14 2023-07-13 어플라이드 머티어리얼스, 인코포레이티드 비소 관련 프로세스들을 위한 탈기 챔버
US11501972B2 (en) * 2020-07-22 2022-11-15 Applied Materials, Inc. Sacrificial capping layer for passivation using plasma-based implant process
US12494251B2 (en) * 2022-08-26 2025-12-09 Micron Technology, Inc. Memory circuitry and method used in forming memory circuitry

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003282473A (ja) * 2002-03-27 2003-10-03 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法および半導体装置
US20040072446A1 (en) * 2002-07-02 2004-04-15 Applied Materials, Inc. Method for fabricating an ultra shallow junction of a field effect transistor
US20060205192A1 (en) * 2005-03-09 2006-09-14 Varian Semiconductor Equipment Associates, Inc. Shallow-junction fabrication in semiconductor devices via plasma implantation and deposition

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4226667A (en) * 1978-10-31 1980-10-07 Bell Telephone Laboratories, Incorporated Oxide masking of gallium arsenide
US5196370A (en) * 1990-11-08 1993-03-23 Matsushita Electronics Corporation Method of manufacturing an arsenic-including compound semiconductor device
JP3103629B2 (ja) * 1990-11-08 2000-10-30 松下電子工業株式会社 砒化化合物半導体装置の製造方法
US6039851A (en) * 1995-03-22 2000-03-21 Micron Technology, Inc. Reactive sputter faceting of silicon dioxide to enhance gap fill of spaces between metal lines
JPH1131665A (ja) * 1997-07-11 1999-02-02 Hitachi Ltd 半導体集積回路装置の製造方法
KR100271043B1 (ko) * 1997-11-28 2000-11-01 구본준, 론 위라하디락사 액정표시장치의 기판 및 그 제조방법(liquid crystal display and method of manufacturing the same)
EP0932191A1 (en) * 1997-12-30 1999-07-28 International Business Machines Corporation Method of plasma etching doped polysilicon layers with uniform etch rates
US6376285B1 (en) * 1998-05-28 2002-04-23 Texas Instruments Incorporated Annealed porous silicon with epitaxial layer for SOI
US6239034B1 (en) * 1998-11-02 2001-05-29 Vanguard International Semiconductor Corporation Method of manufacturing inter-metal dielectric layers for semiconductor devices
US20020033233A1 (en) * 1999-06-08 2002-03-21 Stephen E. Savas Icp reactor having a conically-shaped plasma-generating section
JP2001085392A (ja) * 1999-09-10 2001-03-30 Toshiba Corp 半導体装置の製造方法
US6586318B1 (en) * 1999-12-28 2003-07-01 Xerox Corporation Thin phosphorus nitride film as an N-type doping source used in laser doping technology
US7037813B2 (en) * 2000-08-11 2006-05-02 Applied Materials, Inc. Plasma immersion ion implantation process using a capacitively coupled plasma source having low dissociation and low minimum plasma voltage
US7064399B2 (en) * 2000-09-15 2006-06-20 Texas Instruments Incorporated Advanced CMOS using super steep retrograde wells
US6613695B2 (en) * 2000-11-24 2003-09-02 Asm America, Inc. Surface preparation prior to deposition
US6566283B1 (en) * 2001-02-15 2003-05-20 Advanced Micro Devices, Inc. Silane treatment of low dielectric constant materials in semiconductor device manufacturing
US6855436B2 (en) * 2003-05-30 2005-02-15 International Business Machines Corporation Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal
KR100428769B1 (ko) * 2001-06-22 2004-04-28 삼성전자주식회사 반도체 롬 장치 형성 방법
JP4151884B2 (ja) * 2001-08-08 2008-09-17 独立行政法人理化学研究所 固体表面に複合金属酸化物のナノ材料が形成された材料の製造方法
US7003111B2 (en) * 2001-10-11 2006-02-21 International Business Machines Corporation Method, system, and program, for encoding and decoding input data
JP4001498B2 (ja) * 2002-03-29 2007-10-31 東京エレクトロン株式会社 絶縁膜の形成方法及び絶縁膜の形成システム
US6743651B2 (en) * 2002-04-23 2004-06-01 International Business Machines Corporation Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen
US6841457B2 (en) * 2002-07-16 2005-01-11 International Business Machines Corporation Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion
US20050205986A1 (en) * 2004-03-18 2005-09-22 Ikuroh Ichitsubo Module with integrated active substrate and passive substrate
US20060011906A1 (en) * 2004-07-14 2006-01-19 International Business Machines Corporation Ion implantation for suppression of defects in annealed SiGe layers
US7037818B2 (en) * 2004-08-20 2006-05-02 International Business Machines Corporation Apparatus and method for staircase raised source/drain structure
US7141457B2 (en) * 2004-11-18 2006-11-28 International Business Machines Corporation Method to form Si-containing SOI and underlying substrate with different orientations
US7504314B2 (en) * 2005-04-06 2009-03-17 International Business Machines Corporation Method for fabricating oxygen-implanted silicon on insulation type semiconductor and semiconductor formed therefrom

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003282473A (ja) * 2002-03-27 2003-10-03 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法および半導体装置
US20040072446A1 (en) * 2002-07-02 2004-04-15 Applied Materials, Inc. Method for fabricating an ultra shallow junction of a field effect transistor
US20060205192A1 (en) * 2005-03-09 2006-09-14 Varian Semiconductor Equipment Associates, Inc. Shallow-junction fabrication in semiconductor devices via plasma implantation and deposition

Also Published As

Publication number Publication date
WO2008077020A2 (en) 2008-06-26
TWI508142B (zh) 2015-11-11
US20140248759A1 (en) 2014-09-04
JP5383501B2 (ja) 2014-01-08
CN101548190A (zh) 2009-09-30
JP2010514166A (ja) 2010-04-30
KR20090100421A (ko) 2009-09-23
US8927400B2 (en) 2015-01-06
US20080153271A1 (en) 2008-06-26
TW200834681A (en) 2008-08-16
WO2008077020A3 (en) 2008-08-28
US20100173484A1 (en) 2010-07-08

Similar Documents

Publication Publication Date Title
KR101369993B1 (ko) 낮은 에너지를 가지며 많은 양의 비소, 인, 및 붕소 주입된 웨이퍼의 안전한 핸들링
US7989329B2 (en) Removal of surface dopants from a substrate
US8084105B2 (en) Method of depositing boron nitride and boron nitride-derived materials
KR102384484B1 (ko) 펄싱된 플라즈마 노출을 사용하여 플라즈마 강화된 원자층 증착
US20140273530A1 (en) Post-Deposition Treatment Methods For Silicon Nitride
US9076646B2 (en) Plasma enhanced atomic layer deposition with pulsed plasma exposure
KR101164688B1 (ko) 게이트 스택 측벽 스페이서들을 제조하기 위한 방법
KR101736528B1 (ko) 컨포멀 붕소 질화물 막의 증착
CN101558183B (zh) 等离子体沉浸离子注入工艺
KR20110016916A (ko) 컨포멀 ｐｅｃｖｄ 막들을 이용하는 임계 치수 축소를 위한 방법
CN101167165B (zh) 增加pecvd氮化硅膜层的压缩应力的方法
WO2006055459A2 (en) Tensile and compressive stressed materials for semiconductors
KR102691504B1 (ko) 펄스형 플라즈마 증착 에칭 스텝 커버리지 개선
US8288257B2 (en) Doping profile modification in P3I process
KR20110091722A (ko) Ｐ3ｉ 챔버에서 등각 도핑의 개선
JP2017045943A (ja) 窒化物半導体装置の製造方法

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R17-X000 Change to representative recorded

St.27 status event code: A-3-3-R10-R17-oth-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

FPAY Annual fee payment

Payment date: 20161229

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20180212

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

FPAY Annual fee payment

Payment date: 20190225

Year of fee payment: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 11

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20250227

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20250227