TWI508142B - 低能量、高劑量砷、磷與硼植入晶圓的安全處理 - Google Patents

低能量、高劑量砷、磷與硼植入晶圓的安全處理 Download PDF

Info

Publication number
TWI508142B
TWI508142B TW096148507A TW96148507A TWI508142B TW I508142 B TWI508142 B TW I508142B TW 096148507 A TW096148507 A TW 096148507A TW 96148507 A TW96148507 A TW 96148507A TW I508142 B TWI508142 B TW I508142B
Authority
TW
Taiwan
Prior art keywords
layer
film layer
oxygen
exposing
plasma
Prior art date
Application number
TW096148507A
Other languages
English (en)
Chinese (zh)
Other versions
TW200834681A (en
Inventor
Majeed A Foad
Manoj Vellaikal
Kartik Santhanam
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Publication of TW200834681A publication Critical patent/TW200834681A/zh
Application granted granted Critical
Publication of TWI508142B publication Critical patent/TWI508142B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/3003—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32357—Generation remote from the workpiece, e.g. down-stream
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • H01L21/2236—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase from or into a plasma phase

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Physical Vapour Deposition (AREA)
TW096148507A 2006-12-18 2007-12-18 低能量、高劑量砷、磷與硼植入晶圓的安全處理 TWI508142B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US87057506P 2006-12-18 2006-12-18

Publications (2)

Publication Number Publication Date
TW200834681A TW200834681A (en) 2008-08-16
TWI508142B true TWI508142B (zh) 2015-11-11

Family

ID=39537046

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096148507A TWI508142B (zh) 2006-12-18 2007-12-18 低能量、高劑量砷、磷與硼植入晶圓的安全處理

Country Status (6)

Country Link
US (3) US20080153271A1 (enExample)
JP (1) JP5383501B2 (enExample)
KR (1) KR101369993B1 (enExample)
CN (1) CN101548190A (enExample)
TW (1) TWI508142B (enExample)
WO (1) WO2008077020A2 (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8118946B2 (en) * 2007-11-30 2012-02-21 Wesley George Lau Cleaning process residues from substrate processing chamber components
CN102203946A (zh) * 2008-10-31 2011-09-28 应用材料股份有限公司 P3i工艺中掺杂分布的修正
US7858503B2 (en) * 2009-02-06 2010-12-28 Applied Materials, Inc. Ion implanted substrate having capping layer and method
TW201205648A (en) * 2010-06-23 2012-02-01 Tokyo Electron Ltd Plasma doping device, plasma doping method, method for manufacturing semiconductor element, and semiconductor element
US8501605B2 (en) 2011-03-14 2013-08-06 Applied Materials, Inc. Methods and apparatus for conformal doping
WO2012154373A2 (en) * 2011-05-11 2012-11-15 Applied Materials, Inc. Surface dose retention of dopants by pre-amorphization and post-implant passivation treatments
WO2013164940A1 (ja) * 2012-05-01 2013-11-07 東京エレクトロン株式会社 被処理基体にドーパントを注入する方法、及びプラズマドーピング装置
US9840523B2 (en) 2014-05-30 2017-12-12 Dow Corning Corporation Process of synthesizing diisopropylamino-disilanes
FR3033079B1 (fr) * 2015-02-19 2018-04-27 Ion Beam Services Procede de passivation d'un substrat et machine pour la mise en oeuvre de ce procede
KR102555142B1 (ko) * 2016-09-14 2023-07-13 어플라이드 머티어리얼스, 인코포레이티드 비소 관련 프로세스들을 위한 탈기 챔버
US11501972B2 (en) * 2020-07-22 2022-11-15 Applied Materials, Inc. Sacrificial capping layer for passivation using plasma-based implant process
US12494251B2 (en) * 2022-08-26 2025-12-09 Micron Technology, Inc. Memory circuitry and method used in forming memory circuitry

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5196370A (en) * 1990-11-08 1993-03-23 Matsushita Electronics Corporation Method of manufacturing an arsenic-including compound semiconductor device
US6039851A (en) * 1995-03-22 2000-03-21 Micron Technology, Inc. Reactive sputter faceting of silicon dioxide to enhance gap fill of spaces between metal lines
US6274512B1 (en) * 1999-09-10 2001-08-14 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device
US6344884B1 (en) * 1997-11-28 2002-02-05 Lg.Philips Lcd Co., Ltd. Liquid crystal display device substrate and method for manufacturing thereof
US20030047028A1 (en) * 2001-08-08 2003-03-13 Toyoki Kunitake Nanomaterials of composite metal oxides
US20060040484A1 (en) * 2004-08-20 2006-02-23 International Business Machines Corporation Apparatus and method for staircase raised source/drain structure
US20060205192A1 (en) * 2005-03-09 2006-09-14 Varian Semiconductor Equipment Associates, Inc. Shallow-junction fabrication in semiconductor devices via plasma implantation and deposition

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4226667A (en) * 1978-10-31 1980-10-07 Bell Telephone Laboratories, Incorporated Oxide masking of gallium arsenide
JP3103629B2 (ja) * 1990-11-08 2000-10-30 松下電子工業株式会社 砒化化合物半導体装置の製造方法
JPH1131665A (ja) * 1997-07-11 1999-02-02 Hitachi Ltd 半導体集積回路装置の製造方法
EP0932191A1 (en) * 1997-12-30 1999-07-28 International Business Machines Corporation Method of plasma etching doped polysilicon layers with uniform etch rates
US6376285B1 (en) * 1998-05-28 2002-04-23 Texas Instruments Incorporated Annealed porous silicon with epitaxial layer for SOI
US6239034B1 (en) * 1998-11-02 2001-05-29 Vanguard International Semiconductor Corporation Method of manufacturing inter-metal dielectric layers for semiconductor devices
US20020033233A1 (en) * 1999-06-08 2002-03-21 Stephen E. Savas Icp reactor having a conically-shaped plasma-generating section
US6586318B1 (en) * 1999-12-28 2003-07-01 Xerox Corporation Thin phosphorus nitride film as an N-type doping source used in laser doping technology
US7037813B2 (en) * 2000-08-11 2006-05-02 Applied Materials, Inc. Plasma immersion ion implantation process using a capacitively coupled plasma source having low dissociation and low minimum plasma voltage
US7064399B2 (en) * 2000-09-15 2006-06-20 Texas Instruments Incorporated Advanced CMOS using super steep retrograde wells
US6613695B2 (en) * 2000-11-24 2003-09-02 Asm America, Inc. Surface preparation prior to deposition
US6566283B1 (en) * 2001-02-15 2003-05-20 Advanced Micro Devices, Inc. Silane treatment of low dielectric constant materials in semiconductor device manufacturing
US6855436B2 (en) * 2003-05-30 2005-02-15 International Business Machines Corporation Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal
KR100428769B1 (ko) * 2001-06-22 2004-04-28 삼성전자주식회사 반도체 롬 장치 형성 방법
US7003111B2 (en) * 2001-10-11 2006-02-21 International Business Machines Corporation Method, system, and program, for encoding and decoding input data
JP3578345B2 (ja) * 2002-03-27 2004-10-20 株式会社半導体先端テクノロジーズ 半導体装置の製造方法および半導体装置
JP4001498B2 (ja) * 2002-03-29 2007-10-31 東京エレクトロン株式会社 絶縁膜の形成方法及び絶縁膜の形成システム
US6743651B2 (en) * 2002-04-23 2004-06-01 International Business Machines Corporation Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen
US20040072446A1 (en) * 2002-07-02 2004-04-15 Applied Materials, Inc. Method for fabricating an ultra shallow junction of a field effect transistor
US6841457B2 (en) * 2002-07-16 2005-01-11 International Business Machines Corporation Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion
US20050205986A1 (en) * 2004-03-18 2005-09-22 Ikuroh Ichitsubo Module with integrated active substrate and passive substrate
US20060011906A1 (en) * 2004-07-14 2006-01-19 International Business Machines Corporation Ion implantation for suppression of defects in annealed SiGe layers
US7141457B2 (en) * 2004-11-18 2006-11-28 International Business Machines Corporation Method to form Si-containing SOI and underlying substrate with different orientations
US7504314B2 (en) * 2005-04-06 2009-03-17 International Business Machines Corporation Method for fabricating oxygen-implanted silicon on insulation type semiconductor and semiconductor formed therefrom

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5196370A (en) * 1990-11-08 1993-03-23 Matsushita Electronics Corporation Method of manufacturing an arsenic-including compound semiconductor device
US6039851A (en) * 1995-03-22 2000-03-21 Micron Technology, Inc. Reactive sputter faceting of silicon dioxide to enhance gap fill of spaces between metal lines
US6344884B1 (en) * 1997-11-28 2002-02-05 Lg.Philips Lcd Co., Ltd. Liquid crystal display device substrate and method for manufacturing thereof
US6274512B1 (en) * 1999-09-10 2001-08-14 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device
US20030047028A1 (en) * 2001-08-08 2003-03-13 Toyoki Kunitake Nanomaterials of composite metal oxides
US20060040484A1 (en) * 2004-08-20 2006-02-23 International Business Machines Corporation Apparatus and method for staircase raised source/drain structure
US20060205192A1 (en) * 2005-03-09 2006-09-14 Varian Semiconductor Equipment Associates, Inc. Shallow-junction fabrication in semiconductor devices via plasma implantation and deposition

Also Published As

Publication number Publication date
WO2008077020A2 (en) 2008-06-26
KR101369993B1 (ko) 2014-03-06
US8927400B2 (en) 2015-01-06
JP5383501B2 (ja) 2014-01-08
KR20090100421A (ko) 2009-09-23
US20100173484A1 (en) 2010-07-08
JP2010514166A (ja) 2010-04-30
US20080153271A1 (en) 2008-06-26
TW200834681A (en) 2008-08-16
WO2008077020A3 (en) 2008-08-28
CN101548190A (zh) 2009-09-30
US20140248759A1 (en) 2014-09-04

Similar Documents

Publication Publication Date Title
TWI508142B (zh) 低能量、高劑量砷、磷與硼植入晶圓的安全處理
US10707116B2 (en) Cyclic flowable deposition and high-density plasma treatment processes for high quality gap fill solutions
US10008428B2 (en) Methods for depositing films on sensitive substrates
US9214333B1 (en) Methods and apparatuses for uniform reduction of the in-feature wet etch rate of a silicon nitride film formed by ALD
US9076646B2 (en) Plasma enhanced atomic layer deposition with pulsed plasma exposure
KR101853802B1 (ko) 라디칼­성분 ｃｖｄ에 의한 컨포멀 층들
TWI541376B (zh) 共形的氮碳化矽及氮化矽薄膜之低溫電漿輔助化學氣相沉積
KR102443554B1 (ko) 실리콘 옥사이드를 증착하기 위한 방법들
US9478415B2 (en) Method for forming film having low resistance and shallow junction depth
KR101327923B1 (ko) 보론 니트라이드 및 보론 니트라이드-유도된 물질 증착 방법
US20140273530A1 (en) Post-Deposition Treatment Methods For Silicon Nitride
KR20180073483A (ko) 기판 상의 구조물 형성 방법
US20120309205A1 (en) Capping layer for reduced outgassing
JP2017531920A (ja) 高温酸化ケイ素原子層堆積技術
KR20180058232A (ko) SiO 및 SiN을 포함하는 유동성 막들을 증착시키는 방법들
TW202317808A (zh) 在反應空間中在基板上形成氮化矽薄膜的方法
US20140273524A1 (en) Plasma Doping Of Silicon-Containing Films
KR20150037662A (ko) 복합 ｐｅａｌｄ 및 ｐｅｃｖｄ 방법을 사용하여 가변 애스팩트 비 피처들의 갭충진
CN100561708C (zh) 制造受应力电晶体结构的集成制程
CN107406983B (zh) 通过沉积调整来解决fcvd的线条弯曲
CN112640063A (zh) 基板处理装置、半导体装置的制造方法及程序
WO2015116350A1 (en) Low temperature cure modulus enhancement
KR20210109046A (ko) 질화규소를 증착하는 방법들
US20250179632A1 (en) Surface inhibition atomic layer deposition
US20250226227A1 (en) Deposition of metal-containing films and chamber clean

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees