CN101548190A - 低能量、高剂量砷、磷与硼注入晶片的安全处理 - Google Patents

低能量、高剂量砷、磷与硼注入晶片的安全处理 Download PDF

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Publication number
CN101548190A
CN101548190A CNA2007800445412A CN200780044541A CN101548190A CN 101548190 A CN101548190 A CN 101548190A CN A2007800445412 A CNA2007800445412 A CN A2007800445412A CN 200780044541 A CN200780044541 A CN 200780044541A CN 101548190 A CN101548190 A CN 101548190A
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rete
exposed
electricity slurry
layer
oxygen
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English (en)
Chinese (zh)
Inventor
马耶德·A·福阿德
麦诺基·韦列卡
卡提克·桑瑟南姆
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Applied Materials Inc
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Applied Materials Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/3003Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32357Generation remote from the workpiece, e.g. down-stream
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • H01L21/2236Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase from or into a plasma phase

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Physical Vapour Deposition (AREA)
CNA2007800445412A 2006-12-18 2007-12-18 低能量、高剂量砷、磷与硼注入晶片的安全处理 Pending CN101548190A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US87057506P 2006-12-18 2006-12-18
US60/870,575 2006-12-18

Publications (1)

Publication Number Publication Date
CN101548190A true CN101548190A (zh) 2009-09-30

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CNA2007800445412A Pending CN101548190A (zh) 2006-12-18 2007-12-18 低能量、高剂量砷、磷与硼注入晶片的安全处理

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Country Link
US (3) US20080153271A1 (enExample)
JP (1) JP5383501B2 (enExample)
KR (1) KR101369993B1 (enExample)
CN (1) CN101548190A (enExample)
TW (1) TWI508142B (enExample)
WO (1) WO2008077020A2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107408496A (zh) * 2015-02-19 2017-11-28 离子射线服务公司 衬底稳定化方法及实施这种方法的机器
TWI745387B (zh) * 2016-09-14 2021-11-11 美商應用材料股份有限公司 用於砷相關處理的除氣腔室

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8118946B2 (en) * 2007-11-30 2012-02-21 Wesley George Lau Cleaning process residues from substrate processing chamber components
CN102203946A (zh) * 2008-10-31 2011-09-28 应用材料股份有限公司 P3i工艺中掺杂分布的修正
US7858503B2 (en) * 2009-02-06 2010-12-28 Applied Materials, Inc. Ion implanted substrate having capping layer and method
TW201205648A (en) * 2010-06-23 2012-02-01 Tokyo Electron Ltd Plasma doping device, plasma doping method, method for manufacturing semiconductor element, and semiconductor element
US8501605B2 (en) 2011-03-14 2013-08-06 Applied Materials, Inc. Methods and apparatus for conformal doping
WO2012154373A2 (en) * 2011-05-11 2012-11-15 Applied Materials, Inc. Surface dose retention of dopants by pre-amorphization and post-implant passivation treatments
WO2013164940A1 (ja) * 2012-05-01 2013-11-07 東京エレクトロン株式会社 被処理基体にドーパントを注入する方法、及びプラズマドーピング装置
US9840523B2 (en) 2014-05-30 2017-12-12 Dow Corning Corporation Process of synthesizing diisopropylamino-disilanes
US11501972B2 (en) * 2020-07-22 2022-11-15 Applied Materials, Inc. Sacrificial capping layer for passivation using plasma-based implant process
US12494251B2 (en) * 2022-08-26 2025-12-09 Micron Technology, Inc. Memory circuitry and method used in forming memory circuitry

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4226667A (en) * 1978-10-31 1980-10-07 Bell Telephone Laboratories, Incorporated Oxide masking of gallium arsenide
US5196370A (en) * 1990-11-08 1993-03-23 Matsushita Electronics Corporation Method of manufacturing an arsenic-including compound semiconductor device
JP3103629B2 (ja) * 1990-11-08 2000-10-30 松下電子工業株式会社 砒化化合物半導体装置の製造方法
US6039851A (en) * 1995-03-22 2000-03-21 Micron Technology, Inc. Reactive sputter faceting of silicon dioxide to enhance gap fill of spaces between metal lines
JPH1131665A (ja) * 1997-07-11 1999-02-02 Hitachi Ltd 半導体集積回路装置の製造方法
KR100271043B1 (ko) * 1997-11-28 2000-11-01 구본준, 론 위라하디락사 액정표시장치의 기판 및 그 제조방법(liquid crystal display and method of manufacturing the same)
EP0932191A1 (en) * 1997-12-30 1999-07-28 International Business Machines Corporation Method of plasma etching doped polysilicon layers with uniform etch rates
US6376285B1 (en) * 1998-05-28 2002-04-23 Texas Instruments Incorporated Annealed porous silicon with epitaxial layer for SOI
US6239034B1 (en) * 1998-11-02 2001-05-29 Vanguard International Semiconductor Corporation Method of manufacturing inter-metal dielectric layers for semiconductor devices
US20020033233A1 (en) * 1999-06-08 2002-03-21 Stephen E. Savas Icp reactor having a conically-shaped plasma-generating section
JP2001085392A (ja) * 1999-09-10 2001-03-30 Toshiba Corp 半導体装置の製造方法
US6586318B1 (en) * 1999-12-28 2003-07-01 Xerox Corporation Thin phosphorus nitride film as an N-type doping source used in laser doping technology
US7037813B2 (en) * 2000-08-11 2006-05-02 Applied Materials, Inc. Plasma immersion ion implantation process using a capacitively coupled plasma source having low dissociation and low minimum plasma voltage
US7064399B2 (en) * 2000-09-15 2006-06-20 Texas Instruments Incorporated Advanced CMOS using super steep retrograde wells
US6613695B2 (en) * 2000-11-24 2003-09-02 Asm America, Inc. Surface preparation prior to deposition
US6566283B1 (en) * 2001-02-15 2003-05-20 Advanced Micro Devices, Inc. Silane treatment of low dielectric constant materials in semiconductor device manufacturing
US6855436B2 (en) * 2003-05-30 2005-02-15 International Business Machines Corporation Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge interdiffusion anneal
KR100428769B1 (ko) * 2001-06-22 2004-04-28 삼성전자주식회사 반도체 롬 장치 형성 방법
JP4151884B2 (ja) * 2001-08-08 2008-09-17 独立行政法人理化学研究所 固体表面に複合金属酸化物のナノ材料が形成された材料の製造方法
US7003111B2 (en) * 2001-10-11 2006-02-21 International Business Machines Corporation Method, system, and program, for encoding and decoding input data
JP3578345B2 (ja) * 2002-03-27 2004-10-20 株式会社半導体先端テクノロジーズ 半導体装置の製造方法および半導体装置
JP4001498B2 (ja) * 2002-03-29 2007-10-31 東京エレクトロン株式会社 絶縁膜の形成方法及び絶縁膜の形成システム
US6743651B2 (en) * 2002-04-23 2004-06-01 International Business Machines Corporation Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen
US20040072446A1 (en) * 2002-07-02 2004-04-15 Applied Materials, Inc. Method for fabricating an ultra shallow junction of a field effect transistor
US6841457B2 (en) * 2002-07-16 2005-01-11 International Business Machines Corporation Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion
US20050205986A1 (en) * 2004-03-18 2005-09-22 Ikuroh Ichitsubo Module with integrated active substrate and passive substrate
US20060011906A1 (en) * 2004-07-14 2006-01-19 International Business Machines Corporation Ion implantation for suppression of defects in annealed SiGe layers
US7037818B2 (en) * 2004-08-20 2006-05-02 International Business Machines Corporation Apparatus and method for staircase raised source/drain structure
US7141457B2 (en) * 2004-11-18 2006-11-28 International Business Machines Corporation Method to form Si-containing SOI and underlying substrate with different orientations
US20060205192A1 (en) * 2005-03-09 2006-09-14 Varian Semiconductor Equipment Associates, Inc. Shallow-junction fabrication in semiconductor devices via plasma implantation and deposition
US7504314B2 (en) * 2005-04-06 2009-03-17 International Business Machines Corporation Method for fabricating oxygen-implanted silicon on insulation type semiconductor and semiconductor formed therefrom

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107408496A (zh) * 2015-02-19 2017-11-28 离子射线服务公司 衬底稳定化方法及实施这种方法的机器
TWI745387B (zh) * 2016-09-14 2021-11-11 美商應用材料股份有限公司 用於砷相關處理的除氣腔室
US11649559B2 (en) 2016-09-14 2023-05-16 Applied Materials, Inc. Method of utilizing a degassing chamber to reduce arsenic outgassing following deposition of arsenic-containing material on a substrate

Also Published As

Publication number Publication date
WO2008077020A2 (en) 2008-06-26
KR101369993B1 (ko) 2014-03-06
US8927400B2 (en) 2015-01-06
JP5383501B2 (ja) 2014-01-08
KR20090100421A (ko) 2009-09-23
US20100173484A1 (en) 2010-07-08
JP2010514166A (ja) 2010-04-30
US20080153271A1 (en) 2008-06-26
TW200834681A (en) 2008-08-16
WO2008077020A3 (en) 2008-08-28
US20140248759A1 (en) 2014-09-04
TWI508142B (zh) 2015-11-11

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