JP2009507431A5 - - Google Patents

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Publication number
JP2009507431A5
JP2009507431A5 JP2008529341A JP2008529341A JP2009507431A5 JP 2009507431 A5 JP2009507431 A5 JP 2009507431A5 JP 2008529341 A JP2008529341 A JP 2008529341A JP 2008529341 A JP2008529341 A JP 2008529341A JP 2009507431 A5 JP2009507431 A5 JP 2009507431A5
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JP
Japan
Prior art keywords
data
bit
buses
bus
parallel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008529341A
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English (en)
Japanese (ja)
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JP2009507431A (ja
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Publication date
Priority claimed from US11/218,997 external-priority patent/US7358872B2/en
Application filed filed Critical
Publication of JP2009507431A publication Critical patent/JP2009507431A/ja
Publication of JP2009507431A5 publication Critical patent/JP2009507431A5/ja
Pending legal-status Critical Current

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JP2008529341A 2005-09-01 2006-08-31 高速用途においてパラレルデータをシリアルデータに変換する方法および装置 Pending JP2009507431A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/218,997 US7358872B2 (en) 2005-09-01 2005-09-01 Method and apparatus for converting parallel data to serial data in high speed applications
PCT/US2006/034356 WO2007028095A2 (en) 2005-09-01 2006-08-31 Method and apparatus for converting parallel data to serial data in high speed applications

Publications (2)

Publication Number Publication Date
JP2009507431A JP2009507431A (ja) 2009-02-19
JP2009507431A5 true JP2009507431A5 (enExample) 2009-07-23

Family

ID=37690564

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008529341A Pending JP2009507431A (ja) 2005-09-01 2006-08-31 高速用途においてパラレルデータをシリアルデータに変換する方法および装置

Country Status (9)

Country Link
US (4) US7358872B2 (enExample)
EP (2) EP2287848A1 (enExample)
JP (1) JP2009507431A (enExample)
KR (1) KR20080050461A (enExample)
CN (1) CN101258555A (enExample)
AT (1) ATE491206T1 (enExample)
DE (1) DE602006018764D1 (enExample)
TW (1) TW200723713A (enExample)
WO (1) WO2007028095A2 (enExample)

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US8243543B2 (en) * 2008-02-29 2012-08-14 Hynix Semiconductor Inc. Semiconductor memory device for high-speed data input/output
KR100948069B1 (ko) * 2008-09-10 2010-03-16 주식회사 하이닉스반도체 데이터 출력 회로
JP4992938B2 (ja) * 2009-05-27 2012-08-08 富士通株式会社 パラレル−シリアル変換器
KR101027681B1 (ko) * 2009-06-09 2011-04-12 주식회사 하이닉스반도체 반도체 메모리 장치의 데이터 정렬 회로
US9582443B1 (en) 2010-02-12 2017-02-28 Marvell International Ltd. Serial control channel processor for executing time-based instructions
US8217814B1 (en) * 2010-12-17 2012-07-10 Mosys, Inc. Low power serial to parallel converter
CN102315852B (zh) * 2011-05-03 2014-07-30 四川和芯微电子股份有限公司 并串数据转换电路及并串数据转换系统
JP2012257047A (ja) * 2011-06-08 2012-12-27 Fujitsu Ltd パラレルシリアル変換回路、情報処理装置及び情報処理システム
US9098694B1 (en) * 2011-07-06 2015-08-04 Marvell International Ltd. Clone-resistant logic
US8767463B2 (en) * 2011-08-11 2014-07-01 Smart Modular Technologies, Inc. Non-volatile dynamic random access memory system with non-delay-lock-loop mechanism and method of operation thereof
US9530461B2 (en) * 2012-06-29 2016-12-27 Intel Corporation Architectures and techniques for providing low-power storage mechanisms
US8823558B2 (en) * 2012-08-30 2014-09-02 International Business Machines Corporation Disparity reduction for high speed serial links
JP2014049173A (ja) * 2012-09-04 2014-03-17 Toshiba Corp 半導体記憶装置
US9405538B2 (en) * 2012-12-28 2016-08-02 Intel Corporation Functional unit having tree structure to support vector sorting algorithm and other algorithms
US9448965B2 (en) * 2013-03-15 2016-09-20 Micron Technology, Inc. Receiving data streams in parallel and providing a first portion of data to a first state machine engine and a second portion to a second state machine
CN104881390B (zh) * 2015-05-11 2018-02-27 杭州紫来测控技术有限公司 通过串行并行总线相互转换以减少线缆数量的方法
CN106095574B (zh) * 2016-06-13 2019-01-08 北京唯智佳辰科技发展有限责任公司 海量计算粗颗粒并行实现及计算任务随机动态分配方法
US10658041B1 (en) * 2018-11-30 2020-05-19 Micron Technology, Inc. Apparatus and methods for serializing data output
US11789835B2 (en) * 2020-11-20 2023-10-17 Micron Technology, Inc. Test input/output speed conversion and related apparatuses and methods
MY205100A (en) * 2020-12-29 2024-10-02 Skyechip Sdn Bhd A generic physical layer providing a unified architecture for interfacing with an external memory device and methods of interfacing with an external memory device

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US4728930A (en) 1987-06-30 1988-03-01 The United States Of America As Represented By The Secretary Of The Navy Parallel-to-serial-data interface-adaptor
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