JP2009231635A - 配線基板及びその製造方法、及び半導体装置及びその製造方法 - Google Patents

配線基板及びその製造方法、及び半導体装置及びその製造方法 Download PDF

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Publication number
JP2009231635A
JP2009231635A JP2008076775A JP2008076775A JP2009231635A JP 2009231635 A JP2009231635 A JP 2009231635A JP 2008076775 A JP2008076775 A JP 2008076775A JP 2008076775 A JP2008076775 A JP 2008076775A JP 2009231635 A JP2009231635 A JP 2009231635A
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JP
Japan
Prior art keywords
stiffener
semiconductor chip
chip
multilayer wiring
base material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008076775A
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English (en)
Japanese (ja)
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JP2009231635A5 (https=
Inventor
Hiroshi Murayama
啓 村山
Masahiro Haruhara
昌宏 春原
Hideaki Sakaguchi
秀明 坂口
Mitsutoshi Higashi
光敏 東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2008076775A priority Critical patent/JP2009231635A/ja
Priority to US12/408,853 priority patent/US20090236727A1/en
Publication of JP2009231635A publication Critical patent/JP2009231635A/ja
Publication of JP2009231635A5 publication Critical patent/JP2009231635A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/40—Fillings or auxiliary members in containers, e.g. centering rings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/401—Package configurations characterised by multiple insulating or insulated package substrates, interposers or RDLs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7424—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self-supporting substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/654—Top-view layouts
    • H10W70/655—Fan-out layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01204—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using temporary auxiliary members, e.g. using sacrificial coatings or handle substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations

Landscapes

  • Wire Bonding (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
JP2008076775A 2008-03-24 2008-03-24 配線基板及びその製造方法、及び半導体装置及びその製造方法 Pending JP2009231635A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008076775A JP2009231635A (ja) 2008-03-24 2008-03-24 配線基板及びその製造方法、及び半導体装置及びその製造方法
US12/408,853 US20090236727A1 (en) 2008-03-24 2009-03-23 Wiring substrate and method of manufacturing the same, and semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008076775A JP2009231635A (ja) 2008-03-24 2008-03-24 配線基板及びその製造方法、及び半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2009231635A true JP2009231635A (ja) 2009-10-08
JP2009231635A5 JP2009231635A5 (https=) 2011-02-17

Family

ID=41088044

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008076775A Pending JP2009231635A (ja) 2008-03-24 2008-03-24 配線基板及びその製造方法、及び半導体装置及びその製造方法

Country Status (2)

Country Link
US (1) US20090236727A1 (https=)
JP (1) JP2009231635A (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013516060A (ja) * 2009-12-24 2013-05-09 アイメック 窓介在型ダイパッケージング
JP2016105484A (ja) * 2012-12-20 2016-06-09 インテル・コーポレーション 高密度有機ブリッジデバイスおよび方法
JPWO2017057446A1 (ja) * 2015-10-02 2018-07-19 旭硝子株式会社 ガラス基板、積層基板、および積層体
JP2023179821A (ja) * 2022-06-08 2023-12-20 株式会社村田製作所 回路基板及び回路モジュール

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102251170B1 (ko) * 2013-07-22 2021-05-13 헨켈 아이피 앤드 홀딩 게엠베하 웨이퍼의 압축 성형시의 웨이퍼 휨을 제어하는 방법 및 그에 유용한 물품
KR102268781B1 (ko) 2014-11-12 2021-06-28 삼성전자주식회사 인쇄회로기판 및 이를 포함하는 반도체 패키지
TWI783324B (zh) * 2020-12-15 2022-11-11 何崇文 線路載板及其製作方法

Citations (5)

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Publication number Priority date Publication date Assignee Title
JP2000323613A (ja) * 1999-03-11 2000-11-24 Shinko Electric Ind Co Ltd 半導体装置用多層基板及びその製造方法
JP2004186265A (ja) * 2002-11-29 2004-07-02 Ngk Spark Plug Co Ltd 多層配線基板の製造方法
JP2005302922A (ja) * 2004-04-09 2005-10-27 Ngk Spark Plug Co Ltd 配線基板およびその製造方法
WO2005114729A1 (ja) * 2004-05-21 2005-12-01 Nec Corporation 半導体装置及び配線基板
JP2008016508A (ja) * 2006-07-03 2008-01-24 Nec Electronics Corp 半導体装置およびその製造方法

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JP3267409B2 (ja) * 1992-11-24 2002-03-18 株式会社日立製作所 半導体集積回路装置
US5919329A (en) * 1997-10-14 1999-07-06 Gore Enterprise Holdings, Inc. Method for assembling an integrated circuit chip package having at least one semiconductor device
JP2001185653A (ja) * 1999-10-12 2001-07-06 Fujitsu Ltd 半導体装置及び基板の製造方法
US6544812B1 (en) * 2000-11-06 2003-04-08 St Assembly Test Service Ltd. Single unit automated assembly of flex enhanced ball grid array packages
JP3492348B2 (ja) * 2001-12-26 2004-02-03 新光電気工業株式会社 半導体装置用パッケージの製造方法
JP2004281830A (ja) * 2003-03-17 2004-10-07 Shinko Electric Ind Co Ltd 半導体装置用基板及び基板の製造方法及び半導体装置
AU2003221149A1 (en) * 2003-03-25 2004-10-18 Fujitsu Limited Method for manufacturing electronic component-mounted board
JP2004311768A (ja) * 2003-04-08 2004-11-04 Shinko Electric Ind Co Ltd 基板の製造方法及び半導体装置用基板及び半導体装置
JP2004356569A (ja) * 2003-05-30 2004-12-16 Shinko Electric Ind Co Ltd 半導体装置用パッケージ
US7094975B2 (en) * 2003-11-20 2006-08-22 Delphi Technologies, Inc. Circuit board with localized stiffener for enhanced circuit component reliability
JP4205613B2 (ja) * 2004-03-01 2009-01-07 エルピーダメモリ株式会社 半導体装置
US20060118947A1 (en) * 2004-12-03 2006-06-08 Taiwan Semiconductor Manufacturing Co., Ltd. Thermal expansion compensating flip chip ball grid array package structure
US7719021B2 (en) * 2005-06-28 2010-05-18 Lighting Science Group Corporation Light efficient LED assembly including a shaped reflective cavity and method for making same
JP2007123524A (ja) * 2005-10-27 2007-05-17 Shinko Electric Ind Co Ltd 電子部品内蔵基板
JP2008160019A (ja) * 2006-12-26 2008-07-10 Shinko Electric Ind Co Ltd 電子部品
US7750459B2 (en) * 2008-02-01 2010-07-06 International Business Machines Corporation Integrated module for data processing system

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Publication number Priority date Publication date Assignee Title
JP2000323613A (ja) * 1999-03-11 2000-11-24 Shinko Electric Ind Co Ltd 半導体装置用多層基板及びその製造方法
JP2004186265A (ja) * 2002-11-29 2004-07-02 Ngk Spark Plug Co Ltd 多層配線基板の製造方法
JP2005302922A (ja) * 2004-04-09 2005-10-27 Ngk Spark Plug Co Ltd 配線基板およびその製造方法
WO2005114729A1 (ja) * 2004-05-21 2005-12-01 Nec Corporation 半導体装置及び配線基板
JP2008016508A (ja) * 2006-07-03 2008-01-24 Nec Electronics Corp 半導体装置およびその製造方法

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013516060A (ja) * 2009-12-24 2013-05-09 アイメック 窓介在型ダイパッケージング
JP2017022398A (ja) * 2009-12-24 2017-01-26 アイメックＩｍｅｃ 窓介在型ダイパッケージング
JP2016105484A (ja) * 2012-12-20 2016-06-09 インテル・コーポレーション 高密度有機ブリッジデバイスおよび方法
US10103105B2 (en) 2012-12-20 2018-10-16 Intel Corporation High density organic bridge device and method
US10672713B2 (en) 2012-12-20 2020-06-02 Intel Corporation High density organic bridge device and method
US12002762B2 (en) 2012-12-20 2024-06-04 Intel Corporation High density organic bridge device and method
JPWO2017057446A1 (ja) * 2015-10-02 2018-07-19 旭硝子株式会社 ガラス基板、積層基板、および積層体
US11180407B2 (en) 2015-10-02 2021-11-23 AGC Inc. Glass substrate, laminated substrate, and laminate
US11753330B2 (en) 2015-10-02 2023-09-12 AGC Inc. Glass substrate, laminated substrate, and laminate
JP2023179821A (ja) * 2022-06-08 2023-12-20 株式会社村田製作所 回路基板及び回路モジュール
JP7567862B2 (ja) 2022-06-08 2024-10-16 株式会社村田製作所 回路基板及び回路モジュール

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