JP2008520097A - 歪み完全空乏型シリコン・オン・インシュレータ半導体デバイスおよびこの製造方法 - Google Patents

歪み完全空乏型シリコン・オン・インシュレータ半導体デバイスおよびこの製造方法 Download PDF

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Publication number
JP2008520097A
JP2008520097A JP2007541196A JP2007541196A JP2008520097A JP 2008520097 A JP2008520097 A JP 2008520097A JP 2007541196 A JP2007541196 A JP 2007541196A JP 2007541196 A JP2007541196 A JP 2007541196A JP 2008520097 A JP2008520097 A JP 2008520097A
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drain
spacer
outside
source
insulator
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JP2007541196A
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Japanese (ja)
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JP2008520097A5 (enExample
Inventor
シャン キ
サッバ ニラジ
ピー． マスザラ ウィトールド
クリボカピク ゾラン
リン ミン−レン
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Publication of JP2008520097A publication Critical patent/JP2008520097A/ja
Publication of JP2008520097A5 publication Critical patent/JP2008520097A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01—Manufacture or treatment
    • H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H10D30/0323—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon comprising monocrystalline silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6727—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device having source or drain regions connected to bulk conducting substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/794—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising conductive materials, e.g. silicided source, drain or gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/938—Lattice strain control or utilization

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Thin Film Transistor (AREA)
JP2007541196A 2004-11-10 2005-10-12 歪み完全空乏型シリコン・オン・インシュレータ半導体デバイスおよびこの製造方法 Pending JP2008520097A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/986,399 US7306997B2 (en) 2004-11-10 2004-11-10 Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor
PCT/US2005/036894 WO2006052379A1 (en) 2004-11-10 2005-10-12 Strained fully depleted silicon on insulator semiconductor device and manufacturing method therefor

Publications (2)

Publication Number Publication Date
JP2008520097A true JP2008520097A (ja) 2008-06-12
JP2008520097A5 JP2008520097A5 (enExample) 2009-02-12

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JP2007541196A Pending JP2008520097A (ja) 2004-11-10 2005-10-12 歪み完全空乏型シリコン・オン・インシュレータ半導体デバイスおよびこの製造方法

Country Status (7)

Country Link
US (2) US7306997B2 (enExample)
EP (1) EP1815531A1 (enExample)
JP (1) JP2008520097A (enExample)
KR (1) KR101122753B1 (enExample)
CN (1) CN101061587B (enExample)
TW (1) TWI380373B (enExample)
WO (1) WO2006052379A1 (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
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JP2008527692A (ja) * 2005-01-03 2008-07-24 フリースケール セミコンダクター インコーポレイテッド リセス型ソース／ドレイン領域をｓｏｉウェハに含む半導体形成プロセス
JP2009519610A (ja) * 2005-12-14 2009-05-14 インテル コーポレイション ソース領域とドレイン領域との間にボックス層を有する歪みシリコンｍｏｓデバイス
JP2011035393A (ja) * 2009-07-29 2011-02-17 Internatl Business Mach Corp <Ibm> 埋め込み拡張領域を有するｓｏｉトランジスタ、及びその形成方法

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JP2006332243A (ja) * 2005-05-25 2006-12-07 Toshiba Corp 半導体装置及びその製造方法
US7384851B2 (en) * 2005-07-15 2008-06-10 International Business Machines Corporation Buried stress isolation for high-performance CMOS technology
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US7569434B2 (en) * 2006-01-19 2009-08-04 International Business Machines Corporation PFETs and methods of manufacturing the same
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US20080157118A1 (en) * 2006-12-29 2008-07-03 Chartered Semiconductor Manufacturing Ltd. Integrated circuit system employing strained technology
US9640666B2 (en) * 2007-07-23 2017-05-02 GlobalFoundries, Inc. Integrated circuit employing variable thickness film
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KR101592505B1 (ko) * 2009-02-16 2016-02-05 삼성전자주식회사 반도체 메모리 소자 및 이의 제조 방법
US7994062B2 (en) * 2009-10-30 2011-08-09 Sachem, Inc. Selective silicon etch process
CN102299092B (zh) * 2010-06-22 2013-10-30 中国科学院微电子研究所 一种半导体器件及其形成方法
CN102376769B (zh) * 2010-08-18 2013-06-26 中国科学院微电子研究所 超薄体晶体管及其制作方法
CN102487018B (zh) * 2010-12-03 2014-03-12 中芯国际集成电路制造(北京)有限公司 Mos晶体管及其形成方法
CN102122669A (zh) * 2011-01-27 2011-07-13 上海宏力半导体制造有限公司 晶体管及其制作方法
US8455308B2 (en) 2011-03-16 2013-06-04 International Business Machines Corporation Fully-depleted SON
US9184214B2 (en) * 2011-04-11 2015-11-10 Globalfoundries Inc. Semiconductor device exhibiting reduced parasitics and method for making same
US20120326230A1 (en) * 2011-06-22 2012-12-27 International Business Machines Corporation Silicon on insulator complementary metal oxide semiconductor with an isolation formed at low temperature
US20140183618A1 (en) * 2011-08-05 2014-07-03 X-Fab Semiconductor Foundries Ag Semiconductor device
US9136158B2 (en) * 2012-03-09 2015-09-15 Taiwan Semiconductor Manufacturing Company, Ltd. Lateral MOSFET with dielectric isolation trench
US8664050B2 (en) 2012-03-20 2014-03-04 International Business Machines Corporation Structure and method to improve ETSOI MOSFETS with back gate
CN102931092A (zh) * 2012-10-26 2013-02-13 哈尔滨工程大学 一种自对准soi fd mosfet形成方法
CN103779279B (zh) * 2012-10-26 2017-09-01 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法
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FR3025941A1 (fr) * 2014-09-17 2016-03-18 Commissariat Energie Atomique Transistor mos a resistance et capacites parasites reduites
CN105632909B (zh) * 2014-11-07 2019-02-01 中芯国际集成电路制造(上海)有限公司 一种半导体器件及其制造方法、电子装置
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CN105742248A (zh) * 2014-12-09 2016-07-06 中芯国际集成电路制造(上海)有限公司 半导体结构的形成方法
US20230292524A1 (en) * 2022-02-02 2023-09-14 Taiwan Semiconductor Manufacturing Company, Ltd. Ferroelectric memory device with relaxation layers
US12166729B2 (en) * 2022-02-18 2024-12-10 Psemi Corporation LNA with Tx harmonic filter
US12489013B2 (en) 2022-09-27 2025-12-02 Globalfoundries U.S. Inc. Semiconductor-on-insulator field-effect transistors including stress-inducing components

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JPH11150266A (ja) * 1997-11-19 1999-06-02 Toshiba Corp 半導体装置及びその製造方法
JP2002083972A (ja) * 2000-09-11 2002-03-22 Hitachi Ltd 半導体集積回路装置
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008527692A (ja) * 2005-01-03 2008-07-24 フリースケール セミコンダクター インコーポレイテッド リセス型ソース／ドレイン領域をｓｏｉウェハに含む半導体形成プロセス
JP2009519610A (ja) * 2005-12-14 2009-05-14 インテル コーポレイション ソース領域とドレイン領域との間にボックス層を有する歪みシリコンｍｏｓデバイス
JP2011035393A (ja) * 2009-07-29 2011-02-17 Internatl Business Mach Corp <Ibm> 埋め込み拡張領域を有するｓｏｉトランジスタ、及びその形成方法

Also Published As

Publication number Publication date
TW200620489A (en) 2006-06-16
KR20070084008A (ko) 2007-08-24
US7306997B2 (en) 2007-12-11
EP1815531A1 (en) 2007-08-08
CN101061587B (zh) 2011-01-12
KR101122753B1 (ko) 2012-03-23
CN101061587A (zh) 2007-10-24
US20080054316A1 (en) 2008-03-06
TWI380373B (en) 2012-12-21
US20060099752A1 (en) 2006-05-11
US8502283B2 (en) 2013-08-06
WO2006052379A1 (en) 2006-05-18

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