JP2008219006A - Cmos半導体素子及びその製造方法 - Google Patents
Cmos半導体素子及びその製造方法 Download PDFInfo
- Publication number
- JP2008219006A JP2008219006A JP2008041889A JP2008041889A JP2008219006A JP 2008219006 A JP2008219006 A JP 2008219006A JP 2008041889 A JP2008041889 A JP 2008041889A JP 2008041889 A JP2008041889 A JP 2008041889A JP 2008219006 A JP2008219006 A JP 2008219006A
- Authority
- JP
- Japan
- Prior art keywords
- metal nitride
- nitride layer
- semiconductor device
- region
- cmos semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 44
- 238000004519 manufacturing process Methods 0.000 title claims description 27
- 239000002184 metal Substances 0.000 claims abstract description 114
- 229910052751 metal Inorganic materials 0.000 claims abstract description 114
- 150000004767 nitrides Chemical class 0.000 claims abstract description 96
- 238000000034 method Methods 0.000 claims abstract description 49
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 37
- 230000008569 process Effects 0.000 claims abstract description 28
- 239000012535 impurity Substances 0.000 claims abstract description 24
- 239000000463 material Substances 0.000 claims abstract description 14
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 57
- 229910052757 nitrogen Inorganic materials 0.000 claims description 10
- 239000000758 substrate Substances 0.000 claims description 9
- 238000000151 deposition Methods 0.000 claims description 7
- 229910052731 fluorine Inorganic materials 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- 229910052799 carbon Inorganic materials 0.000 claims description 6
- 229910052801 chlorine Inorganic materials 0.000 claims description 6
- 229910052735 hafnium Inorganic materials 0.000 claims description 6
- 229910052750 molybdenum Inorganic materials 0.000 claims description 6
- 229910052715 tantalum Inorganic materials 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 229910052726 zirconium Inorganic materials 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 5
- 229910052719 titanium Inorganic materials 0.000 claims description 5
- 238000000059 patterning Methods 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 2
- 239000010703 silicon Substances 0.000 claims description 2
- 230000009977 dual effect Effects 0.000 abstract description 9
- 239000010410 layer Substances 0.000 description 94
- 239000010408 film Substances 0.000 description 16
- 239000000460 chlorine Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 10
- 238000004380 ashing Methods 0.000 description 5
- 239000003989 dielectric material Substances 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 239000010409 thin film Substances 0.000 description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 4
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 230000008859 change Effects 0.000 description 3
- 239000002243 precursor Substances 0.000 description 3
- 238000007740 vapor deposition Methods 0.000 description 3
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- -1 or the like Inorganic materials 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 235000012239 silicon dioxide Nutrition 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 238000005011 time of flight secondary ion mass spectroscopy Methods 0.000 description 2
- 238000002042 time-of-flight secondary ion mass spectrometry Methods 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 229910003855 HfAlO Inorganic materials 0.000 description 1
- 229910004129 HfSiO Inorganic materials 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 238000003917 TEM image Methods 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000013043 chemical agent Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- A—HUMAN NECESSITIES
- A42—HEADWEAR
- A42B—HATS; HEAD COVERINGS
- A42B1/00—Hats; Caps; Hoods
- A42B1/18—Coverings for protecting hats, caps or hoods against dust, rain, or sunshine
-
- A—HUMAN NECESSITIES
- A42—HEADWEAR
- A42B—HATS; HEAD COVERINGS
- A42B1/00—Hats; Caps; Hoods
- A42B1/004—Decorative arrangements or effects
-
- A—HUMAN NECESSITIES
- A42—HEADWEAR
- A42B—HATS; HEAD COVERINGS
- A42B1/00—Hats; Caps; Hoods
- A42B1/04—Soft caps; Hoods
- A42B1/06—Caps with flaps; Motoring caps
-
- A—HUMAN NECESSITIES
- A42—HEADWEAR
- A42B—HATS; HEAD COVERINGS
- A42B1/00—Hats; Caps; Hoods
- A42B1/203—Inflatable
-
- A—HUMAN NECESSITIES
- A42—HEADWEAR
- A42B—HATS; HEAD COVERINGS
- A42B1/00—Hats; Caps; Hoods
- A42B1/24—Hats; Caps; Hoods with means for attaching articles thereto, e.g. memorandum tablets or mirrors
-
- A—HUMAN NECESSITIES
- A42—HEADWEAR
- A42C—MANUFACTURING OR TRIMMING HEAD COVERINGS, e.g. HATS
- A42C5/00—Fittings or trimmings for hats, e.g. hat-bands
- A42C5/02—Sweat-bands
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- Materials Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
【解決手段】金属窒化物層及び多結晶シリコンキャッピング層を備え、nMOS領域及びpMOS領域の金属窒化物層は同種物質で形成され、相異なる不純物含有量により相異なる仕事関数を持つデュアルメタルゲートCMOS半導体素子。同種の金属窒化物層によりメタルゲートを形成するので、工程が単純化して収率が向上すると共に、高性能のCMOS半導体素子を得ることができる。
【選択図】図9H
Description
1a 隔離層
1b 境界層
2 high−kゲート絶縁膜(HfO2)
3a 1次TiN
3b 2次TiN
5 キャッピング層
Claims (17)
- nMOS領域及びpMOS領域を持つCMOS半導体素子において、
前記nMOS領域及びpMOS領域には、poly−Siキャッピング層及びこの下部の金属窒化物層を備えるゲートがそれぞれ設けられ、
前記nMOS領域及びpMOS領域の各ゲートの下部にはゲート絶縁層が設けられ、
前記nMOS領域及びpMOS領域の金属窒化物層は同種物質で形成され、各領域の金属窒化物層は不純物濃度差による相異なる仕事関数を持つことを特徴とするCMOS半導体素子。 - 前記ゲート絶縁層は、HfO2からなることを特徴とする請求項1に記載のCMOS半導体素子。
- 前記金属窒化物層は、C、Cl、F、N、Oのうち少なくともいずれか一つの成分を不純物として含有することを特徴とする請求項1または請求項2に記載のCMOS半導体素子。
- 前記金属窒化物層は、Ti、Ta、W、Mo、Al、Hf、Zrのうちいずれか一つの元素とNとを含むことを特徴とする請求項1ないし3のうちいずれか1項に記載のCMOS半導体素子。
- 前記金属窒化物層は、TiNからなることを特徴とする請求項4に記載のCMOS半導体素子。
- 前記nMOS領域及びpMOS領域の金属窒化物層は相異なる厚さを持ち、相対的に厚い金属窒化物層は、複数の単位金属窒化物層を持つことを特徴とする請求項1ないし4のうちいずれか1項に記載のCMOS半導体素子。
- 前記厚い金属窒化物層の単位金属窒化物層は、相異なる濃度の不純物を含むことを特徴とする請求項1ないし3及び請求項6のうちいずれか1項に記載のCMOS半導体素子。
- 前記nMOS領域の金属窒化物層は、pMOS領域の金属窒化物層に比べて薄い厚さを持ち、
前記nMOS領域の金属窒化物層の仕事関数は、pMOS領域の金属窒化物層の仕事関数に比べて小さいことを特徴とする請求項1に記載のCMOS半導体素子。 - nMOS領域及びpMOS領域を持つシリコン基板上にゲート絶縁膜を形成する工程と、
前記ゲート絶縁膜上に、前記nMOS領域及びpMOS領域に対応するものであって、金属窒化物層及びこの上の多結晶シリコンキャッピング層を持つゲートをそれぞれ形成する工程と、を含み、
前記nMOS領域の金属窒化物層及びpMOS領域の金属窒化物層は同種物質で形成し、これらそれぞれに不純物濃度差を調節して前記両金属窒化物層に相異なる仕事関数を持たせることを特徴とするCMOS半導体素子の製造方法。 - 前記金属窒化物層の不純物濃度の調節は、金属窒化物層の蒸着温度調節により行うことを特徴とする請求項9に記載のCMOS半導体素子の製造方法。
- 前記pMOS領域の金属窒化物層は、nMOS領域の金属窒化物層に比べて厚い厚さを持ち、前記pMOS領域の金属窒化物層の仕事関数は、nMOS領域の金属窒化物層に比べて大きい仕事関数を持つことを特徴とする請求項9に記載のCMOS半導体素子の製造方法。
- 前記ゲートを形成する工程は、
前記絶縁膜上に1次金属窒化物層を形成する工程と、
前記1次金属窒化物層から前記nMOSに対応する部分を除去する工程と、
前記1次金属窒化物層及び前記nMOS領域上に2次金属窒化物層を形成する工程と、
前記2次金属窒化物層上に多結晶シリコンキャッピング層を形成する工程と、
前記絶縁物質からその上の積層をパターニングして、前記nMOS領域及びpMOS領域に対応するゲートを前記基板上に形成する工程と、を含むことを特徴とする請求項9に記載のCMOS半導体素子の製造方法。 - 前記1次金属窒化物層及び2次金属窒化物層は、相異なる工程温度で形成することを特徴とする請求項12に記載のCMOS半導体素子の製造方法。
- 前記1次金属窒化物層の工程温度は、2次金属窒化物層の工程温度に比べて100℃以上低いことを特徴とする請求項13に記載のCMOS半導体素子の製造方法。
- 前記1次金属窒化物層の工程温度は実質的に450℃であり、2次金属窒化物層の工程温度は680℃であることを特徴とする請求項14に記載のCMOS半導体素子の製造方法。
- 前記金属窒化物層は、Ti、W、Ta、Mo、Al、Hf、Zrからなるグループから選択されたいずれか一つの元素及びNを含むことを特徴とする請求項9ないし15のうちいずれか1項に記載のCMOS半導体素子の製造方法。
- 前記不純物は、C、Cl、F、N、Oからなるグループから選択された少なくとも一つの元素を含むことを特徴とする請求項9ないし16のうちいずれか1項に記載のCMOS半導体素子の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020070020593A KR100868768B1 (ko) | 2007-02-28 | 2007-02-28 | Cmos 반도체 소자 및 그 제조방법 |
KR10-2007-0020593 | 2007-02-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008219006A true JP2008219006A (ja) | 2008-09-18 |
JP5931312B2 JP5931312B2 (ja) | 2016-06-08 |
Family
ID=39714903
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008041889A Expired - Fee Related JP5931312B2 (ja) | 2007-02-28 | 2008-02-22 | Cmos半導体素子及びその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7919820B2 (ja) |
JP (1) | JP5931312B2 (ja) |
KR (1) | KR100868768B1 (ja) |
CN (1) | CN101257023B (ja) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010073985A (ja) * | 2008-09-19 | 2010-04-02 | Toshiba Corp | 半導体装置 |
WO2010055603A1 (ja) * | 2008-11-12 | 2010-05-20 | パナソニック株式会社 | 半導体装置及びその製造方法 |
WO2010073434A1 (ja) * | 2008-12-26 | 2010-07-01 | パナソニック株式会社 | 半導体装置及びその製造方法 |
WO2010146641A1 (ja) * | 2009-06-18 | 2010-12-23 | パナソニック株式会社 | 半導体装置及びその製造方法 |
JP2012514854A (ja) * | 2009-01-05 | 2012-06-28 | インターナショナル・ビジネス・マシーンズ・コーポレーション | ゲート・スタックを形成する方法 |
US8466023B2 (en) | 2009-10-19 | 2013-06-18 | Samsung Electronics Co., Ltd. | Semiconductor device and method for fabricating the same |
JP2013191808A (ja) * | 2012-03-15 | 2013-09-26 | Elpida Memory Inc | 半導体装置及び半導体装置の製造方法 |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8034678B2 (en) * | 2008-01-17 | 2011-10-11 | Kabushiki Kaisha Toshiba | Complementary metal oxide semiconductor device fabrication method |
US20090263944A1 (en) * | 2008-04-17 | 2009-10-22 | Albert Chin | Method for making low Vt gate-first light-reflective-layer covered dual metal-gates on high-k CMOSFETs |
US7994036B2 (en) | 2008-07-01 | 2011-08-09 | Panasonic Corporation | Semiconductor device and fabrication method for the same |
US8860150B2 (en) * | 2009-12-10 | 2014-10-14 | United Microelectronics Corp. | Metal gate structure |
US8378430B2 (en) * | 2010-02-12 | 2013-02-19 | Micron Technology, Inc. | Transistors having argon gate implants and methods of forming the same |
JP5432798B2 (ja) * | 2010-03-30 | 2014-03-05 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
KR101213811B1 (ko) * | 2010-04-15 | 2012-12-18 | 에스케이하이닉스 주식회사 | 반도체 소자 및 그의 형성 방법 |
US8343839B2 (en) | 2010-05-27 | 2013-01-01 | International Business Machines Corporation | Scaled equivalent oxide thickness for field effect transistor devices |
US8466473B2 (en) * | 2010-12-06 | 2013-06-18 | International Business Machines Corporation | Structure and method for Vt tuning and short channel control with high k/metal gate MOSFETs |
CN102169900B (zh) * | 2011-03-01 | 2013-03-27 | 清华大学 | 基于异质栅极功函数的隧穿场效应晶体管及其形成方法 |
US9595443B2 (en) | 2011-10-20 | 2017-03-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal gate structure of a semiconductor device |
US8912610B2 (en) * | 2011-11-11 | 2014-12-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | Structure and method for MOSFETS with high-K and metal gate structure |
JP5960491B2 (ja) | 2012-04-27 | 2016-08-02 | キヤノンアネルバ株式会社 | 半導体装置およびその製造方法 |
KR101977286B1 (ko) | 2012-12-27 | 2019-05-30 | 에스케이하이닉스 주식회사 | 듀얼 일함수 게이트스택, 그를 구비한 반도체장치 및 제조 방법 |
KR101986144B1 (ko) | 2012-12-28 | 2019-06-05 | 에스케이하이닉스 주식회사 | 고유전층과 금속게이트를 갖는 반도체장치 및 그 제조 방법 |
KR102066851B1 (ko) * | 2013-02-25 | 2020-02-11 | 삼성전자 주식회사 | 반도체 장치 및 그 제조 방법 |
KR102190673B1 (ko) | 2014-03-12 | 2020-12-14 | 삼성전자주식회사 | 중간갭 일함수 금속 게이트 전극을 갖는 반도체 소자 |
KR102127644B1 (ko) | 2014-06-10 | 2020-06-30 | 삼성전자 주식회사 | 반도체 소자의 제조 방법 |
US9859392B2 (en) * | 2015-09-21 | 2018-01-02 | Samsung Electronics Co., Ltd. | Integrated circuit device and method of manufacturing the same |
KR102286112B1 (ko) | 2015-10-21 | 2021-08-04 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
KR102402761B1 (ko) | 2015-10-30 | 2022-05-26 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
US9837487B2 (en) | 2015-11-30 | 2017-12-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and formation method of semiconductor device structure with gate stack |
US9768171B2 (en) * | 2015-12-16 | 2017-09-19 | International Business Machines Corporation | Method to form dual tin layers as pFET work metal stack |
KR102490696B1 (ko) | 2016-11-07 | 2023-01-19 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
KR102557915B1 (ko) * | 2018-07-05 | 2023-07-21 | 삼성전자주식회사 | 반도체 장치 |
US10879392B2 (en) | 2018-07-05 | 2020-12-29 | Samsung Electronics Co., Ltd. | Semiconductor device |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2012A (en) * | 1841-03-18 | Machine foe | ||
US5028A (en) * | 1847-03-20 | monohot | ||
JP2002118175A (ja) * | 2000-10-05 | 2002-04-19 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2002359295A (ja) * | 2001-04-11 | 2002-12-13 | Samsung Electronics Co Ltd | デュアルゲートを有するcmos型半導体装置形成方法 |
JP2004186693A (ja) * | 2002-12-03 | 2004-07-02 | Asm Internatl Nv | 調節された仕事関数で電極を形成する方法 |
JP2005217176A (ja) * | 2004-01-29 | 2005-08-11 | Tokyo Electron Ltd | 半導体装置および積層膜の形成方法 |
JP2007019396A (ja) * | 2005-07-11 | 2007-01-25 | Renesas Technology Corp | Mos構造を有する半導体装置およびその製造方法 |
JP2007036116A (ja) * | 2005-07-29 | 2007-02-08 | Renesas Technology Corp | 半導体装置の製造方法 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6727148B1 (en) * | 1998-06-30 | 2004-04-27 | Lam Research Corporation | ULSI MOS with high dielectric constant gate insulator |
US6537901B2 (en) * | 2000-12-29 | 2003-03-25 | Hynix Semiconductor Inc. | Method of manufacturing a transistor in a semiconductor device |
KR100476926B1 (ko) * | 2002-07-02 | 2005-03-17 | 삼성전자주식회사 | 반도체 소자의 듀얼 게이트 형성방법 |
US7019351B2 (en) * | 2003-03-12 | 2006-03-28 | Micron Technology, Inc. | Transistor devices, and methods of forming transistor devices and circuit devices |
US7023064B2 (en) * | 2004-06-16 | 2006-04-04 | International Business Machines Corporation | Temperature stable metal nitride gate electrode |
-
2007
- 2007-02-28 KR KR1020070020593A patent/KR100868768B1/ko active IP Right Grant
-
2008
- 2008-01-10 US US12/007,433 patent/US7919820B2/en not_active Expired - Fee Related
- 2008-02-22 JP JP2008041889A patent/JP5931312B2/ja not_active Expired - Fee Related
- 2008-02-22 CN CN2008100805787A patent/CN101257023B/zh not_active Expired - Fee Related
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2012A (en) * | 1841-03-18 | Machine foe | ||
US5028A (en) * | 1847-03-20 | monohot | ||
JP2002118175A (ja) * | 2000-10-05 | 2002-04-19 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2002359295A (ja) * | 2001-04-11 | 2002-12-13 | Samsung Electronics Co Ltd | デュアルゲートを有するcmos型半導体装置形成方法 |
JP2004186693A (ja) * | 2002-12-03 | 2004-07-02 | Asm Internatl Nv | 調節された仕事関数で電極を形成する方法 |
JP2005217176A (ja) * | 2004-01-29 | 2005-08-11 | Tokyo Electron Ltd | 半導体装置および積層膜の形成方法 |
JP2007019396A (ja) * | 2005-07-11 | 2007-01-25 | Renesas Technology Corp | Mos構造を有する半導体装置およびその製造方法 |
JP2007036116A (ja) * | 2005-07-29 | 2007-02-08 | Renesas Technology Corp | 半導体装置の製造方法 |
Cited By (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010073985A (ja) * | 2008-09-19 | 2010-04-02 | Toshiba Corp | 半導体装置 |
JP4647682B2 (ja) * | 2008-11-12 | 2011-03-09 | パナソニック株式会社 | 半導体装置及びその製造方法 |
WO2010055603A1 (ja) * | 2008-11-12 | 2010-05-20 | パナソニック株式会社 | 半導体装置及びその製造方法 |
JP2010118443A (ja) * | 2008-11-12 | 2010-05-27 | Panasonic Corp | 半導体装置及びその製造方法 |
US8476714B2 (en) | 2008-11-12 | 2013-07-02 | Panasonic Corporation | Semiconductor device |
WO2010073434A1 (ja) * | 2008-12-26 | 2010-07-01 | パナソニック株式会社 | 半導体装置及びその製造方法 |
US8288833B2 (en) | 2008-12-26 | 2012-10-16 | Panasonic Corporation | Semiconductor device and manufacturing method thereof |
JP2012514854A (ja) * | 2009-01-05 | 2012-06-28 | インターナショナル・ビジネス・マシーンズ・コーポレーション | ゲート・スタックを形成する方法 |
WO2010146641A1 (ja) * | 2009-06-18 | 2010-12-23 | パナソニック株式会社 | 半導体装置及びその製造方法 |
US8466023B2 (en) | 2009-10-19 | 2013-06-18 | Samsung Electronics Co., Ltd. | Semiconductor device and method for fabricating the same |
US9419072B2 (en) | 2009-10-19 | 2016-08-16 | Samsung Electronics Co., Ltd. | Semiconductor device and method for fabricating the same |
US9608054B2 (en) | 2009-10-19 | 2017-03-28 | Samsung Electronics Co., Ltd. | Semiconductor device and method for fabricating the same |
JP2013191808A (ja) * | 2012-03-15 | 2013-09-26 | Elpida Memory Inc | 半導体装置及び半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
---|---|
CN101257023A (zh) | 2008-09-03 |
KR100868768B1 (ko) | 2008-11-13 |
US7919820B2 (en) | 2011-04-05 |
JP5931312B2 (ja) | 2016-06-08 |
US20080203488A1 (en) | 2008-08-28 |
KR20080079940A (ko) | 2008-09-02 |
CN101257023B (zh) | 2011-09-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5931312B2 (ja) | Cmos半導体素子及びその製造方法 | |
TWI553906B (zh) | 用於多層高介電係數閘極堆疊之混合式閘極後製積體化方案 | |
JP5270086B2 (ja) | pFET材料としての金属酸窒化物を用いた半導体構造およびその製造方法 | |
US7183596B2 (en) | Composite gate structure in an integrated circuit | |
JP5535706B2 (ja) | 半導体装置の製造方法 | |
US7884423B2 (en) | Semiconductor device and fabrication method thereof | |
TWI624060B (zh) | 具有鎢閘極電極的半導體裝置及其製造方法 | |
CN102714177B (zh) | 具有带氧阻障层的金属栅极堆叠的场效应晶体管器件 | |
JP2012004577A (ja) | 高誘電率のゲート絶縁膜を有する半導体装置及びそれの製造方法 | |
US20070178634A1 (en) | Cmos semiconductor devices having dual work function metal gate stacks | |
US20090134466A1 (en) | Dual work function semiconductor device and method for manufacturing the same | |
US9312190B2 (en) | Semiconductor device and method of manufacturing the same | |
WO2011079594A1 (zh) | 一种半导体器件及其制造方法 | |
EP1863097A1 (en) | Method for modulating the effective work function | |
US20070166970A1 (en) | ALD gate electrode | |
EP1863072A1 (en) | Method for modulating the effective work function | |
US7939396B2 (en) | Base oxide engineering for high-K gate stacks | |
US20120299113A1 (en) | Semiconductor device and method for fabricating the same | |
US9142414B2 (en) | CMOS devices with metal gates and methods for forming the same | |
JP2008004578A (ja) | 半導体装置の製造方法および半導体装置 | |
JP2006024894A (ja) | 高誘電率のゲート絶縁膜を有する半導体装置及びそれの製造方法 | |
US8846474B2 (en) | Dual workfunction semiconductor devices and methods for forming thereof | |
KR20120070801A (ko) | 반도체 장치 및 반도체 장치의 제조방법 | |
JP3696196B2 (ja) | 半導体装置 | |
JP2008311661A (ja) | 半導体素子及びそのゲート形成方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20110216 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120120 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20121012 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20121030 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130129 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130730 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20131029 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20140425 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140820 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20140828 |
|
A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20141024 |
|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20141226 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20151026 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20160215 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20160427 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5931312 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |