JP2008205482A - 高電圧垂直トランジスタで集積された検知トランジスタ - Google Patents
高電圧垂直トランジスタで集積された検知トランジスタ Download PDFInfo
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- 238000000034 method Methods 0.000 abstract description 5
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- 238000000638 solvent extraction Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000015556 catabolic process Effects 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
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- 238000000926 separation method Methods 0.000 description 1
- 229910021332 silicide Inorganic materials 0.000 description 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7815—Vertical DMOS transistors, i.e. VDMOS transistors with voltage or current sensing structure, e.g. emulator section, overcurrent sensing cell
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
- H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
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- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
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Abstract
【解決手段】1つの実施形態において、半導体デバイスは、メイン垂直電界効果トランジスタ(FET)と検知FETとを含む。メイン垂直FETと検知FETは共に、半導体材料のピラー上に形成される。両方とも基板の上のピラー内に形成された拡張ドレイン領域と、ピラーの両側上で誘電体内に形成された第1及び第2のゲート部材とを共用する。メイン垂直FET及び検知FETのソース領域は、第1の横方向で分離され電気的に絶縁されている。動作中、検知FETは、メイン垂直FET内に流れる電流の小部分をサンプリングする。この要約は、サーチャ又は他の閲覧者が本技術的開示事項の対象を迅速に調査できるようになる要約を必要とする規則に適合するように提供される点は強調される。
【選択図】図8A
Description
14a、14b N+ソース領域
15a、15b 誘電(酸化物)領域
16a、16b P+領域
17 シリコンピラー
18a、18b ゲート部材
19a、19b フィールドプレート
20a、20b ゲート酸化物層
24 N+領域
Claims (22)
- メイン垂直トランジスタを備える半導体デバイスであって、
前記メイン垂直トランジスタが、
第1の導電型の基板と、
前記基板上に配置され、幅及び第1の横方向に延びる長さを有し、且つ上面又はその近傍に配置された前記第1の導電型の1つ又はそれ以上の領域を含む第1のソース領域と、前記第1のソース領域の真下の内部に配置された第2の導電型のボディ領域と、前記ボディ領域の真下の内部に配置された前記第1の導電型の拡張ドレイン領域とを有する半導体材料のピラーと、
前記ピラーの両側にそれぞれ配置された、前記ピラーによって横方向に囲まれた第1の誘電領域及び前記ピラーを横方向に囲む第2の誘電領域と、
前記第1及び第2の誘電領域内にそれぞれ配置された第1及び第2のフィールドプレートと、
前記ボディ領域に隣接する前記ピラーの上面又はその近傍で前記第1及び第2の誘電領域内にそれぞれ配置され、第1の厚みを有するゲート酸化物によって前記ボディ領域から分離された第1及び第2のゲート部材と、
を含み、
前記半導体デバイスが更に、
前記ピラーの上面又はその近傍で配置された前記第1の導電型の第2のソース領域を備え、
前記第2のソース領域が、前記ピラーの上面に延びる前記ボディ領域の区域によって前記第1のソース領域から前記第1の横方向で分離され、
検知トランジスタが、前記メイン垂直トランジスタ内に流れる電流の小部分をサンプリングするように動作可能である、
ことを特徴とする半導体デバイス。 - 前記ピラーがレーストラックレイアウトで配列されている、
ことを特徴とする請求項1に記載の半導体デバイス。 - 前記1つ又はそれ以上の第1のソース領域に電気的に接触するソース電極と、
前記第2のソース領域に電気的に接触する検知ソース電極と、
前記基板の下面に電気的に接触するドレイン電極と、
を更に備える、
ことを特徴とする請求項1に記載の半導体デバイス。 - 前記ボディ領域の真下の前記ピラー内に配置された拡張ドレイン領域を更に備える、
ことを特徴とする請求項1に記載の半導体デバイス。 - 前記第1の横方向の前記長さが前記幅よりも少なくとも30倍大きい、
ことを特徴とする請求項1に記載の半導体デバイス。 - 前記第1及び第2のゲート部材が、前記第1及び第2のフィールドプレートから絶縁されている、
ことを特徴とする請求項1に記載の半導体デバイス。 - 前記第1のソース領域が更に、前記ピラーの上面又はその近傍に配置された第2の導電型の1つ又はそれ以上の領域を含む、
ことを特徴とする請求項1に記載の半導体デバイス。 - メイン垂直電界効果トランジスタ(FET)と、
検知FETと、
を備える半導体デバイスであって、
前記メイン垂直FET及び前記検知FETが共に、第1の導電型の基板上に形成された半導体材料のピラー上に形成されて、前記ピラーが、幅及び第1の横方向に延びる長さと、前記ピラーの両側に配置された第1及び第2の誘電領域と、前記ピラーボディ領域の上面又はその近傍で前記第1及び第2の誘電領域内の前記ピラーに隣接してそれぞれ配置された第1及び第2のゲート部材とを有し、前記メイン垂直FET及び前記検知FET両方が、前記基板上で前記ピラー内に形成された前記第1の導電型の拡張ドレイン領域を共用しており、
前記第1及び第2のゲート部材がまた、前記メイン垂直FET及び前記検知FETにより共通して共有されており、
前記メイン垂直FETが更に、
前記拡張ドレイン領域の上で前記ピラー内に配置された第2の導電型の第1のボディ領域と、
前記ピラーの上面又はその近傍に配置された第1のソース領域と、
を含み、
前記ソース領域が前記第1のボディ領域によって前記拡張ドレイン領域から垂直方向に分離されており、
前記検知FETが更に、
前記拡張ドレイン領域の上で前記ピラー内に配置された第2の導電型の第2のボディ領域と、
前記ピラーの上面又はその近傍に配置された第2のソース領域と、
を含み、
前記第2のソース領域が、前記第2のボディ領域によって前記拡張ドレイン領域から垂直方向に分離され、前記第2のソース領域が、前記第1のソース領域から前記第1の横方向で分離され且つ電気的に絶縁されており、
前記検知FETが、前記メイン垂直FET内に流れる電流の小部分をサンプリングするように動作可能である、
ことを特徴とする半導体デバイス。 - 前記第1及び第2の誘電領域内にそれぞれ配置された第1及び第2のフィールドプレートを更に備える、
ことを特徴とする請求項8に記載の半導体デバイス。 - 前記第1のソース領域に電気的に接触するソース電極と、
前記第2のソース領域に電気的に接触する検知ソース電極と、
前記基板の下面に電気的に接触するドレイン電極と、
を更に備える、
ことを特徴とする請求項9に記載の半導体デバイス。 - 前記ソース電極がまた、前記第1及び第2のフィールドプレートに電気的に接触する、
ことを特徴とする請求項10に記載の半導体デバイス。 - 前記拡張ドレイン領域の区域が、前記第1及び第2のボディ領域の間で前記ピラーの上面に延びる、
ことを特徴とする請求項8に記載の半導体デバイス。 - 前記第1のボディ領域が、前記第1の横方向において前記第1のソース領域の両側で前記ピラーの上面に延びており、前記第2のボディ領域が、前記第1の横方向において前記第2のソース領域の両側で前記ピラーの上面に延びている、
ことを特徴とする請求項12に記載の半導体デバイス。 - 前記第1及び第2のボディ領域が、前記メイン垂直FET及び前記検知FETに共通する単一のボディ領域を含み、前記単一のボディ領域の区域が、前記第1及び第2のソース領域の間の前記ピラーの上面に延びている、
ことを特徴とする請求項8に記載の半導体デバイス。 - 前記ピラーがレーストラック形レイアウトで配列され、前記ピラーの長さが前記幅よりも少なくとも30倍大きい、
ことを特徴とする請求項8に記載の半導体デバイス。 - 並列関係で配列された複数のトランジスタセグメントを備える半導体デバイスであって、
前記各トランジスタセグメントが、
第1の導電型の基板上にレーストラック形レイアウトで形成され、幅及び第1の横方向に延びる長さを有し、且つ上面又はその近傍に配置されたソース領域と、拡張ドレイン領域と、前記ソース領域及び前記拡張ドレイン領域を垂直方向に分離する第2の導電型のボディ領域とを有する半導体材料のピラーと、
前記ピラーの両側にそれぞれ配置された、前記ピラーによって横方向に囲まれた第1の誘電領域及び前記ピラーを横方向に囲む第2の誘電領域と、
前記ボディ領域に隣接する前記ピラーの上部又はその近傍で前記第1及び第2の誘電領域内にそれぞれ配置された第1及び第2のゲート部材と、
前記第1及び第2の誘電領域内にそれぞれ配置された第1及び第2のフィールドプレートと、
を含み、
前記半導体デバイスが更に、
前記トランジスタセグメントの多数の前記ソース領域に電気的に接触し、メイン垂直トランジスタと関連づけられたソース電極と、
前記トランジスタセグメントの少数の前記ソース領域に電気的に接触し、前記メイン垂直トランジスタに流れる電流の小部分をサンプリングするように動作可能な検知トランジスタと関連づけられた検知電極と、
前記基板の下面に電気的に接触するドレイン電極と、
を備え、
前記ドレイン電極並びに前記第1及び第2のゲート部材が各々、前記メイン垂直トランジスタ及び前記検知トランジスタに共通している、
ことを特徴とする半導体デバイス。 - 前記トランジスタセグメントの多数が、単一のトランジスタセグメントを含む、
ことを特徴とする請求項16に記載の半導体デバイス。 - 前記ソース電極が、前記トランジスタセグメント全ての第1及び第2のフィールドプレートに電気的に接触する、
ことを特徴とする請求項16に記載の半導体デバイス。 - 前記ソース電極が、前記トランジスタセグメント全ての第2のフィールドプレートと、前記メイン垂直トランジスタに関連付けられた前記トランジスタセグメントの多数の第1のフィールドプレートとに電気的に接触し、前記検知電極が、前記検知トランジスタに関連づけられた前記トランジスタセグメントの少数の第1のフィールドプレートと電気的に接触する、
ことを特徴とする請求項16に記載の半導体デバイス。 - 前記第1の横方向の長さが、前記幅よりも少なくとも30倍大きい、
ことを特徴とする請求項16に記載の半導体デバイス。 - 前記第1及び第2のゲート部材が、前記第1及び第2のフィールドプレートから絶縁されている、
ことを特徴とする請求項16に記載の半導体デバイス。 - 前記ソース領域が、前記第1の導電型の第1の領域と前記第2の導電型の第2の領域とを含み、前記第1及び第2の領域は、前記第1の領域の各々が前記第2の領域の1つと隣接するように前記第1の横方向で交互するように配列されている、
ことを特徴とする請求項16に記載の半導体デバイス。
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US11/707,586 US8653583B2 (en) | 2007-02-16 | 2007-02-16 | Sensing FET integrated with a high-voltage transistor |
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JP2020161838A (ja) * | 2013-10-03 | 2020-10-01 | 日本テキサス・インスツルメンツ合同会社 | トレンチゲートトレンチフィールドプレート半垂直半横方向mosfet |
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JP2020161838A (ja) * | 2013-10-03 | 2020-10-01 | 日本テキサス・インスツルメンツ合同会社 | トレンチゲートトレンチフィールドプレート半垂直半横方向mosfet |
JP7021416B2 (ja) | 2013-10-03 | 2022-02-17 | テキサス インスツルメンツ インコーポレイテッド | トレンチゲートトレンチフィールドプレート半垂直半横方向mosfet |
JP2022033954A (ja) * | 2013-10-03 | 2022-03-02 | テキサス インスツルメンツ インコーポレイテッド | トレンチゲートトレンチフィールドプレート半垂直半横方向mosfet |
JP7397554B2 (ja) | 2013-10-03 | 2023-12-13 | テキサス インスツルメンツ インコーポレイテッド | トレンチゲートトレンチフィールドプレート半垂直半横方向mosfet |
Also Published As
Publication number | Publication date |
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CN101246887B (zh) | 2011-12-21 |
US20080197406A1 (en) | 2008-08-21 |
JP5214288B2 (ja) | 2013-06-19 |
US8653583B2 (en) | 2014-02-18 |
EP1959499A2 (en) | 2008-08-20 |
JP2013141005A (ja) | 2013-07-18 |
CN102376768A (zh) | 2012-03-14 |
JP5638645B2 (ja) | 2014-12-10 |
CN102376768B (zh) | 2015-08-19 |
CN101246887A (zh) | 2008-08-20 |
EP1959499A3 (en) | 2010-07-14 |
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