JP2008141021A - 半導体装置及び半導体装置の製造方法 - Google Patents
半導体装置及び半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 121
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 229920005989 resin Polymers 0.000 claims abstract description 101
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- 238000005229 chemical vapour deposition Methods 0.000 description 3
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- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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Abstract
【解決手段】所定位置に外部接続用の電極が配置された層間膜11を有する半導体チップ10’と、前記電極とそれぞれ導通させて層間膜11上に設けた再配線12と、これら再配線12を被覆した絶縁層13と、この絶縁層13の所定位置に設けた開口を介して再配線12とそれぞれ導通させたパッド15と、これらパッド15にそれぞれ設けた半田端子19とを備えた半導体装置A及びその製造方法において、絶縁層上13には感光性樹脂膜17を設けて、この感光性樹脂膜17で層間膜11の外周縁を被覆する。
【選択図】図1
Description
(1)半導体チップの外周縁には、層間膜と対向する裏面側の外周縁を、層間膜側の外周縁よりも外方に向けて突出させた段差部を設け、半導体チップにおける層間膜側の外周縁を感光性樹脂膜で被覆したこと。
(2)半導体チップにおける層間膜側の外周縁を被覆した感光性樹脂膜の厚み寸法を、層間膜と対向する裏面側の外周縁の突出寸法よりも小さくしたこと。
(3)感光性樹脂膜の上面の高さを、パッドの上面の高さよりも低くして、パッドを感光性樹脂膜から突出させたこと。
10 ウエーハ
10' 半導体チップ
10'a 段差部
11 層間膜
12 再配線
13 絶縁層
13a パッシベーション膜
13b バッファー膜
14 スクライブライン領域
15 パッド
16 溝
17 感光性樹脂膜
18 エッチング溝
19 半田端子
20 切断溝
Claims (6)
- 所定位置に外部接続用の電極が配置された層間膜を有する半導体チップと、
前記電極とそれぞれ導通させて前記層間膜上に設けた再配線と、
これらの再配線を被覆した絶縁層と、
この絶縁層の所定位置に設けた開口を介して前記再配線にそれぞれ導通させたパッドと、
これらのパッドにそれぞれ設けた半田端子と
を備えた半導体装置において、
前記絶縁層上には感光性樹脂膜を設け、この感光性樹脂膜で前記層間膜の外周縁を被覆したことを特徴とする半導体装置。 - 前記半導体チップの外周縁には、前記層間膜と対向する裏面側の外周縁を、前記層間膜側の外周縁よりも外方に向けて突出させた段差部を設け、
前記半導体チップにおける前記層間膜側の外周縁を前記感光性樹脂膜で被覆したことを特徴とする請求項1記載の半導体装置。 - 前記半導体チップにおける前記層間膜側の外周縁を被覆した前記感光性樹脂膜の厚み寸法を、前記層間膜と対向する裏面側の外周縁の突出寸法よりも小さくしたことを特徴とする請求項2記載の半導体装置。
- 前記感光性樹脂膜の上面の高さを、前記パッドの上面の高さよりも低くして、前記パッドを前記感光性樹脂膜から突出させたことを特徴とする請求項1〜3のいずれか1項に記載の半導体装置。
- スクライブラインによって区分されるウエーハ上の各半導体チップの形成領域に層間膜を設けるとともに、この層間膜上に再配線を設けて、この再配線を前記半導体チップにおける外部接続用の電極に接続するとともに、前記再配線の所定位置に電気的に接続させたパッドを設けた半導体装置の製造方法において、
前記パッドの形成後に前記スクライブラインに沿って前記ウエーハに溝を形成する工程と、
前記溝が形成された前記ウエーハ上に感光性樹脂膜を形成する工程と、
前記感光性樹脂膜をパターンニングして前記パッド上の前記感光性樹脂膜に開口を形成する工程と、
前記感光性樹脂膜をアッシングによって薄膜化する工程と、
前記パッドに半田端子を形成する工程と、
前記溝よりも細幅とした切断溝を前記溝内に形成して前記ウエーハをダイシングする工程と
を有する半導体装置の製造方法。 - 前記感光性樹脂膜をパターンニングする工程では、前記パッド上の前記感光性樹脂膜を除去するとともに、前記溝内の前記感光性樹脂膜を除去して、前記溝よりは細幅とするとともに前記切断溝よりは太幅とした前記感光性樹脂膜のエッチング溝を前記溝内に形成し、
前記ダイシングでは、前記エッチング溝内に前記切断溝を形成することを特徴とする請求項5に記載の半導体装置の製造方法。
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