TW200834769A - Semiconductor device and method of manufacturing semiconductor device - Google Patents

Semiconductor device and method of manufacturing semiconductor device Download PDF

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Publication number
TW200834769A
TW200834769A TW096143301A TW96143301A TW200834769A TW 200834769 A TW200834769 A TW 200834769A TW 096143301 A TW096143301 A TW 096143301A TW 96143301 A TW96143301 A TW 96143301A TW 200834769 A TW200834769 A TW 200834769A
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TW
Taiwan
Prior art keywords
film
photosensitive resin
wafer
resin film
pad
Prior art date
Application number
TW096143301A
Other languages
English (en)
Inventor
Tatsuya Sakamoto
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of TW200834769A publication Critical patent/TW200834769A/zh

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

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200834769 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種半導體裝置及半導體裝置之製造方 法，尤其係關於一種作為所謂晶圓級CSP之半導體裝置及 半導體裝置之製造方法。 【先前技術】 近年來，為對應半導體裝置之小型化之要求，使用有被 稱作曰日圓級CSP (Chip Scale Package，晶片尺度封装）之形 態之半導體裝置。 y 所謂晶圓級CSP(以下標示為r WL_csp (Wafer Lae! Chip Scale Package，晶圓級晶片尺度封裝））係如下者， 即，於切斷（切割）晶圓之前，使晶圓形成為具有作為封裝 之功能之構造，於切割後，可直接將晶圓作為半導體裝置 安裝至安裝基板。WL-CSP中，並未設置先前被稱作封裝 之谷态狀之構造物，因此，可相應地小型化。 於WL-CSP之製造步驟中，按照通常之半導體晶片之製 造步驟，力由切割道所劃分之晶圓上之各半導體晶片的形 成區域中，形成所需之半導體電路。又，於各半導體晶片 之形成區4中形成電極，該電極例如用於輸入輸出上述半 ^體電路中所使用之信號、或者施加_動用電壓或接地電 壓。 此處，較理想的是，與外部配線電性連接之電極配設於 平坦面上。因& ’藉由氧化膜等而於晶圓之上表面形成所 謂之層間膜，並藉由 CMP (Chemieal Meehanieal PQlishing， 126707.doc 200834769 化：機械研磨)技術，使該層間膜之上表面平坦化。 11而f極形成為於層間膜之特定位置貫通狀地埋入金 材料而成之所明之埋人電極。以下，將該埋人電極本身 山稱為t極」。再者’根據情形，有時亦於埋入電極之 端口p連接叹置墊狀之金相。此時，亦將包含墊狀之金屬 膜之埋入電極僅稱為「電極」。 」木用通常之封裝之半導體裝置中，於形成電極後，沿切 J道對曰曰圓進行切割。相對於此，wL_csp中，於形成電 極後二於層間膜上形成分別與電極電性連接之再配線。其 後，藉由絕緣層來覆蓋再配線並使該再配線絕緣，於絕緣 層之特定位置形成開口，藉此，形成使再配線之-部分自 上述開口路出之連接部。進而，藉由利用鑄模樹脂覆蓋絕 、、g上表面而形成鑄模層，於該鑄模層之特定位置形成使 連接部露出之開口。繼而，於缚模層之開口内設置與再配 、電丨連接之柱基，於將焊錫端子安裝至柱塞之後，沿切 割道對晶圓進行切割。 ，此處，切割時，不僅切斷構成晶圓之半導體基板，亦一 併切斷層間膜、絕緣層、以及鑄模層，因lit，於藉由切斷 而形成之切斷端面上露出有層間膜及絕緣層之切斷端面。 如此’右切斷端面上露出有層間膜，則存在層間膜易自 半導體基板剝落之傾向。 口此如圖9所示，最近之WL_csp中，於形成有層間膜 no及電極之晶圓100上設置再配線12〇，於形成包含氮化 夕膜專保屢膜（passivati〇n 及聚酸亞胺膜等緩衝 126707.doc 200834769 膜130b之絕緣層13〇之後，使用寬幅之切割用刀片，沿切 口J道對a曰圓1 00進行半切，藉此形成溝槽丨6〇。繼而，依序 形成鑄模層210、柱塞220、及焊錫端子23〇之後，沿溝槽 160對晶圓1〇〇進行切割。圖9中，2〇〇係藉由切割而形成之 切斷溝槽。 如此，當沿切割道對晶圓100進行半切，藉此，於層間 膜120上形成溝槽160時，利用鑄模層21〇對溝槽16〇進行回 填，藉此，利用層間膜110之外周緣來覆蓋鑄模層21〇。其 、…果，可防止於切割後之切割端面上露出層間膜〗丨〇，故 可抑制層間膜110產生剝落。 然而，隨著更加小型化之要求不斷高漲，業者期望不設 置麵r模層之薄型之WL-CSP。如圖1 〇所示，於不設置鑄模 層之情形時，於形成有層間膜110及電極之晶圓1〇〇上設置 再配線120，於形成包含氮化矽膜等保護膜13(^及聚醯亞 胺膜等緩衝膜130b之絕緣層130之後，於該絕緣層13〇之特 疋位置形成開口。繼而，形成與再配線丨2〇電性連接之墊 150，於該墊150上形成焊錫端子i9〇之後，沿切割道對晶 圓100進行切割。因此，藉由切割而形成之切割端面上露 出層間膜110。 尤其，如圖11所示，當將此種薄型之WL_CSP安裝至所 需之基板300時，於薄型之WL-CSP與基板3〇〇之間填充被 稱作底部填充材400之接合輔助材料。因此，由伴隨底部 填充材400之硬化之收縮作用所產生之應力作用於層間膜 Π〇，此成為層間膜110自半導體基板100,剝落之發生率增 126707.doc 200834769 加之原因。圖11中，310係設置於基板300上之連接用墊。 【發明内容】 本發明之一態樣之半導體裝置包含：半導體晶片，其具 有於特定位置配置有外部連接用電極之層間膜；再配線， 其與上述電極導通，且設置於上述層間膜上；絕緣層，其 覆蓋上述再配線；墊，其經由形成於上述絕緣層之開口而 與上述再配線導通；以及焊錫端子，其設置於上述墊；且
於上述絕緣層上設有感光性樹脂膜，藉由上述感光性樹脂 膜來覆蓋上述層間膜之外周緣。 根據該構成，可防止層間膜成為露出狀態，從而防止層 間膜自構成半導體晶片之半導體基板剝落。尤其，因可使 =光性樹賴比較薄，故形成感光性樹脂臈時，不會使半 導體裝置大型化即可覆蓋層間膜之外周緣。 亦可於上述半導體晶片之外周緣設有階差部，該階差部 係使與上述層間膜對向之背面側之外周緣較上述層間膜側 之外周緣向更外邊突㈣，上述半導體晶片中之上述層間 模側之外周緣係由上述感光性樹脂膜所覆蓋。 藉此’可抑制覆蓋層間膜之外用 ^… n胰之外周緣之感光性樹脂膜自構 成半導體晶片之半導體基板剝落。 較好的是，覆蓋上述半導體晶 守日日月中之上述層間膜側之外 周緣的上述感光性樹脂膜的厚度 ^ 予又尺寸，小於與上述層間膜 對向之月面側之外周緣之突出尺寸。 於感光性樹脂膜上無 膜之缺損而導致感光 藉此，當藉由切割來切斷晶圓時， 產生缺損之虞，可防止因感光性樹脂 126707.doc 200834769 性樹脂膜自半導體基板剝落。 、較好的是’使上述感光性樹賴之上表面之高度低於上 述塾之上表面之高度’藉此，使上述塾自上述感光性樹脂 膜突出。 藉此，即便设置有感光性樹脂膜，亦可於良好之連接狀 恶下連接墊與焊錫端子，從而可消除半導體裝置可靠性降 低之可能性。 與本發明之其他態樣相關之半導體裝置之製&方法中， 該半v體衣置係於由切割道所劃分之晶圓上之各半導體晶 片之形成區域中設置層間膜’於上述層間膜上設置再： 線，將上述再配線連接至上述半導體晶片中之外部連接用 電本並且β又置與上述再配線之特定位置電性連接之墊。 繼而:上述半導體裝置之製造方法包括以下步驟：上述塾 形成後，於上述晶圓沿上述切割道形成溝槽；於形成有上 ㈣槽之上述晶圓上形成感光性樹脂膜；使上述感光性樹 脂膜圖案化，於上述墊上之上述感光性樹脂膜形成開口； 將上述感光性樹脂膜藉由灰化而薄膜化；於上述塾形成焊 錫端子；以及於上述溝槽内形&寬度小於上述溝槽之切斷 溝槽，並切割上述晶圓。 根據該製造方法，藉由感光性樹脂膜覆蓋層間膜之外周 緣，可防止層間膜成為露出狀態，從而可抑制層間膜自構 成半導體晶片之半導體基板剝落。 於使上述感光性樹脂膜圖案化之步驟中，較好的是，除 去上述墊上之上述感光性樹脂膜，並除去上述溝槽内之上 126707.doc 200834769 述感光性樹脂膜，於上述溝槽内形成寬度小於上述溝槽且 大於上述切斷溝槽之上述感光性樹脂膜之㈣溝槽，利用 上述切割而於上述蝕刻溝槽内形成上述切斷溝槽。 藉此纟以切剎來切斷晶圓時，感光性樹脂膜不會被切 斷’可消除於感光性樹脂膜上產生缺損之可能性，從而可 防止因感光性树脂膜之缺損而導致感光性樹脂膜自半導體
基板剝落。 I 、本發明之上述或其他目的、特徵及效果，參照隨附圖 式，並根據下述實施形態之說明而得以明確。 【實施方式】 以下，一面麥照圖式，一面詳細說明本發明之實施形 離。 、 少 圖1係本實施形態之半導體裝置之要部之剖面模式圖。 半導體裝置A以晶圓之狀態形成，該晶圓為圓盤狀之半 導體基板。如下所述，半導體裝置A以藉由晶圓切割而形 成為俯視時呈矩形之半導體基板作為基體。 於半導體基板中，使用已知之半導體電路形成技術，形 成有所需之半導體電路（未圖示）。以下為便於說明，將形 成有半導體電路之半導體基板稱為半導體晶片1〇,。 於半導體晶片101之上表面例如設有由氧化膜構成之層 間膜11。於層間膜11之特定位置設有未圖示之電極。經由 該電極，將信號輸入至半導體電路，或自半導體電路輸出 信號，或者施加驅動用電壓或接地電壓。 於層間膜11上設有與上述電極電性連接之再配線12。進 126707.doc -10- 200834769 而’於層間膜1 1上設有絕緣層1 3，該絕緣層丨3包含覆蓋再 配線12之氮化石夕膜等保護膜13 a及聚酿亞胺膜等緩衝膜 13b。設置保護膜13a之基本目的在於絕緣。設置緩衝膜 13b之目的在於緩和應力。 於絕緣層13之特定位置形成有開口。於該開口部分設有 與上述再配線12電性連接之墊15。
進而，於緩衝膜nb上設有感光性樹脂膜17。感光性樹 脂膜17於使上述墊15露出之狀態下，覆蓋層間膜u、保護 膜13a、以及緩衝膜13b。 於半導體晶片1G’之外周緣，使與層間膜⑽向之背面 侧之周緣部’較層間膜！！側之周緣部向更外邊突出，藉此 形成階差部lo’a。感光性樹脂膜17圍繞覆蓋絕緣層η及層 間膜11之側面，直至階差部】Λ， # 丨白差。M〇a。错此，層間膜11之外周 緣完全由感光性樹脂膜i 7所覆蓋。 如此’因藉由感光性樹脂膜17覆蓋層間膜u之外周緣， 故：防止層間膜11成為露出狀態，從而可抑制層間膜"自 半體晶片1 (V剝落。 此處’半導體晶片10,之覆蓋層間膜u 光性樹脂膜17的厚度尺寸L1， 啄之取 小於與層間膜11對向之背面 側之外周緣之突出尺寸L2。 、i 田精由切割而將晶圓切 個半導體晶片1G，時，並無切割用之刀片接觸感光性 树脂膜而導致感光性樹脂膜17產生缺損之虞。由二，可 Γ止由感光性樹脂膜17之缺損引起之感光性樹脂膜η之剝 126707.doc 200834769 於自感光性樹脂膜17露出之墊15上，設有由焊錫構成之 导錫端子19。感光性樹脂膜17之上表面之高度低於墊15之 上表面之高度，塾15自感光性樹脂膜17突出。因此，可獲 得墊15與焊錫端子19良好地連接之狀態。 知錫鳊子1 9係所謂之焊球。可將特定粒徑之焊球分別焊 接於墊15而作為焊錫端子19，亦可藉由塗佈焊錫膏或者藉 由T錫電鑛形成焊錫被覆膜後，對該焊錫被覆膜加熱而使 之熔融為球狀，由此作為焊錫端子19。 以下，對本實施形態之半導體裝置之製造方法加以說 明。 於晶圓狀態下製造半導體裝置。於由切割道所劃分之各 半導體晶片之形成區域中，藉由已知之半導體製造技術而 形成有特定之半導體電路，上述切割道呈柵格狀地設於晶 圓狀態之半導體基板上。 如圖2所不，形成半導體電路後，於形成有半導體電路 之晶圓10之上表面’形成由氧化膜等絕緣膜構成之層間膜 11。藉由 CVD (Chemical Vapor Dep〇siti〇n，化學氣相沈 積）等適當之製膜技術，使上述層間膜丨丨形成為特定厚 度，其後，藉由CMP技術使上述層間膜u平坦化。再者， 並非必須使層間膜U平坦化，視需要進行平坦化處理即 可0 此處，於平坦化處理之前，於層間膜〖丨之特定位置埋設 半導體電路之外部連接用電極（未圖示）。於層間膜丨丨之上 表面形成抗蝕劑遮罩，對層間膜丨丨進行蝕刻，藉此，於層 126707.doc -12- 200834769 間膜11之特定位置形成電極形成用之開口。其後，藉由濺 鍍等於層間膜1 1之上表面形成金屬膜，並於電極形成用之 開口内填充金屬，藉此，於電極形成用之開口内形成電 極。形成金屬膜後，藉由CMP—面一併對層間膜u與金屬 膜進行切削’ 一面使層間膜11平坦化。
形成於特定位置配置有電極之層間膜丨丨後，藉由濺鍍等 於該層間膜11之上表面形成金屬膜，使該金屬膜形成特定 圖案，藉此，形成與上述電極電性連接之再配線12。本實 施形態中，再配線12由鋁構成。 再配線12形成後，藉由CVD於晶圓1〇之上表面形成由氮 化矽膜構成之保護膜na。再者，保護膜13a並不限定為氮 化矽膜，只要為適當之絕緣膜即可。形成保護膜13a後， 使該保護膜13a圖案化，於下述焊錫端子之配設位置部分 形成使上述再配線12之一部分露出之開口。使保護膜 圖案化時，亦除去晶圓10中之切割道區域14之保護膜。 保護膜13a形成後，藉由旋塗等，於晶圓1〇之上表面形 成聚醯亞胺膜等緩衝膜13b。再者，緩衝膜13b並不限定為 聚醯亞胺膜，只要為適當之絕緣膜即可。形成緩衝膜咖 後，使該缓衝膜13b圖案化，形成與設於保護膜13a之開口 連通之開π。藉此，上述再配線12之〜部分露I使緩衝 膜m圖案化時’除去晶圓1〇中之切割道區域⑽緩衝膜 13b本實細形恶中’由保護膜⑸與緩衝膜別構成絕緣 層13 〇 於晶圓10之上表面形 緩衝膜13b形成後，藉由濺鍍等 126707.doc -13- 200834769 成王屬膜，使該金屬膜圖案化，藉此，於下述焊錫端子之 、置形成墊15。墊15係設置於在保護膜13a及緩衝膜 m所&的開口部> ’並與再配線12電性連接。本實施形 態中，墊15包含鋼。
斤示墊15开> 成後，使用寬幅之切割用刀片，沿 切割道對晶圓10進行半切，藉此，於晶圓10上形成沿切割 道^溝槽16。該溝槽16係形成為將制膜11沿切割道完全 切斷之π度。溝槽16之深度，較理想的是設為於處理晶圓 10時不會使晶圓1〇沿溝槽發生斷裂之程度，通常，設為晶 圓10之厚度之50%以内。 如圖4所示，溝槽16形成後’於晶圓1〇上塗佈感光性樹 脂:藉此形成覆蓋上述墊15之感光性樹脂❹。作為感光 1±树月曰可使用聚醯亞胺或聚苯幷嗔σ坐等。 如圖5所示’感光性樹脂膜17形成後’使感光性樹脂膜 圖案化藉此，於墊15上之感光性樹脂膜丨7形成開口。 墊15經由該開口自感光性樹脂層17露出。此時，利用已知 之光微影技術進行曝光’使感光性樹脂膜17硬化，並藉由 兹刻將未曝光部分除去’藉此，可極其容易地使上述感光 性樹脂層17圖案化。 進而，使感光性樹脂膜1 7圖 案化，亦使上述溝槽16部分之 溝槽16除去感光性樹脂臈丨7， 性樹脂膜17之蝕刻溝槽18。亦 形成於晶圓10之溝槽16之寬度 案化時，不僅使墊15部分圖 感光性樹脂膜17圖案化，沿 藉此，於溝槽16内形成感光 即，蝕刻溝槽1 8之寬度小於 。進而，蝕刻溝槽18之寬度 126707.doc -14- 200834769 大於切斷溝槽20之寬度，該切斷溝槽2〇係藉由切割下述日曰 圓i 〇時所使用之切割用刀片而形成於晶圓1 %參照圖…θθ 使感光性樹脂肪圖案化後，藉由灰化使感光性樹脂膜 17薄膜化。如圖6所示，該灰化之處理時間設定為直至感 光性樹脂膜17之上表面低於墊15之上表面，且墊15相對於 感光性樹脂膜17呈突出狀為止之時間。 、 如此，因墊15相對於感光性樹脂膜17呈突出狀，故如下 所述’當將焊錫端子19安裝於塾15時，可提高焊錫端子Μ 之連接強度及長期可靠性（參照圖7)。 再者，考慮到感光性樹脂17伴隨灰化而減少之厚度，亦 可使形成於感光性樹脂膜17之蝕刻溝槽i 8之寬度小於形成 於晶圓1G之溝槽16的寬度，並且大於形成於晶圓10之切斷 溝槽20之寬度。 如圖7所示，藉由灰化使感光性樹脂膜17薄膜化後，於 墊15上形成焊錫端子19。本實施形態中，將特定粒徑之焊 球女表於各墊15，使該焊球溶融後，將其焊接至墊丨5 ,藉 此形成焊錫端子19。再者，焊錫端子19並不僅藉由焊接焊 求而^/成，可於塾部分塗佈焊錫膏而形成，亦可於墊部分 設置藉由焊錫電鍍之焊錫被覆膜而形成。 如圖8所不，形成焊錫端子19後，沿設於晶圓10之溝槽 16切割晶圓10，藉此，獲得彼此分離之半導體裝置A。 對晶圓ίο進行切割時，使用寬度小於蝕刻溝槽18之寬度 尺寸之刀片。使用此種刀片將蝕刻溝槽18内切斷，藉此， 於餘刻溝槽18内形成切斷溝槽2〇。 126707.doc •15· 200834769 如：’於晶圓ίο上沿切割道形成切斷層間膜u之溝槽 16,错由感光性樹脂膜17回填該溝槽16，於溝槽16内形成 寬度小於溝槽16之切斷溝槽20，對晶ΗΠ0進行㈣，藉 此可極其谷易地製造藉由感光性樹脂膜17覆蓋層間膜η 卜周緣之半‘體裝置。藉由感光性樹脂膜η，可抑制層 間膜11自構成半導體晶片1G，之半導體基板剝落。 尤其，糟由感光性樹脂膜17來覆蓋層間膜u之外周緣， 需使半導體裝置八大型化，即可完全覆蓋層間膜 Π之外周緣。 、鳌梯U10進仃切割時，於㈣溝槽18内形成切斷 溝槽2〇’藉此’當藉由切割來切斷晶圓咖 :樹脂膜17上產生因切斷引起之缺損。其結果，可防2 =生樹腊膜17之缺損而導致感光性樹脂膜17自半導體基 二：晶圓Μ上形成沿切割道之溝槽16，於該溝槽16内 ^成見度小於該溝槽16之切斷溝槽2〇，藉此，於經切割之 半導體裝置Α之外周緣形成階差。於溝槽“内形成寬度小 於該溝㈣且大於切斷溝槽20之钱刻溝槽18，於該钱刻溝 槽18内形成切斷溝槽2G’藉此，可使半導體晶片W之覆蓋 中層間膜U侧之外周緣之感光性樹月旨膜！7的厚度尺寸Ll， 小於與層間膜U對向之背面侧之外周緣之突出尺寸L2e 雖已對本發明之實施形態進行了詳細說明，但該等實施 形悲僅係用以使本發明之技術内容變得明確之具體例，不 應限定於該等具體例而對本發明進行解釋，本發明之精神 126707.doc -16- 200834769 及範圍僅受到附加之申請專利範圍限定。 本申睛案對應於2006年12月1日向日本國專利乃提出申 請之日本專利特願2006-326385號，該申請案之全部揭厂、 以引用之方式併入本文。 “ 【圖式簡單說明】 圖1係本發明之實施形態之半導體裝置之要部剖面模 •圖。 杲工 圖2係用以說明半導體裝置之製造步驟之要部剖面模 • ®。 、武 圖3係用以說明半導體裝置之製造步驟之要部剖面模 圖。 圖4係用以說明半導體裝置之製造步驟之要部剖面模 圖。 、式 圖5係用以說明半導體裝置之製造步驟之要部剖面模 圖。 、式 • 圖6係用以說明半導體裝置之製造步驟之要部剖面模 圖。 、 圖7係用以說明半導體裝置之製造步驟之要部剖面模 ， 圖。 、& • 圖8係用以說明半導體裝置之製造步驟之要部剖面模 圖。 、 圖9係先前之半導體裝置之要部剖面模式圖。 圖1 〇係先前之半導體裝置之要部剖面模式圖。 圖11係將先前之半導體裝置安裝於安裝基板之狀態下的 126707.doc -17· 200834769 要部剖面模式圖。 【主要元件符號說明】 A 10 10，10，a 11 12
13a 13b 14 15 16 17
19 20 半導體裝置 晶圓 半導體晶片 階差部 層間膜 再配線 絕緣層 保護膜 緩衝膜 切割道區域 墊 溝槽 感光性樹脂膜 蝕刻溝槽 焊錫端子 切斷溝槽 126707.doc -18 -

Claims (1)

  1. 200834769 十、申請專利範圍： 1· 一種半導體裝置，其包含： 半導體晶片’其含有於特定位置配置有外部連接用電 極之層間膜； 再配線，其與上述電極導通，且設置於上述層間膜 上， 絕緣層’其覆蓋上述再配線； 墊’其經由形成於上述絕緣層之開口而與上述再配線 導通；以及 焊錫端子，其設置於上述墊；且 於上述絕緣層上設有感光性樹脂膜，藉由上述感光性 樹脂膜來覆蓋上述層間膜之外周緣。 2·如請求項1之半導體裝置，其中 於上述半導體晶片之外周緣設有階差部，該階差部係 使與上述層間膜對向之背面側之外周緣較上述層間臈側 之外周緣向更外邊突出者；且 上述半導體晶片中之上述層間膜側之外周緣係由上述 感光性樹脂膜所覆蓋。 3·如請求項2之半導體裝置，其中 覆盍上述半導體晶片中之上述層間膜側之外周緣的上 述感光性樹脂膜的厚度尺寸，小於與上述層間膜對向之 背面側之外周緣之突出尺寸。 4·如請求項1之半導體裝置，其中 精由使上述感光性樹脂膜之上表面之高度低於上述墊 126707.doc 200834769 面之间度，而使上述墊自上述感光性樹脂膜 出。 5·:種半導體裝置之製造方法，該半導體裝置係於由切割 道所劃分之晶圓上之各半導體晶片之形成區域中設置層 間膜’並於上述層間膜上設置再配線，將上述再配線連 接至上述半導體晶片巾之外部連接用電極，並且設置與 上述再配線之特定位置電性連接之墊者； 别述方法包括以下步驟： 述墊开/成後，於上述晶圓沿上述切割道形成溝槽； 於形成有上述溝槽之上述晶圓上形成感光性樹脂膜； 使上述感光性樹脂膜圖案化，於上述墊上之上述感光 性樹脂膜形成開口； 將上述感光性樹脂膜藉由灰化而薄膜化，· 於上述墊形成焊錫端子；以及 、、述溝槽内形成寬度小於上述溝槽之切斷溝槽，並 切割上述晶圓。 6.如請求項5之半導體裝置之製造方法，其中 於使上述感光性樹脂膜圖案化之步驟中，除去上述墊 ^述感光〖生树脂膜，並除去上述溝槽内之上述感光 I·生樹月曰膜’於上述溝槽内形成寬度小於上述溝槽且大於 上述切斷4槽之上述感光性樹腊膜之㈣溝槽； 利用上述切割而於上述蝕刻溝槽内形成上述切斷溝 126707.doc
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