JP2007318106A5 - - Google Patents

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Publication number
JP2007318106A5
JP2007318106A5 JP2007113979A JP2007113979A JP2007318106A5 JP 2007318106 A5 JP2007318106 A5 JP 2007318106A5 JP 2007113979 A JP2007113979 A JP 2007113979A JP 2007113979 A JP2007113979 A JP 2007113979A JP 2007318106 A5 JP2007318106 A5 JP 2007318106A5
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JP
Japan
Prior art keywords
layer
opening
element formation
formation layer
tungsten
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JP2007113979A
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English (en)
Japanese (ja)
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JP5227536B2 (ja
JP2007318106A (ja
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Priority to JP2007113979A priority Critical patent/JP5227536B2/ja
Priority claimed from JP2007113979A external-priority patent/JP5227536B2/ja
Publication of JP2007318106A publication Critical patent/JP2007318106A/ja
Publication of JP2007318106A5 publication Critical patent/JP2007318106A5/ja
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Publication of JP5227536B2 publication Critical patent/JP5227536B2/ja
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JP2007113979A 2006-04-28 2007-04-24 半導体集積回路の作製方法 Expired - Fee Related JP5227536B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007113979A JP5227536B2 (ja) 2006-04-28 2007-04-24 半導体集積回路の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006126329 2006-04-28
JP2006126329 2006-04-28
JP2007113979A JP5227536B2 (ja) 2006-04-28 2007-04-24 半導体集積回路の作製方法

Publications (3)

Publication Number Publication Date
JP2007318106A JP2007318106A (ja) 2007-12-06
JP2007318106A5 true JP2007318106A5 (enExample) 2010-04-02
JP5227536B2 JP5227536B2 (ja) 2013-07-03

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JP2007113979A Expired - Fee Related JP5227536B2 (ja) 2006-04-28 2007-04-24 半導体集積回路の作製方法

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JP (1) JP5227536B2 (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8563397B2 (en) * 2008-07-09 2013-10-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP2010027818A (ja) * 2008-07-18 2010-02-04 Semiconductor Energy Lab Co Ltd 配線基板及びその作製方法、並びに、半導体装置及びその作製方法
JP5216716B2 (ja) * 2008-08-20 2013-06-19 株式会社半導体エネルギー研究所 発光装置及びその作製方法
KR20110084523A (ko) * 2008-11-07 2011-07-25 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
JP5583951B2 (ja) * 2008-11-11 2014-09-03 株式会社半導体エネルギー研究所 半導体装置の作製方法
US8054673B2 (en) * 2009-04-16 2011-11-08 Seagate Technology Llc Three dimensionally stacked non volatile memory units
JP5581106B2 (ja) * 2009-04-27 2014-08-27 株式会社半導体エネルギー研究所 半導体装置の作製方法
KR101893332B1 (ko) * 2009-11-13 2018-08-31 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치의 구동 방법
WO2012002186A1 (en) * 2010-07-02 2012-01-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
FR2977069B1 (fr) * 2011-06-23 2014-02-07 Soitec Silicon On Insulator Procede de fabrication d'une structure semi-conductrice mettant en oeuvre un collage temporaire
JP2013161878A (ja) 2012-02-02 2013-08-19 Renesas Electronics Corp 半導体装置、および半導体装置の製造方法
JP6452413B2 (ja) * 2014-06-09 2019-01-16 日本放送協会 追記型固体メモリ
KR101855846B1 (ko) 2015-12-29 2018-05-09 포항공과대학교 산학협력단 수직적층구조의 3차원 정적램 코어 셀 및 그를 포함하는 정적램 코어 셀 어셈블리
JP6916794B2 (ja) * 2016-08-17 2021-08-11 株式会社半導体エネルギー研究所 表示装置
KR102104981B1 (ko) 2017-12-19 2020-05-29 엘지디스플레이 주식회사 표시 장치
KR102185116B1 (ko) 2017-12-19 2020-12-01 엘지디스플레이 주식회사 표시 장치
CN110731012B (zh) 2019-04-15 2021-01-29 长江存储科技有限责任公司 具有处理器和异构存储器的一体化半导体器件及其形成方法
KR20250099267A (ko) 2019-04-15 2025-07-01 양쯔 메모리 테크놀로지스 씨오., 엘티디. 프로세서 및 동적 랜덤 액세스 메모리를 갖는 본디드 반도체 장치 및 이를 형성하는 방법
KR102639431B1 (ko) 2019-04-15 2024-02-22 양쯔 메모리 테크놀로지스 씨오., 엘티디. 프로세서 및 이종 메모리를 갖는 통합 반도체 디바이스 및 이를 형성하는 방법
JP7311615B2 (ja) * 2019-04-30 2023-07-19 長江存儲科技有限責任公司 プロセッサおよびnandフラッシュメモリを有する接合半導体デバイスならびにそれを形成する方法
CN110720143B (zh) 2019-04-30 2021-01-29 长江存储科技有限责任公司 具有处理器和nand闪存的键合半导体器件及其形成方法
KR102308784B1 (ko) * 2020-02-28 2021-10-01 한양대학교 산학협력단 텔루륨 산화물 및 이를 채널층으로 구비하는 박막트랜지스터
CN116613136A (zh) * 2022-02-09 2023-08-18 群创光电股份有限公司 电子装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0661418A (ja) * 1992-08-07 1994-03-04 Sharp Corp 積層型半導体集積回路
JP3809733B2 (ja) * 1998-02-25 2006-08-16 セイコーエプソン株式会社 薄膜トランジスタの剥離方法
JP4137328B2 (ja) * 1999-12-28 2008-08-20 光正 小柳 3次元半導体集積回路装置の製造方法
JP4554152B2 (ja) * 2002-12-19 2010-09-29 株式会社半導体エネルギー研究所 半導体チップの作製方法
JP4408042B2 (ja) * 2002-12-27 2010-02-03 株式会社半導体エネルギー研究所 半導体装置及びその作製方法

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