JP5227536B2 - 半導体集積回路の作製方法 - Google Patents

半導体集積回路の作製方法 Download PDF

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Publication number
JP5227536B2
JP5227536B2 JP2007113979A JP2007113979A JP5227536B2 JP 5227536 B2 JP5227536 B2 JP 5227536B2 JP 2007113979 A JP2007113979 A JP 2007113979A JP 2007113979 A JP2007113979 A JP 2007113979A JP 5227536 B2 JP5227536 B2 JP 5227536B2
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layer
element formation
substrate
formation layer
semiconductor
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JP2007113979A
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Japanese (ja)
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JP2007318106A (ja
JP2007318106A5 (enExample
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真弓 山口
小波 泉
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Non-Volatile Memory (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Thin Film Transistor (AREA)
  • Electroluminescent Light Sources (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Bipolar Integrated Circuits (AREA)
JP2007113979A 2006-04-28 2007-04-24 半導体集積回路の作製方法 Expired - Fee Related JP5227536B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007113979A JP5227536B2 (ja) 2006-04-28 2007-04-24 半導体集積回路の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006126329 2006-04-28
JP2006126329 2006-04-28
JP2007113979A JP5227536B2 (ja) 2006-04-28 2007-04-24 半導体集積回路の作製方法

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JP2007318106A JP2007318106A (ja) 2007-12-06
JP2007318106A5 JP2007318106A5 (enExample) 2010-04-02
JP5227536B2 true JP5227536B2 (ja) 2013-07-03

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JP2007113979A Expired - Fee Related JP5227536B2 (ja) 2006-04-28 2007-04-24 半導体集積回路の作製方法

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12495654B2 (en) * 2022-02-09 2025-12-09 Innolux Corporation Electronic device

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8563397B2 (en) * 2008-07-09 2013-10-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and manufacturing method thereof
JP2010027818A (ja) * 2008-07-18 2010-02-04 Semiconductor Energy Lab Co Ltd 配線基板及びその作製方法、並びに、半導体装置及びその作製方法
JP5216716B2 (ja) * 2008-08-20 2013-06-19 株式会社半導体エネルギー研究所 発光装置及びその作製方法
WO2010053060A1 (en) 2008-11-07 2010-05-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP5583951B2 (ja) * 2008-11-11 2014-09-03 株式会社半導体エネルギー研究所 半導体装置の作製方法
US8054673B2 (en) * 2009-04-16 2011-11-08 Seagate Technology Llc Three dimensionally stacked non volatile memory units
JP5581106B2 (ja) * 2009-04-27 2014-08-27 株式会社半導体エネルギー研究所 半導体装置の作製方法
CN102612714B (zh) * 2009-11-13 2016-06-29 株式会社半导体能源研究所 半导体器件及其驱动方法
WO2012002186A1 (en) 2010-07-02 2012-01-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
FR2977069B1 (fr) * 2011-06-23 2014-02-07 Soitec Silicon On Insulator Procede de fabrication d'une structure semi-conductrice mettant en oeuvre un collage temporaire
JP2013161878A (ja) 2012-02-02 2013-08-19 Renesas Electronics Corp 半導体装置、および半導体装置の製造方法
JP6452413B2 (ja) * 2014-06-09 2019-01-16 日本放送協会 追記型固体メモリ
KR101855846B1 (ko) * 2015-12-29 2018-05-09 포항공과대학교 산학협력단 수직적층구조의 3차원 정적램 코어 셀 및 그를 포함하는 정적램 코어 셀 어셈블리
US10642110B2 (en) * 2016-08-17 2020-05-05 Semiconductor Energy Laboratory Co., Ltd. Display device and electronic appliance
KR102185116B1 (ko) 2017-12-19 2020-12-01 엘지디스플레이 주식회사 표시 장치
KR102104981B1 (ko) 2017-12-19 2020-05-29 엘지디스플레이 주식회사 표시 장치
CN112614831B (zh) 2019-04-15 2023-08-08 长江存储科技有限责任公司 具有处理器和异构存储器的一体化半导体器件及其形成方法
CN110731012B (zh) 2019-04-15 2021-01-29 长江存储科技有限责任公司 具有处理器和异构存储器的一体化半导体器件及其形成方法
JP7487213B2 (ja) 2019-04-15 2024-05-20 長江存儲科技有限責任公司 プロセッサおよびダイナミック・ランダムアクセス・メモリを有する接合半導体デバイスおよびそれを形成する方法
CN112510031B (zh) * 2019-04-30 2024-10-25 长江存储科技有限责任公司 具有处理器和nand闪存的键合半导体器件及其形成方法
CN110720143B (zh) 2019-04-30 2021-01-29 长江存储科技有限责任公司 具有处理器和nand闪存的键合半导体器件及其形成方法
KR102308784B1 (ko) * 2020-02-28 2021-10-01 한양대학교 산학협력단 텔루륨 산화물 및 이를 채널층으로 구비하는 박막트랜지스터

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0661418A (ja) * 1992-08-07 1994-03-04 Sharp Corp 積層型半導体集積回路
JP3809733B2 (ja) * 1998-02-25 2006-08-16 セイコーエプソン株式会社 薄膜トランジスタの剥離方法
JP4137328B2 (ja) * 1999-12-28 2008-08-20 光正 小柳 ３次元半導体集積回路装置の製造方法
JP4554152B2 (ja) * 2002-12-19 2010-09-29 株式会社半導体エネルギー研究所 半導体チップの作製方法
JP4408042B2 (ja) * 2002-12-27 2010-02-03 株式会社半導体エネルギー研究所 半導体装置及びその作製方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12495654B2 (en) * 2022-02-09 2025-12-09 Innolux Corporation Electronic device

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