CN101771013A - 半导体装置及其制造方法 - Google Patents
半导体装置及其制造方法 Download PDFInfo
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- CN101771013A CN101771013A CN200910262202A CN200910262202A CN101771013A CN 101771013 A CN101771013 A CN 101771013A CN 200910262202 A CN200910262202 A CN 200910262202A CN 200910262202 A CN200910262202 A CN 200910262202A CN 101771013 A CN101771013 A CN 101771013A
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- copper wiring
- plating layer
- semiconductor device
- wire
- film
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Abstract
一种半导体装置,其在铜配线上把铜引线进行引线接合而构成,抑制配线脱落和在铜引线下的绝缘膜出现裂纹的不好情况。本发明的半导体装置具备:在半导体基板(1)上形成的铜配线(8)、把所述铜配线(8)的表面和侧面覆盖地形成的镀敷层(10)、经由所述镀敷层(10)在所述铜配线(8)上进行引线接合的铜引线(22)。
Description
技术领域
本发明涉及半导体装置及其制造方法,特别是涉及在铜配线上形成铜引线的技术。
背景技术
一边参照附图一边说明现有的半导体装置。
在图5和图6中,11例如是由硅基板构成的半导体基板,12是在所述半导体基板11上形成的层间绝缘膜,在该层间绝缘膜12内形成有与器件元件连接的下层配线部13。
14是与所述下层配线部13连接的上层配线,把该上层配线14覆盖地形成有绝缘膜15。
且在所述绝缘膜15形成有用于使所述上层配线14的一部分露出的接触孔16,在包括该接触孔16内的绝缘膜15上经由势垒金属膜17而形成有铜配线18。
在此如图5所示,所述铜配线18是在所述绝缘膜15上形成所述势垒金属膜17,并把抗蚀剂膜19作为掩模而利用镀敷法在该势垒金属膜17上形成所述铜配线18。且把所述抗蚀剂膜19作为掩模在所述铜配线18上形成镀敷层20。所述镀敷层20是Ni/Pd的层合膜。
且如图6所示,把所述抗蚀剂膜19除去,经由所述镀敷层20在所述铜配线18上形成金引线21。
作为该技术文献例如能够举出以下的文献。
非专利文献:2001年大阪国际专题研讨会关于功率半导体器件和ICs的文件汇编“芯片上引线框架提供集成功率总线和有源电路接合”第65-68页(Proceedings of 2001 International Symposium on PowerSemiconductor Device & ICs OSAKA“Lead Frame On Chipoffers Integrated Power Bus and Bond over Active Circuit”pp65-68)。
近年来,希望实现代替上述的金引线而使用低成本材料铜引线的半导体装置。
但在上述半导体装置结构中,仅是把金引线置换成铜引线就不能够解决在半导体装置的可靠性的问题。
即,在铜配线上形成铜引线时,由于铜自身是比较硬的材料(铜比金硬三倍左右),所以在引线接合时为了不发生接合不良就需要比金球时大的超声波和负载。因此,在发明者进行的实验中判明:即使消除了接合不良,也产生配线脱落和在铜引线下形成的绝缘膜出现裂纹的不好情况。
发明内容
本发明的目的在于提供一种解决上述课题的半导体装置及其制造方法。
本发明是鉴于上述课题而开发的,其主要特点如下。
即本发明的半导体装置具备:在半导体基板上形成的铜配线、把所述铜配线的表面和侧面覆盖地形成的镀敷层、经由所述镀敷层在所述铜配线上进行引线接合的铜引线。
所述镀敷层由Ni/Pd/Au的层合膜构成。
在所述铜配线下形成有由Ti/Cu种子层的层合膜构成的势垒金属膜。
本发明半导体装置的制造方法具备:把在半导体基板上形成的抗蚀剂膜作为掩模而在没有形成该抗蚀剂膜的区域金线镀敷形成铜配线的工序、把所述抗蚀剂膜除去后而把所述铜配线的表面和侧面覆盖地形成铜配线的工序、经由所述镀敷层在所述铜配线上把铜引线进行引线接合的工序。
本发明半导体装置的制造方法具备:在半导体基板上形成的势垒金属膜上形成抗蚀剂膜的工序、把所述抗蚀剂膜作为掩模而在没有形成该抗蚀剂膜的区域进行镀敷形成铜配线的工序、在把所述抗蚀剂膜除去后把所述铜配线作为掩模来把没有形成该铜配线区域的所述势垒金属膜除去的工序、覆盖所述铜配线的表面和侧面地形成铜配线的工序、经由所述镀敷层在所述铜配线上把铜引线进行引线接合的工序。
形成所述镀敷层的工序是把Ni/Pd/Au顺次层合的工序。
如上述的本发明中,通过把铜配线的表面和侧面由镀敷层覆盖而能够抑止即使在所述铜配线上把铜引线进行了引线接合也产生配线脱落和在铜引线下形成的绝缘膜出现裂纹的不好情况。
附图说明
图1是表示本发明一实施例半导体装置制造方法的剖视图;
图2是表示本发明一实施例半导体装置制造方法的剖视图;
图3是表示本发明一实施例半导体装置制造方法的剖视图;
图4(A)、(B)是表示本发明一实施例半导体装置制造方法的剖视图;
图5是表示现有技术半导体装置制造方法的剖视图;
图6是表示现有技术半导体装置制造方法的剖视图。
符号说明
1半导体基板 5绝缘膜 7势垒金属膜 8铜配线
9抗蚀剂膜 10镀敷层 22铜引线 23挖去部(エグレ)
具体实施方式
下面,一边参照附图一边说明本发明的一实施例。
在图1至图3中,1例如是由硅基板构成的半导体基板,2是在所述半导体基板1上形成的层间绝缘膜,在该层间绝缘膜2内形成有与器件元件连接的下层配线部3。器件元件可以是BIT晶体管,也可以是MOS晶体管结构,能够适用于任意的晶体管结构。
4是与所述下层配线部3连接的上层配线,把该上层配线4覆盖地形成有绝缘膜5。所述下层配线部3和上层配线4例如是由Al合金等构成的金属膜结构。所述绝缘膜5的材质例如可以是单层硅氧化膜,还可以是硅氧化膜与硅氮化膜层合的结构,也可以是其他材质的结构。
且在所述绝缘膜5形成有用于使所述上层配线4的一部分露出的接触孔6,在包括该接触孔6内的绝缘膜5上经由势垒金属膜7而形成有铜配线8。所述势垒金属膜7是把Ti/Cu种子层分别溅射而形成。在此,所述Ti/Cu种子层各自的膜厚度例如是Ti膜是500埃、Cu种子层是3000埃。
如图1所示,所述铜配线8是把所述势垒金属膜7上形成的抗蚀剂膜9作为掩模并利用电镀法而形成在该势垒金属膜7上。
接着如图10所示,在把所述抗蚀剂膜9除去后把所述铜配线8作为掩模来除去所述势垒金属膜7。本实施例中,由于把势垒金属膜7除去,所以首先使用过氧化氢溶液与硝酸的混合液来除去Cu种子层,接着使用过氧化氢溶液与氨的混合液来除去Ti膜。
接着如图3所示,在所述铜配线8的表面和侧面(即铜配线8的所有露出面)形成镀敷层10。所述镀敷层10例如具有把由Ni/Pd/Au构成的膜利用非电解镀敷法顺次形成而成的层合结构。在此,所述Ni/Pd/Au各自的膜厚度例如是Ni膜是3μm、Pd膜是0.2μm、Au膜是0.02μm。
铜引线22经由所述镀敷层10并利用引线接合而被接合在铜配线8上,从而完成半导体装置。
在此,由于构成镀敷层10的Pd膜抗腐蚀强,所以不需要在镀敷层10上形成保护膜。也可以在镀敷层10形成保护膜,且通过作为绝缘膜5的材质而适用耐湿性优良的材质,从而也能够省略向镀敷层10上形成保护膜。
在使用以上结构的本发明半导体装置的实验中,即使把铜引线22在铜配线8上进行引线接合,也没有看到发生配线脱落和在铜引线22下形成的绝缘膜5出现裂纹的不好情况。
根据本发明结构,关于进行引线接合后能够抑制发生配线脱落和在铜引线22下的绝缘膜5出现裂纹的不好情况的主要原因在现在还不能充分分析,但发明者作了如下考察。
即,考察到:现有结构由于仅在铜配线18的表面来构成镀敷层20,所以在铜引线21下局部地产生机械破坏损伤,对此,本发明的结构通过把铜配线7的侧面用比铜硬的Ni膜覆盖,从而能够把铜引线22的负载由铜配线7(接合焊盘部)下的面均匀承受(负载分散),这样不正是能够抑制上述不好情况的产生吗。
例如考察到:在形成上述镀敷层10时,在把势垒金属膜7除去时由于为了防止铜配线8之间的短路而进行了过腐蚀,所以如图4(A)所示在铜配线8的下部形成有挖去部23。但如图4(B)所示,由于在包括挖去部23的铜配线8的表面和侧面(即铜配线8的所有露出面)形成有镀敷层10,所以引线接合对于机械负载也增加了耐性。对此,现有结构也与本发明同样地在铜配线18的下部形成有挖去部,但该挖去部没被镀敷层20覆盖,所以如图6所示仅在铜配线18的表面形成有镀敷层20,因此,认为引线接合对于机械负载的耐性低。
而且作为现有结构中铜引线21接合不良的主要原因考察到:难道不是在图6所示的除去势垒金属膜17的工序中由于药液而把镀敷层20的表面污染的缘故吗。即当镀敷层20的表面有药液引起的损伤和污染附着物时,在进行引线接合时在与镀敷层20或铜引线21之间就不能进行充分的共晶反应,对接合特性有恶劣影响。对此,本发明如图2所示,在利用药液把所述势垒金属膜7除去后,由于把铜配线8完全覆盖地来形成镀敷层10,所以镀敷层10不会被药液污染,对接合特性没有影响。
上述实施例是一例,绝缘膜5和镀敷层10的材质和膜厚度能够任意变更。
Claims (7)
1.一种半导体装置,其特征在于,具备:
在半导体基板上形成的铜配线、
把所述铜配线的表面和侧面覆盖地形成的镀敷层、
经由所述镀敷层在所述铜配线上进行引线接合的铜引线。
2.如权利要求1所述的半导体装置,其特征在于,所述镀敷层由Ni/Pd/Au的层合膜构成。
3.如权利要求1或权利要求2所述的半导体装置,其特征在于,在所述铜配线下形成有由Ti/Cu种子层的层合膜构成的势垒金属膜。
4.一种半导体装置的制造方法,其特征在于,具备:
把在半导体基板上形成的抗蚀剂膜作为掩模而在没有形成该抗蚀剂膜的区域镀敷形成铜配线的工序、
在把所述抗蚀剂膜除去后把所述铜配线的表面和侧面覆盖地形成镀敷层的工序、
经由所述镀敷层在所述铜配线上把铜引线进行引线接合的工序。
5.一种半导体装置的制造方法,其特征在于,具备:
在半导体基板上形成的势垒金属膜上形成抗蚀剂膜的工序、
把所述抗蚀剂膜作为掩模而在没有形成该抗蚀剂膜的区域进行镀敷形成铜配线的工序、
在把所述抗蚀剂膜除去后把所述铜配线作为掩模来把没有形成有该铜配线区域的所述势垒金属膜除去的工序、
把所述铜配线的表面和侧面覆盖地形成镀敷层的工序、
经由所述镀敷层在所述铜配线上把铜引线进行引线接合的工序。
6.如权利要求4或权利要求5所述的半导体装置的制造方法,其特征在于,形成所述镀敷层的工序是把Ni/Pd/Au顺次层合的工序。
7.如权利要求5或权利要求6所述的半导体装置的制造方法,其特征在于,所述势垒金属膜由Ti/Cu种子层的层合膜构成。
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