JP2007081079A - 半導体ic内蔵モジュール - Google Patents
半導体ic内蔵モジュール Download PDFInfo
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- JP2007081079A JP2007081079A JP2005266345A JP2005266345A JP2007081079A JP 2007081079 A JP2007081079 A JP 2007081079A JP 2005266345 A JP2005266345 A JP 2005266345A JP 2005266345 A JP2005266345 A JP 2005266345A JP 2007081079 A JP2007081079 A JP 2007081079A
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Abstract
【解決手段】 半導体IC内蔵モジュール100は、第1及び第2の絶縁層101a,101bを有する多層基板101と、多層基板101内に埋め込まれたコントローラIC102及びメモリIC103とを備えており、多層基板101の内層には配線層104が設けられている。配線層104の一部はバスライン104Xを構成しており、コントローラIC102とメモリIC103との間はバスライン104Xで接続されている。コントローラIC102やメモリIC103は第2の絶縁層101bに埋め込まれている。第1及び第2の絶縁層101a,101bの表層にはそれぞれ第1及び第2のグランド層105a、105bが設けられている。
【選択図】 図1
Description
101 多層基板
101a 第1の絶縁層
101b 第2の絶縁層
101c 第3の絶縁層
102 コントローラIC
103 メモリIC
104 配線層
104a 第1の配線層
104b 第2の配線層
104X バスライン
105a グランド層
105b グランド層
106 バスラインを構成する信号ラインの一部
107 ビアホール電極
200 半導体IC内蔵モジュール
300 半導体IC内蔵モジュール
301 磁性層
302 ダンピング抵抗
303 ビーズ
400 半導体IC内蔵モジュール
401 チップ部品
401a チップ部品の電極
401b チップ部品の電極
402 ランドパターン
403 ビアホール電極
500 半導体IC内蔵モジュール
501 電源層
502 バイパスコンデンサ
503 ビアホール電極
600 半導体IC内蔵モジュール
601 アナログ回路
602 アナログ信号ライン
603 ビアホール電極
700 半導体IC内蔵モジュール
701a 第3のグランド層
701b 第4のグランド層
Claims (15)
- 複数の絶縁層が積層された多層基板と、互いに横並びに配置されるように前記多層基板内に埋め込まれた第1及び第2の半導体ICチップと、前記第1及び第2の半導体チップ間を接続するバスラインと、前記バスラインの上方及び下方を覆う第1及び第2の導電層とを備えていることを特徴とする半導体IC内蔵モジュール。
- 前記多層基板は、第1及び第2の絶縁層と、前記第1及び第2の絶縁層間に設けられた第1の配線層とを含み、前記バスラインは前記第1の配線層に設けられている請求項1に記載の半導体IC内蔵モジュール。
- 前記第1及び第2の半導体ICチップはともに前記第1又は第2の絶縁層いずれか一方に埋め込まれている請求項2に記載の半導体IC内蔵モジュール。
- 前記第1の導電層は、前記第1の絶縁層の前記第2の絶縁層とは反対側の表面に設けられており、前記第2の導電層は、前記第2の絶縁層の前記第1の絶縁層とは反対側の表面に設けられている請求項2又は3に記載の半導体IC内蔵モジュール。
- 前記第1及び第2の導電層がともにグランド層である請求項1乃至4のいずれか1項に記載の1に記載の半導体IC内蔵モジュール。
- 前記第1及び第2の導電層のいずれか一方が電源層であり、他方がグランド層であり、前記電源層とグランド層との間にバイパスコンデンサが設けられている請求項1乃至4のいずれか1項に記載の半導体IC内蔵モジュール。
- 前記バスラインに接続される受動素子のチップ部品が前記第1又は第2の導電層上に搭載されている請求項1乃至6のいずれか1項に記載の半導体IC内蔵モジュール。
- 前記第1及び第2の半導体ICチップのいずれか一方がコントローラICであり、他方がメモリICである請求項1乃至7のいずれか1項に記載の半導体IC内蔵モジュール。
- 前記第1又は第2の絶縁層の少なくとも一方が強磁性材料を含んで構成されている請求項1乃至8のいずれか1項に記載の半導体IC内蔵モジュール。
- 前記第1及び第2の半導体ICチップと前記バスラインとが導電性突起物を介して実質的に直接接続されていることを特徴とする請求項1乃至9のいずれか1項に記載の半導体IC内蔵モジュール。
- 前記バスラインを構成するすべての信号ラインが前記第1の配線層に設けられていることを特徴とする請求項1乃至10のいずれか1項に記載の半導体IC内蔵モジュール。
- 前記バスラインを構成する信号ラインの一部であって、少なくとも他の信号ラインと交差する部分が、前記第1の配線層とは異なる第2の配線層に設けられていることを特徴とする請求項1乃至11のいずれか1項に記載の半導体IC内蔵モジュール。
- 少なくとも前記バスラインの周囲に、前記第1及び第2の導電層間を接続するビアホール電極が複数配列されていることを特徴とする請求項1乃至12のいずれか1項に記載の半導体IC内蔵モジュール。
- 前記ビアホール電極は、前記バスラインとアナログ領域との間に配列されていることを特徴とする請求項13に記載の半導体IC内蔵モジュール。
- 前記多層基板内に設けられたアナログ領域と、前記第1の導電層と同一層内に設けられ、前記アナログ領域の上方を覆う第3の導電層と、前記第2の導電層と同一層内に設けられ、前記アナログ領域の下方を覆う第4の導電層とをさらに備え、前記第1及び第2の導電層と前記第3及び第4の導電層とが分離して形成されていることを特徴とする請求項1乃至14に記載の半導体IC内蔵モジュール。
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KR1020060089277A KR101227750B1 (ko) | 2005-09-14 | 2006-09-14 | 반도체 ic 내장 모듈 |
CNB2006101538661A CN100561734C (zh) | 2005-09-14 | 2006-09-14 | 半导体ic内设模块 |
TW095133995A TW200746384A (en) | 2005-09-14 | 2006-09-14 | Semiconductor IC-embedded module |
US11/521,156 US7812444B2 (en) | 2005-09-14 | 2006-09-14 | Semiconductor IC-embedded module with multilayer substrates with multiple chips embedded therein |
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DE102011089415A1 (de) * | 2011-12-21 | 2013-06-27 | Siemens Aktiengesellschaft | Schaltungsträger mit einem Leitpfad und einer elektrischen Schirmung und Verfahren zu dessen Herstellung |
CN103327726A (zh) * | 2012-03-19 | 2013-09-25 | 鸿富锦精密工业(深圳)有限公司 | 电子装置及其印刷电路板的布局结构 |
WO2014202282A1 (de) * | 2013-06-20 | 2014-12-24 | Conti Temic Microelectronic Gmbh | Leiterplatte |
JP6665759B2 (ja) * | 2016-11-10 | 2020-03-13 | 三菱電機株式会社 | 高周波回路 |
US11277917B2 (en) | 2019-03-12 | 2022-03-15 | Advanced Semiconductor Engineering, Inc. | Embedded component package structure, embedded type panel substrate and manufacturing method thereof |
US11296030B2 (en) | 2019-04-29 | 2022-04-05 | Advanced Semiconductor Engineering, Inc. | Embedded component package structure and manufacturing method thereof |
US10950551B2 (en) | 2019-04-29 | 2021-03-16 | Advanced Semiconductor Engineering, Inc. | Embedded component package structure and manufacturing method thereof |
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US20070057366A1 (en) | 2007-03-15 |
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