JP2007027579A - 中継基板及び当該中継基板を備えた半導体装置 - Google Patents
中継基板及び当該中継基板を備えた半導体装置 Download PDFInfo
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- JP2007027579A JP2007027579A JP2005210390A JP2005210390A JP2007027579A JP 2007027579 A JP2007027579 A JP 2007027579A JP 2005210390 A JP2005210390 A JP 2005210390A JP 2005210390 A JP2005210390 A JP 2005210390A JP 2007027579 A JP2007027579 A JP 2007027579A
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Abstract
【解決手段】 第1の半導体チップ11と第2の半導体チップ18と中継基板40とをパッケージ化した半導体装置110において、第1の半導体チップ11の上に中継基板40が配置され、中継基板40の上に第2の半導体チップ18が配置される。中継基板40には、少なくとも3個のボンディングパッド45が設けられた配線41が複数設けられている。
【選択図】 図11
Description
本発明のターミナルチップは、半導体装置に設けられ、当該半導体装置に実装される半導体チップの中継基板として機能する。
次に、上述のターミナルチップを搭載した半導体装置の実施形態について説明する。
(付記1) 複数の半導体チップ同士を配線するためのワイヤ又は前記複数の半導体チップを収容する半導体パッケージのリードフレームと前記半導体チップとを配線するためのワイヤを中継し、前記半導体パッケージに設けられる中継基板であって、
少なくとも3個のボンディングパッドが設けられた配線を複数備えたことを特徴とする中継基板。
(付記2) 前記複数の配線のうち少なくとも一部の配線は、該中継基板の主面に同心状に設けられていることを特徴とする付記1記載の中継基板。
(付記3) 該中継基板の主面に同心状に設けられた前記配線のうち少なくとも一部の配線は、該中継基板の主面に一部が開いたオープンループ状に設けられていることを特徴とする付記2記載の中継基板。
(付記4) 前記複数の配線のうち少なくとも一部の配線は、該中継基板の主面に互いに略平行に設けられていることを特徴とする付記1記載の中継基板。
(付記5) 前記複数の配線のうち少なくとも一部の配線は、当該配線の一部が該中継基板の主面に所定の角度折曲して設けられていることを特徴とする付記1記載の中継基板。
(付記6) 前記複数の配線において、一の配線におけるボンディングパッドと隣り合う他の配線におけるボンディングパッドは、当該配線の設けられている方向に所定の長さずらして設けられていることを特徴とする付記1乃至5記載の中継基板。
(付記7) 当該中継基板は複数の層を備え、
前記複数の配線のうち少なくとも一部の配線は、他の配線が設けられている層とは異なる層に設けられていることを特徴とする付記1乃至6記載の中継基板。
(付記8) 前記中継基板は、単一の層を備え、
前記複数の配線は、前記単一の層に設けられていることを特徴とする付記1乃至6記載の中継基板。
(付記9) 当該中継基板の材質は、シリコン、セラミック、ベークライト、ガラスエポキシ、ポリイミドフィルム、及びポリエチレンテレフタレートフィルムからなる群から選択されることを特徴とする付記1乃至8記載の中継基板。
(付記10) 第1の半導体チップと第2の半導体チップと中継基板とをパッケージ化した半導体装置であって、
前記第1の半導体チップの上に前記中継基板が配置され、
前記中継基板の上に前記第2の半導体チップが配置され、
前記中継基板は、付記1乃至3いずれか一項記載の中継基板であることを特徴とする半導体装置。
(付記11) 第1の半導体チップと第2の半導体チップと中継基板とをパッケージ化した半導体装置であって、
前記中継基板の上に前記第1の半導体チップが配置され、
前記第1の半導体チップの上に前記第2の半導体チップが配置され、
前記中継基板は、付記1乃至3いずれか一項記載の中継基板であることを特徴とする半導体装置。
(付記12) 第1の半導体チップと第2の半導体チップと中継基板とをパッケージ化した半導体装置であって、
前記中継基板の上に前記第1の半導体チップと前記第2の半導体チップが並べられて配置され、
前記中継基板は、付記1乃至3いずれか一項記載の中継基板であることを特徴とする半導体装置。
(付記13) 第1の半導体チップと第2の半導体チップと中継基板とをパッケージ化した半導体装置であって、
前記第1の半導体チップの上に前記中継基板と前記第2の半導体チップが並べられて配置され、
前記中継基板は、付記1、4又は5いずれか一項記載の中継基板であることを特徴とする半導体装置。
(付記14) 前記中継基板は前記第1の半導体チップの上に複数配置されていることを特徴とする付記13記載の半導体装置。
(付記15) 複数の半導体チップを収容してパッケージ化した半導体装置であって、
前記複数の半導体チップ同士を配線するためのワイヤ又は前記複数の半導体チップを収容する半導体パッケージのリードフレームと前記半導体チップとを配線するためのワイヤを中継する中継基板を備え、
前記中継基板は、少なくとも3個のボンディングパッドが設けられた配線を複数備えたことを特徴とする半導体装置。
(付記16) 前記中継基板の前記複数の配線において、一の配線におけるボンディングパッドと隣り合う他の配線におけるボンディングパッドは、当該配線の設けられている方向に所定の長さずらして設けられていることを特徴とする付記15記載の半導体装置。
(付記17) 前記中継基板は複数の層を備え、
前記中継基板の前記複数の配線のうち少なくとも一部の配線は、他の配線が設けられている層とは異なる層に設けられていることを特徴とする付記15又は16記載の半導体装置。
(付記18) 前記中継基板は、単一の層を備え、
前記中継基板の前記複数の配線は、前記単一の層に設けられていることを特徴とする付記15又は16記載の半導体装置。
(付記19) 前記中継基板の材質は、シリコン、セラミック、ベークライト、ガラスエポキシ、ポリイミドフィルム、及びポリエチレンテレフタレートフィルムからなる群から選択されることを特徴とする付記15乃至18いずれか一項の半導体装置。
110、120、130、140、150 半導体装置
11、211、311 第1の半導体チップ
12 第2の半導体チップのボンディングパッド
111、112、113、117、171、172、173 ボンディングワイヤ
18、218、318 第2の半導体チップ
19 リードフレームのボンディングパッド
40、60、70、80、90、100 ターミナルチップ
45、65、75、85、95、105 ターミナルチップのボンディングパッド
41、61、71、81、91、101 金属配線
Claims (10)
- 複数の半導体チップ同士を配線するためのワイヤ又は前記複数の半導体チップを収容する半導体パッケージのリードフレームと前記半導体チップとを配線するためのワイヤを中継し、前記半導体パッケージに設けられる中継基板であって、
少なくとも3個のボンディングパッドが設けられた配線を複数備えたことを特徴とする中継基板。 - 前記複数の配線のうち少なくとも一部の配線は、該中継基板の主面に同心状に設けられていることを特徴とする請求項1記載の中継基板。
- 該中継基板の主面に同心状に設けられた前記配線のうち少なくとも一部の配線は、該中継基板の主面に一部が開いたオープンループ状に設けられていることを特徴とする請求項2記載の中継基板。
- 前記複数の配線のうち少なくとも一部の配線は、該中継基板の主面に互いに略平行に設けられていることを特徴とする請求項1記載の中継基板。
- 前記複数の配線のうち少なくとも一部の配線は、当該配線の一部が該中継基板の主面に所定の角度折曲されて設けられていることを特徴とする請求項1記載の中継基板。
- 前記複数の配線において、一の配線におけるボンディングパッドと隣り合う他の配線におけるボンディングパッドは、当該配線の設けられている方向に所定の長さずらして設けられていることを特徴とする請求項1乃至5記載の中継基板。
- 第1の半導体チップと第2の半導体チップと中継基板とをパッケージ化した半導体装置であって、
前記第1の半導体チップの上に前記中継基板が配置され、
前記中継基板の上に前記第2の半導体チップが配置され、
前記中継基板は、請求項1乃至3いずれか一項記載の中継基板であることを特徴とする半導体装置。 - 第1の半導体チップと第2の半導体チップと中継基板とをパッケージ化した半導体装置であって、
前記第1の半導体チップの上に前記中継基板と前記第2の半導体チップが並べられて配置され、
前記中継基板は、請求項1、4又は5いずれか一項記載の中継基板であることを特徴とする半導体装置。 - 前記中継基板は前記第1の半導体チップの上に複数配置されていることを特徴とする請求項8記載の半導体装置。
- 複数の半導体チップを収容してパッケージ化した半導体装置であって、
前記複数の半導体チップ同士を配線するためのワイヤ又は前記複数の半導体チップを収容する半導体パッケージのリードフレームと前記半導体チップとを配線するためのワイヤを中継する中継基板を備え、
前記中継基板は、少なくとも3個のボンディングパッドが設けられた配線を複数備えたことを特徴とする半導体装置。
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JP2005210390A JP4703300B2 (ja) | 2005-07-20 | 2005-07-20 | 中継基板及び当該中継基板を備えた半導体装置 |
US11/234,388 US7608925B2 (en) | 2005-07-20 | 2005-09-26 | Relay board with bonding pads connected by wirings |
TW094133351A TWI271830B (en) | 2005-07-20 | 2005-09-26 | Relay board and semiconductor device having the relay board |
KR1020050094315A KR100773842B1 (ko) | 2005-07-20 | 2005-10-07 | 중계 기판 및 이 중계 기판을 구비한 반도체 장치 |
CN2005101136368A CN1901178B (zh) | 2005-07-20 | 2005-10-11 | 继电板及具有继电板的半导体器件 |
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JP2009188328A (ja) * | 2008-02-08 | 2009-08-20 | Renesas Technology Corp | 半導体装置 |
JP2009239005A (ja) * | 2008-03-27 | 2009-10-15 | Toshiba Memory Systems Co Ltd | 半導体装置およびそれに用いる複合リードフレーム |
US8093726B2 (en) | 2007-10-02 | 2012-01-10 | Samsung Electronics Co., Ltd. | Semiconductor packages having interposers, electronic products employing the same, and methods of manufacturing the same |
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US8735735B2 (en) * | 2010-07-23 | 2014-05-27 | Ge Embedded Electronics Oy | Electronic module with embedded jumper conductor |
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JP2012222326A (ja) * | 2011-04-14 | 2012-11-12 | Elpida Memory Inc | 半導体装置 |
KR20130028352A (ko) * | 2011-09-09 | 2013-03-19 | 박병규 | 반도체 패키지 및 반도체 패키지 방법 |
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Also Published As
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US20070018339A1 (en) | 2007-01-25 |
TW200705620A (en) | 2007-02-01 |
KR20070011037A (ko) | 2007-01-24 |
US7608925B2 (en) | 2009-10-27 |
CN1901178A (zh) | 2007-01-24 |
JP4703300B2 (ja) | 2011-06-15 |
CN1901178B (zh) | 2010-05-05 |
KR100773842B1 (ko) | 2007-11-06 |
TWI271830B (en) | 2007-01-21 |
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