JP2006524436A5 - - Google Patents

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Publication number
JP2006524436A5
JP2006524436A5 JP2006513086A JP2006513086A JP2006524436A5 JP 2006524436 A5 JP2006524436 A5 JP 2006524436A5 JP 2006513086 A JP2006513086 A JP 2006513086A JP 2006513086 A JP2006513086 A JP 2006513086A JP 2006524436 A5 JP2006524436 A5 JP 2006524436A5
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JP
Japan
Prior art keywords
layer
dielectric
dielectric layer
cover
growing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Application number
JP2006513086A
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English (en)
Japanese (ja)
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JP4815344B2 (ja
JP2006524436A (ja
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Publication date
Priority claimed from US10/421,096 external-priority patent/US6881351B2/en
Application filed filed Critical
Publication of JP2006524436A publication Critical patent/JP2006524436A/ja
Publication of JP2006524436A5 publication Critical patent/JP2006524436A5/ja
Application granted granted Critical
Publication of JP4815344B2 publication Critical patent/JP4815344B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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JP2006513086A 2003-04-22 2004-04-16 Ｍｒａｍデバイスの磁気エレクトロニクス素子を覆う導電層への接触方法 Expired - Lifetime JP4815344B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/421,096 2003-04-22
US10/421,096 US6881351B2 (en) 2003-04-22 2003-04-22 Methods for contacting conducting layers overlying magnetoelectronic elements of MRAM devices
PCT/US2004/011872 WO2004095515A2 (en) 2003-04-22 2004-04-16 Methods for contracting conducting layers overlying magnetoelectronic elements of mram devices

Publications (3)

Publication Number Publication Date
JP2006524436A JP2006524436A (ja) 2006-10-26
JP2006524436A5 true JP2006524436A5 (enExample) 2007-06-07
JP4815344B2 JP4815344B2 (ja) 2011-11-16

Family

ID=33298612

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006513086A Expired - Lifetime JP4815344B2 (ja) 2003-04-22 2004-04-16 Ｍｒａｍデバイスの磁気エレクトロニクス素子を覆う導電層への接触方法

Country Status (6)

Country Link
US (2) US6881351B2 (enExample)
JP (1) JP4815344B2 (enExample)
KR (1) KR101036703B1 (enExample)
CN (1) CN1777955B (enExample)
TW (1) TWI340771B (enExample)
WO (1) WO2004095515A2 (enExample)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050014342A1 (en) * 2003-07-18 2005-01-20 International Business Machines Corporation Small, scalable resistive element and method of manufacturing
US7611911B2 (en) * 2003-10-08 2009-11-03 International Business Machines Corporation Method and system for patterning of magnetic thin films using gaseous transformation to transform a magnetic portion to a non-magnetic portion
US6969895B2 (en) * 2003-12-10 2005-11-29 Headway Technologies, Inc. MRAM cell with flat topography and controlled bit line to free layer distance and method of manufacture
US7183893B2 (en) * 2004-02-04 2007-02-27 Seagate Technology Llc TMR sensor with oxidized alloy barrier layer and method for forming the same
US7074713B2 (en) * 2004-09-30 2006-07-11 Freescale Semiconductor, Inc. Plasma enhanced nitride layer
KR100698287B1 (ko) * 2005-01-31 2007-03-22 삼성전자주식회사 박막벌크음향공진기 및 그 제조 방법
US7172908B2 (en) * 2005-02-15 2007-02-06 Taiwan Semiconductor Manufacturing Company, Ltd. Magnetic memory cells and manufacturing methods
US7241632B2 (en) * 2005-04-14 2007-07-10 Headway Technologies, Inc. MTJ read head with sidewall spacers
US7399646B2 (en) * 2005-08-23 2008-07-15 International Business Machines Corporation Magnetic devices and techniques for formation thereof
US20070054450A1 (en) 2005-09-07 2007-03-08 Magic Technologies, Inc. Structure and fabrication of an MRAM cell
US20070086122A1 (en) * 2005-10-19 2007-04-19 Hitachi Global Storage Technologies CPP magnetoresistive sensor having a reduced, shield defined track width
US7880249B2 (en) 2005-11-30 2011-02-01 Magic Technologies, Inc. Spacer structure in MRAM cell and method of its fabrication
US7345911B2 (en) * 2006-02-14 2008-03-18 Magic Technologies, Inc. Multi-state thermally assisted storage
KR100723420B1 (ko) * 2006-02-20 2007-05-30 삼성전자주식회사 비정질 합금 산화층을 포함하는 비휘발성 메모리 소자
CN100511431C (zh) * 2006-02-22 2009-07-08 Tdk股份有限公司 磁记录介质的制造方法
US8542524B2 (en) * 2007-02-12 2013-09-24 Avalanche Technology, Inc. Magnetic random access memory (MRAM) manufacturing process for a small magnetic tunnel junction (MTJ) design with a low programming current requirement
US7833806B2 (en) * 2009-01-30 2010-11-16 Everspin Technologies, Inc. Structure and method for fabricating cladded conductive lines in magnetic memories
US9368716B2 (en) * 2009-02-02 2016-06-14 Qualcomm Incorporated Magnetic tunnel junction (MTJ) storage element and spin transfer torque magnetoresistive random access memory (STT-MRAM) cells having an MTJ
KR20100109221A (ko) * 2009-03-31 2010-10-08 삼성전자주식회사 비휘발성 메모리 소자의 형성방법
US8590139B2 (en) * 2009-05-18 2013-11-26 Imec Patterning of and contacting magnetic layers
EP2299593A1 (en) * 2009-09-18 2011-03-23 Nxp B.V. Laterally coupled bulk acoustic wave device
JP2012156167A (ja) * 2011-01-21 2012-08-16 Toshiba Corp 磁気ランダムアクセスメモリ及びその製造方法
KR101617113B1 (ko) * 2011-12-20 2016-04-29 인텔 코포레이션 자기 메모리 소자 콘택의 크기 감소 및 중심 배치 방법
CN104659201B (zh) * 2013-11-22 2018-07-20 中芯国际集成电路制造(上海)有限公司 一种磁阻内存单元的制造方法
KR102369523B1 (ko) 2015-09-08 2022-03-03 삼성전자주식회사 자기 저항 메모리 장치 및 그 제조 방법
US9929087B2 (en) * 2015-11-16 2018-03-27 Taiwan Semiconductor Manufacturing Co., Ltd Enhancing integrated circuit density with active atomic reservoir
CN105655481A (zh) * 2015-12-24 2016-06-08 上海磁宇信息科技有限公司 超密型交叉矩阵列式磁性随机存储器制造工艺
CN109216541B (zh) * 2017-06-30 2022-05-17 中电海康集团有限公司 Mram与其的制作方法
US10720487B2 (en) 2018-06-28 2020-07-21 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of semiconductor device with magnetic element

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5999370A (ja) * 1982-11-30 1984-06-08 Copal Co Ltd 磁気抵抗素子を具える磁気検出器の製造方法
US6165803A (en) * 1999-05-17 2000-12-26 Motorola, Inc. Magnetic random access memory and fabricating method thereof
US6440753B1 (en) * 2001-01-24 2002-08-27 Infineon Technologies North America Corp. Metal hard mask for ILD RIE processing of semiconductor memory devices to prevent oxidation of conductive lines
JP2003069112A (ja) * 2001-08-28 2003-03-07 Nec Corp 強磁性トンネル接合素子の製造方法
JP2003258129A (ja) * 2002-03-01 2003-09-12 Seiko Epson Corp 不揮発性記憶装置の製造方法
US6783995B2 (en) * 2002-04-30 2004-08-31 Micron Technology, Inc. Protective layers for MRAM devices
US6734079B2 (en) * 2002-06-13 2004-05-11 Taiwan Semiconductor Manufacturing Co., Ltd Microelectronic fabrication having sidewall passivated microelectronic capacitor structure fabricated therein
US6806096B1 (en) * 2003-06-18 2004-10-19 Infineon Technologies Ag Integration scheme for avoiding plasma damage in MRAM technology

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