JP2006513572A5 - - Google Patents
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- JP2006513572A5 JP2006513572A5 JP2004566580A JP2004566580A JP2006513572A5 JP 2006513572 A5 JP2006513572 A5 JP 2006513572A5 JP 2004566580 A JP2004566580 A JP 2004566580A JP 2004566580 A JP2004566580 A JP 2004566580A JP 2006513572 A5 JP2006513572 A5 JP 2006513572A5
- Authority
- JP
- Japan
- Prior art keywords
- layer structure
- epitaxial layer
- iii
- emosfet
- semiconductor substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 claims 8
- 150000001875 compounds Chemical class 0.000 claims 6
- 239000000758 substrate Substances 0.000 claims 6
- 239000002184 metal Substances 0.000 claims 5
- 230000005669 field effect Effects 0.000 claims 3
- 229910044991 metal oxide Inorganic materials 0.000 claims 3
- 150000004706 metal oxides Chemical class 0.000 claims 3
- 239000002019 doping agent Substances 0.000 claims 2
- 238000002347 injection Methods 0.000 claims 2
- 239000007924 injection Substances 0.000 claims 2
- 150000002500 ions Chemical class 0.000 claims 1
Claims (3)
- 注入フリーエンハンスメントモード金属酸化膜半導体電界効果トランジスタ(EMOSFET)であって、
III−V化合物半導体基板と、
前記III−V化合物半導体基板上のエピタキシャル層構造であって、チャネル層及び少なくとも1つのドープ層を含む前記エピタキシャル層構造と、
前記エピタキシャル層構造上のゲート酸化膜層と、
前記ゲート酸化膜層上の金属ゲート電極と、
前記エピタキシャル層構造上のソース及びドレイン・オーミックコンタクトと、からなり、
少なくとも1層のドープ層として、同じドーパント・タイプのイオン注入をしたソースとドレイン領域を有しない、EMOSFET。 - 注入フリーエンハンスメントモード金属酸化膜半導体電界効果トランジスタ(EMOSFET)を組み立てるための方法であって、
III−V化合物半導体基板を提供する段階と、
前記III−V化合物基板上に第1厚さのエピタキシャル層構造を成長する段階と、
前記第1厚さの前記エピタキシャル層構造にドープして、前記第1厚さの前記エピタキシャル層構造内にドープ層を形成する段階と、
前記エピタキシャル層構造を第2厚さに成長する段階と、
前記エピタキシャル層構造上にゲート酸化膜層を形成する段階と、
前記エピタキシャル層構造上にソース及びドレイン・オーミックコンタクトを形成する段階と、
前記ゲート酸化膜層上に金属ゲート電極を形成する段階と、からなり、
ドープ層として同じドーパント・タイプのイオンを注入したソースとドレインの領域を形成せずに作製する、方法。 - エンハンスメントモード金属酸化膜半導体電界効果トランジスタ(EMOSFET)であって、
III−V化合物半導体基板と、
前記III−V化合物半導体基板上のエピタキシャル層構造であって、チャネル層及び少なくとも1つのデルタドープ層を含む前記エピタキシャル層構造と、
前記エピタキシャル層構造上のゲート酸化膜層と、
前記ゲート酸化膜層上の金属ゲート電極であって、仕事関数を有する前記金属ゲート電
極と、
前記エピタキシャル層構造上のソース及びドレイン・オーミックコンタクトであって、前記金属ゲート電極は、仕事関数を有するように選択され、前記デルタドープ層は、エンハンスメントモード動作が実現されるように選択される前記ソース及びドレイン・オーミックコンタクトと、
が含まれるEMOSFET。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/339,379 US6963090B2 (en) | 2003-01-09 | 2003-01-09 | Enhancement mode metal-oxide-semiconductor field effect transistor |
PCT/US2003/040680 WO2004064172A2 (en) | 2003-01-09 | 2003-12-18 | An enhancement mode metal-oxide-semiconductor field effect transistor and method for forming the same |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006513572A JP2006513572A (ja) | 2006-04-20 |
JP2006513572A5 true JP2006513572A5 (ja) | 2007-02-15 |
Family
ID=32711091
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004566580A Pending JP2006513572A (ja) | 2003-01-09 | 2003-12-18 | エンハンスメントモード金属酸化膜半導体電界効果トランジスタ及びその形成方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US6963090B2 (ja) |
EP (1) | EP1586119A2 (ja) |
JP (1) | JP2006513572A (ja) |
AU (1) | AU2003301146A1 (ja) |
TW (1) | TWI333260B (ja) |
WO (1) | WO2004064172A2 (ja) |
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2003
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- 2003-12-18 JP JP2004566580A patent/JP2006513572A/ja active Pending
- 2003-12-18 AU AU2003301146A patent/AU2003301146A1/en not_active Abandoned
- 2003-12-18 WO PCT/US2003/040680 patent/WO2004064172A2/en active Application Filing
- 2003-12-18 EP EP03815232A patent/EP1586119A2/en not_active Withdrawn
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2004
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