JP2006344640A - 半導体集積回路装置 - Google Patents
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Abstract
【解決手段】 半導体集積回路装置において、各独立した電源領域AreaA〜AreaIごとに電源遮断の優先順を設け、優先順の高い回路がONしている場合にはそれより優先順の低い電源領域はOFFにできないという規則を設けて、設計方法の容易化を図る。また、各独立した電源領域AreaA〜AreaI内において、さらに別の電源を印加できる領域を設け、その領域に中継バッファ(リピータ)やクロックバッファ、情報退避用の情報保持ラッチを集積する。レイアウト上は、電源線の電流を分散させる目的でセルがロウ方向に並ぶ方向と垂直な方向にまとめてレイアウトすればよい。
【選択図】 図1
Description
本発明の半導体集積回路装置に関する実施の形態1について、図1〜図5を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態2について、図6,図7を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態3について、図8,図9を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態4について、図10,図11を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態5について、図12を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態6について、図13を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態7について、図14,図15を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態8について、図16を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態9について、図17を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態10について、図18を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態11について、図19〜図22を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態12について、図23〜図25を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態13について、図26を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態14について、図27を用いて説明する。
本発明の半導体集積回路装置に関する実施の形態15について、図28を用いて説明する。
Claims (15)
- 第1の電源と、それぞれ前記第1の電源および他の機能ブロックで使用される電源とは異なる第2乃至第M+1の電源とで動作する第1乃至第Mの機能ブロックを備え、前記第1乃至第Mの機能ブロックがひとつのチップ上に集積された半導体集積回路装置であって、
前記第2乃至第M+1の電源は、互いに独立して電源が供給され、
前記第1乃至第Mの機能ブロックは、それぞれ独立して電源遮断の制御が可能で、それぞれ電源遮断の優先度が付与され、前記優先度は信号結線の関係をもとに関係付けられ、前記信号結線は階層化されて実施され、
前記第1乃至第Mの機能ブロックのうち、下位の階層にある第Jおよび第Kの機能ブロックと、前記第Jおよび第Kの機能ブロックの上位の階層にある第Lの機能ブロックとの間において、前記第Jの機能ブロックから前記第Kの機能ブロックへの信号の授受を実施する際には前記第Lの機能ブロックの内部に設けられた信号中継用のバッファ回路を経由して伝達され、前記第Jの機能ブロックから前記第Lの機能ブロックへ信号を伝達する際には不定信号伝播防止回路を経由し、前記第Lの機能ブロックから前記第Kの機能ブロックへ信号を伝達する際には不定信号伝播防止回路を不要とすることを特徴とする半導体集積回路装置。 - 請求項1記載の半導体集積回路装置において、
前記下位の階層の機能ブロックの内部には、前記上位の階層の機能ブロックが設けられ、
前記上位の階層の機能ブロックのレイアウトは、基本的な回路セルの電源配線である、最下層の電源配線とは直角の方向に複数の回路セルが設けられるようにレイアウトされ、
前記上位の階層の機能ブロックの電源は、前記下位の階層の機能ブロックの電源と同様に、電源電圧のドロップが最小限となるようにチップ内部でメッシュ状に配線されることを特徴とする半導体集積回路装置。 - 請求項2記載の半導体集積回路装置において、
前記下位の階層の複数の機能ブロックの内部に設置された前記上位の階層の機能ブロックの電源を共通化してまとめてひとつの機能ブロックとして扱うことを特徴とする半導体集積回路装置。 - 請求項2または3記載の半導体集積回路装置において、
前記上位の階層の機能ブロックの電源遮断の優先度は、前記下位の階層の機能ブロックよりも低いことを特徴とする半導体集積回路装置。 - 請求項4記載の半導体集積回路装置において、
前記上位の階層の機能ブロックの内部には、長距離信号の配線における中継バッファ回路が搭載されることを特徴とする半導体集積回路装置。 - 請求項4記載の半導体集積回路装置において、
前記上位の階層の機能ブロックの内部には、クロック信号分配用のクロックバッファ回路が搭載されることを特徴とする半導体集積回路装置。 - 請求項6記載の半導体集積回路装置において、
前記上位の階層の機能ブロックの内部には、前記クロック信号分配用のクロックバッファ回路のうち、クロック発生器に近い階層のクロックバッファ回路のみが搭載されることを特徴とする半導体集積回路装置。 - 請求項4記載の半導体集積回路装置において、
前記上位の階層の機能ブロックには、前記下位の階層の機能ブロックが電源遮断される際の情報をバックアップするためのラッチ回路が搭載されることを特徴とする半導体集積回路装置。 - 論理回路を構成する第1のMISFETのゲート絶縁膜厚よりも厚い第2のゲート絶縁膜厚で構成される電源スイッチと、前記第2のゲート絶縁膜厚のMISFETで構成される電源スイッチコントローラとを備える半導体集積回路装置であって、
前記電源スイッチコントローラは、小型の第1の電源スイッチを始めにオンし、その後、大型の第2の電源スイッチをオンすることを特徴とする半導体集積回路装置。 - 請求項9記載の半導体集積回路装置において、
前記電源スイッチコントローラは仮想電源線が動作可能電圧レベルに達したか否かを検出する手段を有し、その手段として仮想電源線の電圧レベルを検出するセンサ回路を設け、この電圧レベルがあらかじめ設定された電圧値であることを検出して、前記小型の第1の電源スイッチと前記大型の第2の電源スイッチの切り替え制御を実施することを特徴とする半導体集積回路装置。 - 請求項10記載の半導体集積回路装置において、
前記電源スイッチコントローラは電源スイッチのオン・オフ状態を検出するためにさらに電圧センサ回路を設け、特に、そのセンサ回路は、電源スイッチを構成する第2のゲート絶縁膜厚のMISFETのゲート信号の電圧レベルを検出するセンサ回路であり、このゲート信号のレベルをあらかじめ設定していた電圧レベルと比較することで、電源スイッチのオン状態とオフ状態を検出する機構を備えたことを特徴とする半導体集積回路装置。 - 論理回路を構成する第1のMISFETのゲート絶縁膜厚よりも厚い第2のゲート絶縁膜厚で構成される電源スイッチと、第2のゲート絶縁膜厚のMISFETで構成される電源スイッチコントローラとを備える半導体集積回路装置であって、
前記電源スイッチコントローラは、大型の第3の電源スイッチの駆動制御を、大小の複数の駆動ドライバを切り替えて制御を実施し、前記第3の電源スイッチの制御信号の遠端側の信号の電圧レベルをモニタすることで、前記第3の電源スイッチの駆動ドライバサイズを切り替え制御を実施することを特徴とする半導体集積回路装置。 - 請求項9乃至12のいずれか1項記載の半導体集積回路装置において、
電源スイッチの制御のために、前記電源スイッチコントローラに構成されるセンサ回路として、前記電源スイッチコントローラ内部にクロック信号発生回路を有し、そのクロック信号発生回路で発生したクロック信号に同期して電圧レベルを検出するダイナミック型コンパレータであることを特徴とする半導体集積回路装置。 - LSI内部の電圧変動を観測する手段として、論理回路を構成するMISFETと同様な、第1のゲート絶縁膜厚のMISFETで構成されたリングオシレータで電圧変動を周波数変動に変換する電圧モニタと、その出力信号をLSI外部へ出力させるための増幅回路とを備え、前記電圧モニタは電源電圧がより低い値でも動作するようにしきい値の小さなMISFETで構成されることを特徴とする半導体集積回路装置。
- 請求項14記載の半導体集積回路装置において、
前記電圧モニタはLSIを設計するに当たって標準的に準備される標準セルライブラリに登録され、LSI設計時に他の標準セルと同様にレイアウトが実施されることを特徴とする半導体集積回路装置。
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US8026570B2 (en) | 2011-09-27 |
US20120187981A1 (en) | 2012-07-26 |
US20110316620A1 (en) | 2011-12-29 |
US10896919B2 (en) | 2021-01-19 |
US8683414B2 (en) | 2014-03-25 |
US20150295572A1 (en) | 2015-10-15 |
US7610572B2 (en) | 2009-10-27 |
US20180286885A1 (en) | 2018-10-04 |
US10014320B2 (en) | 2018-07-03 |
US20060291110A1 (en) | 2006-12-28 |
US20140167819A1 (en) | 2014-06-19 |
US9455699B2 (en) | 2016-09-27 |
US8441095B2 (en) | 2013-05-14 |
US20130228939A1 (en) | 2013-09-05 |
US20160365358A1 (en) | 2016-12-15 |
US10446581B2 (en) | 2019-10-15 |
US8169036B2 (en) | 2012-05-01 |
US9087818B2 (en) | 2015-07-21 |
JP4846272B2 (ja) | 2011-12-28 |
US20200006384A1 (en) | 2020-01-02 |
US20100017775A1 (en) | 2010-01-21 |
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