JP2006310726A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP2006310726A JP2006310726A JP2005252184A JP2005252184A JP2006310726A JP 2006310726 A JP2006310726 A JP 2006310726A JP 2005252184 A JP2005252184 A JP 2005252184A JP 2005252184 A JP2005252184 A JP 2005252184A JP 2006310726 A JP2006310726 A JP 2006310726A
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- electrode
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 281
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 239000000758 substrate Substances 0.000 claims abstract description 142
- 239000002184 metal Substances 0.000 claims description 22
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- 229910001111 Fine metal Inorganic materials 0.000 description 20
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- 229910000679 solder Inorganic materials 0.000 description 10
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- 229910052802 copper Inorganic materials 0.000 description 6
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- 239000000463 material Substances 0.000 description 6
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
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- 229910052581 Si3N4 Inorganic materials 0.000 description 2
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- 238000001039 wet etching Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
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- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
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Classifications
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Abstract
【解決手段】 本発明の半導体装置20Aは、半導体基板25の表面に活性領域21と接続されたエミッタパッド電極23E、コレクタパッド電極23Cおよびベースパッド電極23Bが形成されている。更に、半導体基板25の裏面には、裏面電極26が形成されている。更に、接地電位と接続されるエミッタパッド電極23Eは、半導体基板25を厚み方向に貫通する貫通電極24Aを介して、裏面電極26と接続されている。
【選択図】図3
Description
本形態では、図1から図5を参照して、半導体基板を貫通する貫通電極を具備する半導体装置の構造を説明する。
次に、図6から図8を参照して、図4(A)に構造を示した半導体装置20Aの製造方法を説明する。先ず、図6を参照して、バイポーラトランジスタから成る活性領域21を形成する方法を説明する。
本実施の形態では、図9を参照して、図4(C)に構造を示した半導体装置20Bの製造方法を説明する。本形態の製造方法は、基本的に上述した第2の実施の形態と同様であり、相違点は貫通孔24Bの内壁に側壁絶縁膜を形成しない点にある。
本実施の形態では、図10から図12を参照して、他の形態の半導体装置20Cおよびそれを有する回路装置の構成を説明する。ここで説明する半導体装置20Cでは、半導体基板25の表面に形成された複数のパッド電極が、貫通電極24Aを介して、半導体基板42の裏面に形成された裏面電極と接続されている。また、半導体基板25の裏面に、複数個の裏面電極が形成される。
11A〜11D リード
12 ランド
14 封止樹脂
15 固着材
16 基板
20A、20B、20C 半導体装置
21 活性領域
22 再配線
23 パッド電極
23E エミッタパッド電極
23C コレクタパッド電極
23B ベースパッド電極
24A 貫通電極
24B 貫通孔
25 半導体基板
26 裏面電極
27E エミッタ電極
27C コレクタ電極
27B ベース電極
28 シリコン半導体基板
29 受け込み酸化膜層
30 N++型エピタキシャル層
31 N−型エピタキシャル層
32 酸化膜
33 トレンチ
34 ベース領域
35 エミッタ領域
37 コレクタ領域
38 絶縁膜
Claims (15)
- 半導体基板の表面に形成されて活性領域と電気的に接続された複数のパッド電極と、
前記半導体基板の裏面に設けられた裏面電極と、
前記半導体基板を厚み方向に貫通して、前記パッド電極と前記裏面電極とを接続する貫通電極とを具備し、
接地電位と接続される少なくとも1つの前記パッド電極が、前記貫通電極を介して前記裏面電極と接続されることを特徴とする半導体装置。 - 複数個の前記パッド電極が前記貫通電極を介して前記裏面電極に接続されることを特徴とする請求項1記載の半導体装置。
- 前記活性領域にはバイポーラトランジスタが形成され、
前記バイポーラトランジスタのエミッタ領域と接続された前記パッド電極が、前記貫通電極を介して前記裏面電極と接続されることを特徴とする請求項1記載の半導体装置。 - 前記活性領域にはMOSFETが形成され、
前記MOSFETのソース領域と接続された前記パッド電極が、前記貫通電極を介して前記裏面電極と接続されることを特徴とする請求項1記載の半導体装置。 - 前記半導体基板の前記裏面電極は、ランド状の導電部材に固着され、
接地電位と接続される前記パッド電極は、前記貫通電極および前記裏面電極を介して前記導電部材に接続されることを特徴とする請求項1記載の半導体装置。 - 接地電位と接続されない他のパッド電極は、
金属細線を介して他の導電部材に電気的に接続されることを特徴とする請求項5記載の半導体装置。 - 前記裏面電極が前記半導体基板の裏面に直に接触し、
前記貫通電極と前記半導体基板とを同電位にすることを特徴とする請求項1記載の半導体装置。 - 複数の裏面電極が前記半導体基板の裏面に形成され、
各々の前記裏面電極は、前記貫通電極を介して前記パッドと電気的に接続されることを特徴とする請求項1記載の半導体装置。 - 前記裏面電極は、前記半導体基板の裏面を被覆する絶縁膜を介して、前記半導体基板と絶縁されることを特徴とする請求項8記載の半導体装置。
- 前記活性領域と接続された前記パッド電極の全てが、前記貫通電極を介して前記裏面電極に接続されることを特徴とする請求項1記載の半導体装置。
- 前記活性領域は、分離領域により囲まれる領域の内部に形成され、
前記貫通電極は、前記分離領域の外側の前記半導体基板を貫通する貫通孔の内部に形成され、
前記貫通電極は前記貫通孔の内壁に接触することを特徴とする請求項1記載の半導体装置。 - 能動素子が形成された半導体層を有する半導体基板と、
前記能動素子の一拡散領域と電気的に接続された第1の電極と、
前記第1の電極と一体で半導体基板の周囲に延在されて設けられたパッド電極と、
前記パッド電極の下層に設けられ、半導体層表面から半導体基板の裏面にまで延在する貫通電極と、
前記貫通電極と電気的に接続され、半導体基板の裏面に設けられた裏面電極とを有することを特徴とする半導体装置。 - 前記能動素子は、BIP型またはMOS型のトランジスタであり、接地される拡散領域と電気的に接続される前記第1の電極は、少なくとも2つの貫通電極と電気的に接続されることを特徴とする請求項12に記載の半導体装置。
- 半導体基板の表面に活性領域を形成する工程と、
前記活性領域と電気的に接続されたパッドを前記半導体基板の表面に形成する工程と、
前記パッドの下方に位置する前記半導体基板を貫通する貫通孔を形成する工程と、
前記貫通孔の内部に形成された貫通電極を介して前記パッドと電気的に接続された裏面電極を前記半導体基板の裏面に形成する工程とを具備し、
前記貫通孔を、前記活性領域を包囲するように形成された分離領域の外部に形成し、
前記貫通電極を前記貫通孔の内壁に直に当接するように形成することを特徴とする半導体装置の製造方法。 - 前記分離領域は、トレンチ構造、LOCOS酸化膜、またはPN接合分離の構造を有することを特徴とする請求項14記載の半導体装置の製造方法。
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