JP2006203166A - 半導体装置及び回路装置 - Google Patents
半導体装置及び回路装置 Download PDFInfo
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- JP2006203166A JP2006203166A JP2005329184A JP2005329184A JP2006203166A JP 2006203166 A JP2006203166 A JP 2006203166A JP 2005329184 A JP2005329184 A JP 2005329184A JP 2005329184 A JP2005329184 A JP 2005329184A JP 2006203166 A JP2006203166 A JP 2006203166A
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Abstract
【解決手段】基板10と、基板の一方側に固着される半導体チップ20と、基板の他方側に渦巻き状に形成されるとともに半導体チップと電気的に接続されるコイル30と、を有する半導体装置であって、基板の一方側における半導体チップと対向する面上に、コイルのインダクタンス特性を安定化させるための導電パターン40を、備えてなる。
【選択図】図1
Description
図1を参照しつつ、本実施の形態の半導体装置1の構成例について説明する。図1(a)は半導体装置1の表側の平面図であり、図1(b)は半導体装置1の側面図であり、図1(c)は半導体装置1の裏側を表側から見た透視図である。以後、この半導体装置1における後述するICチップ側を「表側」と称し、この半導体装置1における後述するコイル側を「裏側」と称することとする。図1(a)及び図1(c)に例示されるように、本実施の形態の半導体装置1は、例えば、表裏側が略正方形状をなすパッケージである。この略正方形の一辺の長さは例えば5mmである。また、図1(b)に例示されるパッケージの厚さ(Z方向の長さ)は例えば1mm程度である。よって、本実施の形態の半導体装置1は、略正方形の表裏を有する平板形状をなすものである。但し、半導体装置1は前記の寸法を有する略正方形の平板形状に限定されるものではない。
図1に戻って、本実施の形態のダミーパターン40の構成例について説明する。ダミーパターン40は、例えば一体の平坦な導電体からなってもよい。但し、複数の導電体が所定の幅狭の間隙を隔てて整列し構成されるダミーパターン40の方が後述する格別の効果を奏する。
図4(a)の側面図に例示されるように、前述した半導体装置1は、他の半導体装置とともにプリント配線基板(第2の基板)500上に実装されて例えば携帯用の電子機器の回路装置100の1つを構成する。本実施の形態では、半導体装置1の裏側の外部端子(例えばVCC、L1、L2)は、例えば半田バンプ60を介してプリント配線基板500上の導電路510と電気的に接続される。尚、この半田バンプ60は、プリント配線基板500上で半導体装置1を支持する役割も果たす。
前述した実施の形態の半導体装置1では、基板(基板10)におけるICチップ側である表側に導電パターン(ダミーパターン40)が形成されるとともに、基板10の裏側にコイル(コイル30)が形成されていたが、この導電パターン及びコイルと基板の表裏との相対位置関係は、これと逆であってもよい。
前述した実施の形態の半導体装置1”(図6(a))では、2つのコイル301”、302”は、何れも基板10”面上において中心から外側に向かって反時計周りに渦を巻く同一の形状をなすように形成されていたが、これに限定されるものではない。
前述した実施の形態の半導体装置1”(図6(b))は、その基板10”の裏側のみにダミーパターン40”が形成されたものであったが、これに限定されるものではない。前述した実施の形態の半導体装置1”では、2つのコイル301”、302”が貼着された絶縁性基板10”の表側には、ソルダレジストパターン13a”と、絶縁ペースト21”とを介して、ICチップ20”が設けられていた。ここで、例えば、ソルダレジストパターン13a”と、絶縁ペースト21”との間に、ダミーパターン40”と略同形状をなす補助導電パターンを介在させてもよい。
以上述べた半導体装置1、1”、81、91は、チューナ装置として他の半導体装置とともにプリント配線基板(第2の基板)500(図4(a))上に実装されて、例えば携帯用のFMラジオ受信機(回路装置)700(図9)を構成する。図9は、FMラジオ受信機700の構成例を示すブロック図である。
本実施の形態の半導体装置1”は、基板10”と、基板10”の表側に固着されるICチップ20”と、基板の表側のICチップ20”と対向する面上に形成される、ICチップ20”と電気的に接続される渦巻き状のコイル30”と、基板10”の裏側のコイル30”と相反する面上に形成される、コイル30”のインダクタンス特性を安定化させるためのダミーパターン40”と、を備えてなる。この半導体装置1”単体では、コイル30”と相互インダクタンス結合し得る主たるものはダミーパターン40”である。よって、半導体装置1”単体のコイル30が所定のインダクタンス特性を有するように例えばメーカ側で予めダミーパターン40”を設計しておけば、例えばユーザ側で半導体装置1”を導電体等から遠ざけて実装する限り、コイル30”の所定のインダクタンス特性が保持される。従って、実装前のインダクタンス特性及びその安定性を実装後に容易に再現できる。また、この半導体装置1”によれば、もしコイル30”から電磁界が発生した場合でも、これがダミーパターン40”により吸収されるため、この半導体装置1”の実装先の電子機器等への電磁干渉を抑制できる。
2 等価回路
10、10”、810、910 基板
11、11” 絶縁性基板
12a、12a”、12b、12b”、510、530、540 導電路
912a、912b 導電路
13a、13a”、13b、13b” ソルダレジストパターン
913a、913b、914a ソルダレジストパターン
15” 接地用端子
20、20”、920 ICチップ
21、21” 絶縁ペースト
22、22” 金属細線
30、30”、301、301”、302、302” コイル
830、930、8301、8302、9301、9302 コイル
40、40”、941、942 ダミーパターン
50、50”、950 モールド樹脂
60 半田バンプ
100、101 回路装置
121a、121a”、124a、124a”、127a、128a 開口部電極
121b、121b”、124b、124b”、127b、128b 開口部電極
122a、122a”、122b、122b” 配線
125a、125a”、125b”、126b”、303a 配線
123a、126a 内部電極
123b、123b”、126b” 外部端子
201、201”、202、202” 電極
210 内蔵ダイオード
220 キャパシタ・バンク
301a、301a”、301b、301b” 開口部電極
302a、302a”、302b、302b”、304a” 開口部電極
303b” ブリッジ線路
305a” 線路
311a、311b インダクタ
401、520 導電体
402 間隙
500 プリント配線基板
1201 スルーホール
1201a、1201b 開口部
8121、8122 ICチップ用パターン
Claims (17)
- 基板と、
前記基板の一方側に固着される半導体チップと、
前記基板の他方側に渦巻き状に形成されるとともに前記半導体チップと電気的に接続されるコイルと、を有する半導体装置であって、
前記基板の一方側における前記半導体チップと対向する面上に、前記コイルのインダクタンス特性を安定化させるための導電パターンを、備えたことを特徴とする半導体装置。 - 前記半導体チップは、前記導電パターンに対して絶縁性接着剤を介して固着されることを特徴とする請求項1に記載の半導体装置。
- 前記導電パターンは、所定形状の単一の導電パターンが所定間隙を介して複数配列されてなることを特徴とする請求項1又は2に記載の半導体装置。
- 前記導電パターンは、略四角形の単一の導電パターンを、前記所定間隙が略一直線となって交差するように複数配列されてなることを特徴とする請求項3に記載の半導体装置。
- 前記半導体チップは四角形であり、
前記略一直線となって交差する複数の所定間隙は、前記半導体チップの外周辺に対して、所定角度を有して設けられることを特徴とする請求項4に記載の半導体装置。 - 第1の基板と、
前記第1の基板の一方側に固着される半導体チップと、
前記第1の基板の他方側に渦巻き状に形成されるコイルと、
前記第1の基板の一方側と他方側との間を貫通し、前記半導体チップの電極と、前記コイルの電極とを電気的に接続する第1の貫通孔と、
前記第1の基板の一方側における前記半導体チップと対向する面上に形成される、前記コイルのインダクタンス特性を安定化させるための導電パターンと、
前記第1の基板の一方側と他方側との間を貫通し、前記半導体チップの他の電極と、前記第1の基板の他方側に形成された電極とを電気的に接続する第2の貫通孔と、
前記第1の基板の一方側を封止する絶縁性樹脂と、
を有することを特徴とする半導体装置。 - 第1の基板と、前記第1の基板の一方側に固着される半導体チップと、前記第1の基板の他方側に渦巻き状に形成されるとともに前記半導体チップと電気的に接続されるコイルと、前記第1の基板の一方側における前記半導体チップと対向する面上に、前記コイルのインダクタンス特性を安定化させるための導電パターンと、を有する半導体装置と、
前記半導体装置が、前記第1の基板の他方側を対向させた状態で実装される第2の基板と、
を備えたことを特徴とする回路装置。 - 前記第1の基板の他方側に形成された前記コイルと対向する面上には、前記第2の基板の導電パターンが無いことを特徴とする請求項7に記載の回路装置。
- 基板と、
前記基板の一方側に固着される半導体チップと、
前記基板の一方側の前記半導体チップと対向する面上に形成される、前記半導体チップと電気的に接続される渦巻き状のコイルと、
前記基板の他方側の前記コイルと相反する面上に形成される、前記コイルのインダクタンス特性を安定化させるための導電パターンと、
を備えたことを特徴とする半導体装置。 - 前記半導体チップは、絶縁性接着剤を介して前記基板に固着されることを特徴とする請求項9に記載の半導体装置。
- 前記基板の他方側の面上に形成される前記導電パターンを同一電圧に保持するための複数の電極、
を更に備えたことを特徴とする請求項9又は10に記載の半導体装置。 - 前記複数の電極は、接地されることを特徴とする請求項11に記載の半導体装置。
- 前記コイルは、前記導電パターンが設けられない場合のインダクタンス値より大なるインダクタンス値を有する、ことを特徴とする請求項9乃至12の何れかに記載の半導体装置。
- 前記コイルは第1のコイル及び第2のコイルからなり、
前記第1のコイル及び前記第2のコイルは、前記基板の一方側の前記半導体チップと対向する面を二分する境界線に対し、線対称の形状を呈する、
ことを特徴とする請求項9乃至13の何れかに記載の半導体装置。 - 前記基板の一方側の前記半導体チップ及び前記絶縁性接着剤の間に介在する前記コイルのインダクタンス特性を安定化させるための補助導電パターン、
を更に備えたことを特徴とする請求項10乃至14の何れかに記載の半導体装置。 - 第1の基板と、
前記第1の基板の一方側に固着される半導体チップと、
前記第1の基板の一方側の前記半導体チップと対向する面上に形成される、前記半導体チップと電気的に接続される渦巻き状のコイルと、
前記第1の基板の他方側の前記コイルと相反する面上に形成される、前記コイルのインダクタンス特性を安定化させるための導電パターンと、
前記第1の基板の他方側の面上に形成される電極と、
前記第1の基板の一方側と他方側との間を貫通し、前記半導体チップの電極と、前記第1の基板の他方側の面上に形成される電極とを電気的に接続する貫通孔と、
前記第1の基板の一方側を封止する絶縁性樹脂と、
を備えたことを特徴とする半導体装置。 - 第1の基板と、前記第1の基板の一方側に固着される半導体チップと、前記第1の基板の一方側の前記半導体チップと対向する面上に形成される、前記半導体チップと電気的に接続される渦巻き状のコイルと、前記第1の基板の他方側の前記コイルと相反する面上に形成される、前記コイルのインダクタンス特性を安定化させるための導電パターンと、を有する半導体装置と、
前記第1の基板の他方側と対向し、前記半導体装置が実装される第2の基板と、
を備えたことを特徴とする回路装置。
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EP05257863A EP1675177A3 (en) | 2004-12-21 | 2005-12-20 | Semiconductor apparatus and circuit apparatus |
KR1020050126764A KR101147978B1 (ko) | 2004-12-21 | 2005-12-21 | 반도체장치 및 회로장치 |
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JP2006229190A (ja) * | 2005-01-24 | 2006-08-31 | Sanyo Electric Co Ltd | 半導体装置 |
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JP2011014556A (ja) * | 2009-06-30 | 2011-01-20 | Hitachi Ltd | 半導体装置とその製造方法 |
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CN104040715B (zh) * | 2012-02-09 | 2017-02-22 | 富士电机株式会社 | 半导体器件 |
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US7432580B2 (en) | 2008-10-07 |
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KR101147978B1 (ko) | 2012-06-01 |
CN1848423B (zh) | 2011-12-21 |
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US20060131724A1 (en) | 2006-06-22 |
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