JP2005537672A5 - - Google Patents
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- Publication number
- JP2005537672A5 JP2005537672A5 JP2004533596A JP2004533596A JP2005537672A5 JP 2005537672 A5 JP2005537672 A5 JP 2005537672A5 JP 2004533596 A JP2004533596 A JP 2004533596A JP 2004533596 A JP2004533596 A JP 2004533596A JP 2005537672 A5 JP2005537672 A5 JP 2005537672A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- insulating means
- sige
- sige layer
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims 32
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims 16
- 238000000137 annealing Methods 0.000 claims 4
- 239000004065 semiconductor Substances 0.000 claims 3
- 238000005229 chemical vapour deposition Methods 0.000 claims 2
- 238000009413 insulation Methods 0.000 claims 2
- 230000002040 relaxant effect Effects 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
- 238000001451 molecular beam epitaxy Methods 0.000 claims 1
- 150000004767 nitrides Chemical class 0.000 claims 1
- 238000005498 polishing Methods 0.000 claims 1
- 230000008707 rearrangement Effects 0.000 claims 1
- 239000000126 substance Substances 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GBGB0220438.6A GB0220438D0 (en) | 2002-09-03 | 2002-09-03 | Formation of lattice-turning semiconductor substrates |
| PCT/GB2003/003514 WO2004023536A1 (en) | 2002-09-03 | 2003-08-12 | Formation of lattice-tuning semiconductor substrates |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2005537672A JP2005537672A (ja) | 2005-12-08 |
| JP2005537672A5 true JP2005537672A5 (https=) | 2008-12-18 |
Family
ID=9943412
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004533596A Pending JP2005537672A (ja) | 2002-09-03 | 2003-08-12 | 格子調整半導体基板の形成 |
Country Status (8)
| Country | Link |
|---|---|
| US (1) | US7179727B2 (https=) |
| EP (1) | EP1540715A1 (https=) |
| JP (1) | JP2005537672A (https=) |
| KR (1) | KR20050038037A (https=) |
| CN (1) | CN100364052C (https=) |
| AU (1) | AU2003251376A1 (https=) |
| GB (1) | GB0220438D0 (https=) |
| WO (1) | WO2004023536A1 (https=) |
Families Citing this family (28)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006011107A1 (en) * | 2004-07-22 | 2006-02-02 | Koninklijke Philips Electronics N.V. | Method of manufacturing a semiconductor device and semiconductor device obtained with such a method |
| GB2418531A (en) * | 2004-09-22 | 2006-03-29 | Univ Warwick | Formation of lattice-tuning semiconductor substrates |
| US9153645B2 (en) | 2005-05-17 | 2015-10-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication |
| US8324660B2 (en) | 2005-05-17 | 2012-12-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication |
| KR101329388B1 (ko) | 2005-07-26 | 2013-11-14 | 앰버웨이브 시스템즈 코포레이션 | 다른 액티브 영역 물질의 집적회로 집적을 위한 솔루션 |
| US7638842B2 (en) | 2005-09-07 | 2009-12-29 | Amberwave Systems Corporation | Lattice-mismatched semiconductor structures on insulators |
| US7777250B2 (en) * | 2006-03-24 | 2010-08-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Lattice-mismatched semiconductor structures and related methods for device fabrication |
| US7476606B2 (en) * | 2006-03-28 | 2009-01-13 | Northrop Grumman Corporation | Eutectic bonding of ultrathin semiconductors |
| US8173551B2 (en) | 2006-09-07 | 2012-05-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Defect reduction using aspect ratio trapping |
| US7875958B2 (en) | 2006-09-27 | 2011-01-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures |
| US20080187018A1 (en) | 2006-10-19 | 2008-08-07 | Amberwave Systems Corporation | Distributed feedback lasers formed via aspect ratio trapping |
| US8237151B2 (en) | 2009-01-09 | 2012-08-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Diode-based devices and methods for making the same |
| US7825328B2 (en) | 2007-04-09 | 2010-11-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Nitride-based multi-junction solar cell modules and methods for making the same |
| US9508890B2 (en) * | 2007-04-09 | 2016-11-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Photovoltaics on silicon |
| US8304805B2 (en) | 2009-01-09 | 2012-11-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor diodes fabricated by aspect ratio trapping with coalesced films |
| US8329541B2 (en) | 2007-06-15 | 2012-12-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | InP-based transistor fabrication |
| WO2009035746A2 (en) * | 2007-09-07 | 2009-03-19 | Amberwave Systems Corporation | Multi-junction solar cells |
| US8716836B2 (en) * | 2007-12-28 | 2014-05-06 | Sumitomo Chemical Company, Limited | Semiconductor wafer, semiconductor wafer manufacturing method, and electronic device |
| US8183667B2 (en) | 2008-06-03 | 2012-05-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Epitaxial growth of crystalline material |
| US8274097B2 (en) | 2008-07-01 | 2012-09-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Reduction of edge effects from aspect ratio trapping |
| US8981427B2 (en) | 2008-07-15 | 2015-03-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Polishing of small composite semiconductor materials |
| US20100072515A1 (en) * | 2008-09-19 | 2010-03-25 | Amberwave Systems Corporation | Fabrication and structures of crystalline material |
| WO2010033813A2 (en) | 2008-09-19 | 2010-03-25 | Amberwave System Corporation | Formation of devices by epitaxial layer overgrowth |
| US8253211B2 (en) | 2008-09-24 | 2012-08-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor sensor structures with reduced dislocation defect densities |
| TW201019377A (en) * | 2008-10-02 | 2010-05-16 | Sumitomo Chemical Co | Wafer for a semiconductor device, semiconductor device apparatus, design system, manufacturing method, and design method |
| SG171987A1 (en) | 2009-04-02 | 2011-07-28 | Taiwan Semiconductor Mfg | Devices formed from a non-polar plane of a crystalline material and method of making the same |
| WO2010134334A1 (ja) * | 2009-05-22 | 2010-11-25 | 住友化学株式会社 | 半導体基板、電子デバイス、半導体基板の製造方法及び電子デバイスの製造方法 |
| JP6706414B2 (ja) * | 2015-11-27 | 2020-06-10 | 国立研究開発法人情報通信研究機構 | Ｇｅ単結晶薄膜の製造方法及び光デバイス |
Family Cites Families (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5272105A (en) * | 1988-02-11 | 1993-12-21 | Gte Laboratories Incorporated | Method of manufacturing an heteroepitaxial semiconductor structure |
| GB2215514A (en) * | 1988-03-04 | 1989-09-20 | Plessey Co Plc | Terminating dislocations in semiconductor epitaxial layers |
| US5238869A (en) * | 1988-07-25 | 1993-08-24 | Texas Instruments Incorporated | Method of forming an epitaxial layer on a heterointerface |
| EP0380815B1 (en) * | 1989-01-31 | 1994-05-25 | Agfa-Gevaert N.V. | Integration of GaAs on Si substrate |
| US5158907A (en) * | 1990-08-02 | 1992-10-27 | At&T Bell Laboratories | Method for making semiconductor devices with low dislocation defects |
| JPH04315419A (ja) * | 1991-04-12 | 1992-11-06 | Nec Corp | 元素半導体基板上の絶縁膜／化合物半導体積層構造 |
| US5442205A (en) * | 1991-04-24 | 1995-08-15 | At&T Corp. | Semiconductor heterostructure devices with strained semiconductor layers |
| JP3286920B2 (ja) * | 1992-07-10 | 2002-05-27 | 富士通株式会社 | 半導体装置の製造方法 |
| JPH06260427A (ja) * | 1993-03-05 | 1994-09-16 | Nec Corp | 半導体膜の選択成長方法 |
| US6039803A (en) * | 1996-06-28 | 2000-03-21 | Massachusetts Institute Of Technology | Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon |
| US20010006249A1 (en) | 1997-09-16 | 2001-07-05 | Eugene A Fitzgerald | Co-planar si and ge composite substrate and method of producing same |
| DE19802977A1 (de) | 1998-01-27 | 1999-07-29 | Forschungszentrum Juelich Gmbh | Verfahren zur Herstellung einer einkristallinen Schicht auf einem nicht gitterangepaßten Substrat, sowie eine oder mehrere solcher Schichten enthaltendes Bauelement |
| JP3587081B2 (ja) | 1999-05-10 | 2004-11-10 | 豊田合成株式会社 | Ｉｉｉ族窒化物半導体の製造方法及びｉｉｉ族窒化物半導体発光素子 |
| EP1192646B1 (en) * | 1999-06-25 | 2008-08-13 | Massachusetts Institute Of Technology | Cyclic thermal anneal for dislocation reduction |
| JP4406995B2 (ja) * | 2000-03-27 | 2010-02-03 | パナソニック株式会社 | 半導体基板および半導体基板の製造方法 |
| JP4269541B2 (ja) * | 2000-08-01 | 2009-05-27 | 株式会社Ｓｕｍｃｏ | 半導体基板と電界効果型トランジスタ並びにＳｉＧｅ層の形成方法及びこれを用いた歪みＳｉ層の形成方法と電界効果型トランジスタの製造方法 |
| JP4345244B2 (ja) * | 2001-05-31 | 2009-10-14 | 株式会社Ｓｕｍｃｏ | ＳｉＧｅ層の形成方法及びこれを用いた歪みＳｉ層の形成方法と電界効果型トランジスタの製造方法 |
| JP2004055943A (ja) * | 2002-07-23 | 2004-02-19 | Matsushita Electric Ind Co Ltd | 半導体装置とその製造方法 |
-
2002
- 2002-09-03 GB GBGB0220438.6A patent/GB0220438D0/en not_active Ceased
-
2003
- 2003-08-12 US US10/525,987 patent/US7179727B2/en not_active Expired - Fee Related
- 2003-08-12 KR KR1020057003640A patent/KR20050038037A/ko not_active Ceased
- 2003-08-12 CN CNB038209543A patent/CN100364052C/zh not_active Expired - Fee Related
- 2003-08-12 EP EP03793846A patent/EP1540715A1/en not_active Withdrawn
- 2003-08-12 WO PCT/GB2003/003514 patent/WO2004023536A1/en not_active Ceased
- 2003-08-12 JP JP2004533596A patent/JP2005537672A/ja active Pending
- 2003-08-12 AU AU2003251376A patent/AU2003251376A1/en not_active Abandoned
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