JP2005537672A - 格子調整半導体基板の形成 - Google Patents

格子調整半導体基板の形成 Download PDF

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Publication number
JP2005537672A
JP2005537672A JP2004533596A JP2004533596A JP2005537672A JP 2005537672 A JP2005537672 A JP 2005537672A JP 2004533596 A JP2004533596 A JP 2004533596A JP 2004533596 A JP2004533596 A JP 2004533596A JP 2005537672 A JP2005537672 A JP 2005537672A
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Prior art keywords
sige layer
sige
layer
dislocations
insulating means
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JP2004533596A
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JP2005537672A5 (https=
Inventor
アダム， ダニエル ケープウェル，
ティモシー， ジョン グラスビー，
エバン， ヒューバート， クレスウェル パーカー，
テレンス ホエール，
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ユニバーシティー オブ ワーウィク
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Publication of JP2005537672A publication Critical patent/JP2005537672A/ja
Publication of JP2005537672A5 publication Critical patent/JP2005537672A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
    • H10P14/276—Lateral overgrowth
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
    • H10P14/271—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials characterised by the preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3204—Materials thereof being Group IVA semiconducting materials
    • H10P14/3211—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/933—Germanium or silicon or Ge-Si on III-V

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  • Recrystallisation Techniques (AREA)
JP2004533596A 2002-09-03 2003-08-12 格子調整半導体基板の形成 Pending JP2005537672A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GBGB0220438.6A GB0220438D0 (en) 2002-09-03 2002-09-03 Formation of lattice-turning semiconductor substrates
PCT/GB2003/003514 WO2004023536A1 (en) 2002-09-03 2003-08-12 Formation of lattice-tuning semiconductor substrates

Publications (2)

Publication Number Publication Date
JP2005537672A true JP2005537672A (ja) 2005-12-08
JP2005537672A5 JP2005537672A5 (https=) 2008-12-18

Family

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Family Applications (1)

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JP2004533596A Pending JP2005537672A (ja) 2002-09-03 2003-08-12 格子調整半導体基板の形成

Country Status (8)

Country Link
US (1) US7179727B2 (https=)
EP (1) EP1540715A1 (https=)
JP (1) JP2005537672A (https=)
KR (1) KR20050038037A (https=)
CN (1) CN100364052C (https=)
AU (1) AU2003251376A1 (https=)
GB (1) GB0220438D0 (https=)
WO (1) WO2004023536A1 (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010109358A (ja) * 2008-10-02 2010-05-13 Sumitomo Chemical Co Ltd 半導体デバイス用基板、半導体デバイス装置、設計システム、製造方法、および設計方法
WO2010134334A1 (ja) * 2009-05-22 2010-11-25 住友化学株式会社 半導体基板、電子デバイス、半導体基板の製造方法及び電子デバイスの製造方法
JP2017098493A (ja) * 2015-11-27 2017-06-01 国立大学法人 東京大学 Ｇｅ単結晶薄膜の製造方法及び光デバイス

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WO2006011107A1 (en) * 2004-07-22 2006-02-02 Koninklijke Philips Electronics N.V. Method of manufacturing a semiconductor device and semiconductor device obtained with such a method
GB2418531A (en) * 2004-09-22 2006-03-29 Univ Warwick Formation of lattice-tuning semiconductor substrates
US9153645B2 (en) 2005-05-17 2015-10-06 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
US8324660B2 (en) 2005-05-17 2012-12-04 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures with reduced dislocation defect densities and related methods for device fabrication
KR101329388B1 (ko) 2005-07-26 2013-11-14 앰버웨이브 시스템즈 코포레이션 다른 액티브 영역 물질의 집적회로 집적을 위한 솔루션
US7638842B2 (en) 2005-09-07 2009-12-29 Amberwave Systems Corporation Lattice-mismatched semiconductor structures on insulators
US7777250B2 (en) * 2006-03-24 2010-08-17 Taiwan Semiconductor Manufacturing Company, Ltd. Lattice-mismatched semiconductor structures and related methods for device fabrication
US7476606B2 (en) * 2006-03-28 2009-01-13 Northrop Grumman Corporation Eutectic bonding of ultrathin semiconductors
US8173551B2 (en) 2006-09-07 2012-05-08 Taiwan Semiconductor Manufacturing Co., Ltd. Defect reduction using aspect ratio trapping
US7875958B2 (en) 2006-09-27 2011-01-25 Taiwan Semiconductor Manufacturing Company, Ltd. Quantum tunneling devices and circuits with lattice-mismatched semiconductor structures
US20080187018A1 (en) 2006-10-19 2008-08-07 Amberwave Systems Corporation Distributed feedback lasers formed via aspect ratio trapping
US8237151B2 (en) 2009-01-09 2012-08-07 Taiwan Semiconductor Manufacturing Company, Ltd. Diode-based devices and methods for making the same
US7825328B2 (en) 2007-04-09 2010-11-02 Taiwan Semiconductor Manufacturing Company, Ltd. Nitride-based multi-junction solar cell modules and methods for making the same
US9508890B2 (en) * 2007-04-09 2016-11-29 Taiwan Semiconductor Manufacturing Company, Ltd. Photovoltaics on silicon
US8304805B2 (en) 2009-01-09 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor diodes fabricated by aspect ratio trapping with coalesced films
US8329541B2 (en) 2007-06-15 2012-12-11 Taiwan Semiconductor Manufacturing Company, Ltd. InP-based transistor fabrication
WO2009035746A2 (en) * 2007-09-07 2009-03-19 Amberwave Systems Corporation Multi-junction solar cells
US8716836B2 (en) * 2007-12-28 2014-05-06 Sumitomo Chemical Company, Limited Semiconductor wafer, semiconductor wafer manufacturing method, and electronic device
US8183667B2 (en) 2008-06-03 2012-05-22 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxial growth of crystalline material
US8274097B2 (en) 2008-07-01 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Reduction of edge effects from aspect ratio trapping
US8981427B2 (en) 2008-07-15 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Polishing of small composite semiconductor materials
US20100072515A1 (en) * 2008-09-19 2010-03-25 Amberwave Systems Corporation Fabrication and structures of crystalline material
WO2010033813A2 (en) 2008-09-19 2010-03-25 Amberwave System Corporation Formation of devices by epitaxial layer overgrowth
US8253211B2 (en) 2008-09-24 2012-08-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor sensor structures with reduced dislocation defect densities
SG171987A1 (en) 2009-04-02 2011-07-28 Taiwan Semiconductor Mfg Devices formed from a non-polar plane of a crystalline material and method of making the same

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US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects
JPH04315419A (ja) * 1991-04-12 1992-11-06 Nec Corp 元素半導体基板上の絶縁膜／化合物半導体積層構造
JPH06260427A (ja) * 1993-03-05 1994-09-16 Nec Corp 半導体膜の選択成長方法
JP2002359189A (ja) * 2001-05-31 2002-12-13 Mitsubishi Materials Silicon Corp 半導体基板と電界効果型トランジスタ並びにＳｉＧｅ層の形成方法及びこれを用いた歪みＳｉ層の形成方法と電界効果型トランジスタの製造方法
JP2004055943A (ja) * 2002-07-23 2004-02-19 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法

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JP3587081B2 (ja) 1999-05-10 2004-11-10 豊田合成株式会社 Ｉｉｉ族窒化物半導体の製造方法及びｉｉｉ族窒化物半導体発光素子
EP1192646B1 (en) * 1999-06-25 2008-08-13 Massachusetts Institute Of Technology Cyclic thermal anneal for dislocation reduction
JP4406995B2 (ja) * 2000-03-27 2010-02-03 パナソニック株式会社 半導体基板および半導体基板の製造方法
JP4269541B2 (ja) * 2000-08-01 2009-05-27 株式会社Ｓｕｍｃｏ 半導体基板と電界効果型トランジスタ並びにＳｉＧｅ層の形成方法及びこれを用いた歪みＳｉ層の形成方法と電界効果型トランジスタの製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects
JPH04315419A (ja) * 1991-04-12 1992-11-06 Nec Corp 元素半導体基板上の絶縁膜／化合物半導体積層構造
JPH06260427A (ja) * 1993-03-05 1994-09-16 Nec Corp 半導体膜の選択成長方法
JP2002359189A (ja) * 2001-05-31 2002-12-13 Mitsubishi Materials Silicon Corp 半導体基板と電界効果型トランジスタ並びにＳｉＧｅ層の形成方法及びこれを用いた歪みＳｉ層の形成方法と電界効果型トランジスタの製造方法
JP2004055943A (ja) * 2002-07-23 2004-02-19 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010109358A (ja) * 2008-10-02 2010-05-13 Sumitomo Chemical Co Ltd 半導体デバイス用基板、半導体デバイス装置、設計システム、製造方法、および設計方法
WO2010134334A1 (ja) * 2009-05-22 2010-11-25 住友化学株式会社 半導体基板、電子デバイス、半導体基板の製造方法及び電子デバイスの製造方法
JP2011009718A (ja) * 2009-05-22 2011-01-13 Sumitomo Chemical Co Ltd 半導体基板、電子デバイス、半導体基板の製造方法及び電子デバイスの製造方法
US8890213B2 (en) 2009-05-22 2014-11-18 Sumitomo Chemical Company, Limited Semiconductor wafer, electronic device, a method of producing semiconductor wafer, and method of producing electronic device
JP2017098493A (ja) * 2015-11-27 2017-06-01 国立大学法人 東京大学 Ｇｅ単結晶薄膜の製造方法及び光デバイス
WO2017090703A1 (ja) * 2015-11-27 2017-06-01 国立大学法人東京大学 Ｇｅ単結晶薄膜の製造方法及び光デバイス

Also Published As

Publication number Publication date
US20050245055A1 (en) 2005-11-03
CN1714427A (zh) 2005-12-28
US7179727B2 (en) 2007-02-20
CN100364052C (zh) 2008-01-23
EP1540715A1 (en) 2005-06-15
KR20050038037A (ko) 2005-04-25
WO2004023536A1 (en) 2004-03-18
AU2003251376A1 (en) 2004-03-29
GB0220438D0 (en) 2002-10-09

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