JP2005531160A - 窪んだかまたは広がったブレイクアウェイタブを有する単層または多層のプリント回路基板およびその製造方法 - Google Patents
窪んだかまたは広がったブレイクアウェイタブを有する単層または多層のプリント回路基板およびその製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title description 5
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- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
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- H05K2201/09—Shape and layout
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- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
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- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
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- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- Y10T29/49117—Conductor or circuit manufacturing
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- Y10T29/49126—Assembling bases
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- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
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- Y10T29/49155—Manufacturing circuit on or in base
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- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
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Abstract
Description
本願は、米国特許出願番号10/184,387(2002年6月27日出願、発明の名称「Process for Creating Vias for Circuit Assemlies」)からの優先権を主張する。
現在、プリント回路基板は、より大きいパネルの一部として製造される。各プリント回路基板は、任意の形態で構成され得るが、通常使用されるほとんどのプリント回路基板は、標準的な大きさの矩形の形状に作製される。プリント回路基板の製造が完了すると、この基板は切断され、そしてより大きいパネルから分離される。これは主として、機械切断プロセスまたはルータ加工プロセスにより、ここで、チャネルが、プリント回路基板の周囲に切り込まれる。特定の設計において、プリント回路基板の周りのチャネルは、このプリント回路基板の周囲を完全には取り囲まない。むしろ、タブが、プリント回路基板の周囲のいくつかの位置で残され、このタブを破断することによってこの基板がより大きいパネルから切り離されるまで、このプリント回路基板をより大きいパネルに付着させる。代表的に、プリント回路基板中の金属面は、これらが慣用的なプロセスによって切断される縁部まで延びない。この様式で、伝導性金属は、プリント回路基板の縁部に露出されて残されない。
本発明は、絶縁頂部層と絶縁底部層との間に挟まれた伝導性シートを備える回路基板である。これらの頂部層および底部層、ならびに伝導性シートは、伝導性シートの縁部を含む縁部を有する、回路基板層を規定する。絶縁縁部層は、伝導性シートの縁部の実質的に全体を覆う。
図1を参照すると、プリント回路基板層2は、電気伝導性のシートまたは箔4を備える。シート4は、銅箔、鉄−ニッケル合金、またはこれらの組み合わせから形成され得る。シート4は、図1に示されるような穿孔されたシートであり得るか、または中実のシートであり得る。集積回路またはパッケージ集積回路(図示せず)をプリント回路基板層2に接着させるために利用される接着接合の失敗を防止する目的で、シート4は、集積回路が代表的に調製されるシリコン材料に匹敵する熱膨張係数を有することが望ましい。シート4を穿孔されていると記載することは、シート4が、規則的な間隔で間隔を空けた複数の貫通孔またはバイア6を有するメッシュシートであることを意味する。
Claims (27)
- 回路基板であって、該回路基板が、以下:
絶縁頂部層と絶縁底部層との間に挟まれる電導性シートであって、該頂部層および該底部層ならびに該電導性シートが、該電導性シートの縁部を含む縁部を有する回路基板層を規定する、電導性シート;および
実質的に該電導性シートの縁部の全てを覆う、絶縁縁部層
を備える、回路基板。 - 請求項1に記載の回路基板であって、前記電導性シートが、それを通る少なくとも1つのバイアを備える、回路基板。
- 請求項1に記載の回路基板であって、前記絶縁層が、前記電導性シート上に配置される一般的な誘電性材料から形成される、回路基板。
- 請求項3に記載の回路基板であって、前記誘電性材料が、前記電導性シート上に絶縁保護されてコーティングされる、回路基板。
- 請求項1に記載の回路基板であって、前記頂部層および底部層の少なくとも1つが、その層の上に形成される回路パターンを有する、回路基板。
- 請求項1に記載の回路基板であって、前記絶縁縁部層が、前記電導性シートの縁部の一部が露出されている少なくとも1つの開口部を備える、回路基板。
- 請求項6に記載の回路基板であって、前記縁部の一部が、前記回路基板層がパネルから分離されるのに応じて曝される、回路基板。
- 請求項6に記載の回路基板であって、前記縁部の一部が、前記回路基板層の周囲内にある、回路基板。
- 請求項8に記載の回路基板であって、
前記縁部の一部が、前記回路基板層に取り付けられるタブ上にあり;そして
該タブが、該回路基板層の凹部に延びる、回路基板。 - 請求項9に記載の回路基板であって、
前記頂部層および前記底部層ならびに前記電導性シートが、前記パネルの使い捨て部分に前記タブにより結合される該回路基板層を備えるパネルを規定し;
前記絶縁縁部層が、該タブおよび該回路基板層の縁部を覆い;
該タブが、破断のための破断加重に応答性であり、該回路基板層が、該タブの少なくとも一部が該回路基板層に取り付けられているままで、該パネルの使い捨て部分から分離する、回路基板。 - 請求項9に記載の回路基板であって、前記タブが、前記凹部中で終結する、回路基板。
- 請求項1に記載の回路基板であって、
前記電導性シートが、前記頂部層と前記底部層との間から外に延びるタブを備え;そして
該タブの縁部の少なくとも一部が、曝されている、回路基板。 - 請求項12に記載の回路基板であって、前記縁部の少なくとも一部が、前記回路基板層の周囲の外である、回路基板。
- 請求項12に記載の回路基板であって、
前記タブが、頂部表面および底部表面を有し;そして
該タブの該頂部表面および該底部表面の少なくとも1つの少なくとも一部が、曝されている、回路基板。 - 請求項12に記載の回路基板であって、複数の回路基板層が、一緒に積層され、多層回路基板を形成する、回路基板。
- 請求項15に記載の回路基板であって、前記多層回路基板の1つの回路基板層の前記タブが、該多層回路基板の別の回路基板層の該タブからずらされる、回路基板。
- 請求項16に記載の回路基板であって、該回路基板が、前記1つの回路基板層の前記タブと前記別の回路基板層の該タブとの間に接続される電子的構成要素をさらに備える、回路基板。
- 請求項15に記載の回路基板であって:
前記1つの回路基板層の電導性シートが、電力平面を規定し;そして
前記別の回路基板層の電導性シートが、接地平面を規定する、回路基板。 - 請求項12に記載の回路基板であって、
前記電導性シートがまた、パネルを構成し;
前記タブが、該回路基板層を該パネルと連結し;そして
該タブが該パネルと連結する位置で、該タブが、破断のための破断加重に応答性であり、該パネル上で、該回路基板層がおよび該タブが、該パネルから分離する、回路基板。 - 回路基板を形成する方法であって、該方法が、以下の工程:
(a)第1の電導性シートを提供する工程;
(b)該第1の電導性シートの1つ以上の部分を選択的に取り除き、第1の回路基板の縁部から第1のパネルの使い捨て部分の縁部に延びる少なくとも1つのタブにより、該第1のパネルの該使い捨て部分に結合した該第1の回路基板を有する該第1のパネルを形成する工程;
(c)絶縁コーティングを該第1の回路基板に塗布し、その結果該第1の回路基板の少なくとも各々の縁部が、それにより覆われる工程;および
(d)該タブの少なくとも一部が、該第1の回路基板に取り付けられたままであり、該第1の回路基板の電導性シートの曝された縁部を備える様式で、該第1の回路基板を該第1のパネルの該使い捨て部分から分離する工程
を包含する、方法。 - 請求項20に記載の方法であって、工程(c)が、前記絶縁コーティングを前記第1の回路基板に塗布し、その結果前記少なくとも1つのタブの少なくとも各々の縁部が、それにより覆われる工程をさらに包含する、方法。
- 請求項20に記載の方法であって、前記タブの少なくとも一部が、前記第1の回路基板の周囲の内側および外側の一方で終結する、方法。
- 請求項20に記載の方法であって、該方法が、以下の工程:
(e)第2の電導性シートを提供する工程;
(f)該第2の電導性シートの1つ以上の部分を選択的に取り除き、第2の回路基板の縁部から第2のパネルの使い捨て部分の縁部に延びる少なくとも1つのタブにより、該第2のパネルの該使い捨て部分に結合した該第2の回路基板を有する該第2のパネルを形成する工程;
(g)絶縁コーティングを該第2の回路基板に塗布し、その結果該第2の回路基板の少なくとも各々の縁部が、それにより覆われる工程;
(h)該第1の回路基板および該第2の回路基板を一緒に積層させる工程;ならびに
(i)該タブの少なくとも一部が、該第2の回路基板に取り付けられたままであり、該第2の回路基板の電導性シートの曝された縁部を備える様式で、該第2の回路基板を該第2のパネルの該使い捨て部分から分離する工程
をさらに包含する、方法。 - 請求項23に記載の方法であって、前記各々のタブの少なくとも一部が、前記対応する回路基板の周囲の内側で終結する、方法。
- 請求項23に記載の方法であって、前記各々のタブの少なくとも一部が、前記対応する回路基板の周囲の外側で終結する、方法。
- 請求項25に記載の方法であって、前記第1の回路基板の少なくとも1つのタブが、前記第2の回路基板の少なくとも1つのタブからずらされている、方法。
- 請求項25に記載の方法であって、該方法が、前記第1の回路基板の少なくとも1つのタブと前記第2の回路基板の少なくとも1つのタブとの間の電気的構成要素を電気的に接続する工程をさらに包含する、方法。
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US10/184,387 US6951707B2 (en) | 2001-03-08 | 2002-06-27 | Process for creating vias for circuit assemblies |
US10/227,768 US6844504B2 (en) | 2002-06-27 | 2002-08-26 | Single or multi-layer printed circuit board with recessed or extended breakaway tabs and method of manufacture thereof |
PCT/US2003/020361 WO2004004432A1 (en) | 2002-06-27 | 2003-06-27 | Single or multi-layer printed circuit board with recessed or extended breakaway tabs and method of manufacture thereof |
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JP2005531160A (ja) * | 2002-06-27 | 2005-10-13 | ピーピージー インダストリーズ オハイオ, インコーポレイテッド | 窪んだかまたは広がったブレイクアウェイタブを有する単層または多層のプリント回路基板およびその製造方法 |
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2003
- 2003-06-27 JP JP2004517992A patent/JP2005531160A/ja not_active Withdrawn
- 2003-06-27 AU AU2003248743A patent/AU2003248743A1/en not_active Abandoned
- 2003-06-27 EP EP03762158A patent/EP1520454B1/en not_active Expired - Lifetime
- 2003-06-27 CN CN038177765A patent/CN1672475B/zh not_active Expired - Fee Related
- 2003-06-27 WO PCT/US2003/020361 patent/WO2004004432A1/en active Search and Examination
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2004
- 2004-08-03 US US10/910,022 patent/US7002081B2/en not_active Expired - Fee Related
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2005
- 2005-09-12 US US11/224,197 patent/US7159308B2/en not_active Expired - Fee Related
- 2005-11-29 US US11/288,477 patent/US20060075633A1/en not_active Abandoned
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2006
- 2006-12-01 US US11/565,715 patent/US7679001B2/en not_active Expired - Fee Related
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2007
- 2007-06-05 JP JP2007149829A patent/JP4943236B2/ja not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007266624A (ja) * | 2002-06-27 | 2007-10-11 | Ppg Ind Ohio Inc | 窪んだかまたは広がったブレイクアウェイタブを有する単層または多層のプリント回路基板およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
CN1672475A (zh) | 2005-09-21 |
US20060075633A1 (en) | 2006-04-13 |
JP2007266624A (ja) | 2007-10-11 |
US7159308B2 (en) | 2007-01-09 |
US20070111561A1 (en) | 2007-05-17 |
US20050006138A1 (en) | 2005-01-13 |
CN1672475B (zh) | 2011-11-23 |
EP1520454B1 (en) | 2012-01-25 |
WO2004004432A1 (en) | 2004-01-08 |
AU2003248743A1 (en) | 2004-01-19 |
EP1520454A1 (en) | 2005-04-06 |
JP4943236B2 (ja) | 2012-05-30 |
US20060005995A1 (en) | 2006-01-12 |
US7002081B2 (en) | 2006-02-21 |
US7679001B2 (en) | 2010-03-16 |
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