JP2005276931A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP2005276931A
JP2005276931A JP2004085052A JP2004085052A JP2005276931A JP 2005276931 A JP2005276931 A JP 2005276931A JP 2004085052 A JP2004085052 A JP 2004085052A JP 2004085052 A JP2004085052 A JP 2004085052A JP 2005276931 A JP2005276931 A JP 2005276931A
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JP
Japan
Prior art keywords
trench
depth
semiconductor substrate
film
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004085052A
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English (en)
Japanese (ja)
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JP2005276931A5 (enExample
Inventor
Katsuya Ito
克也 伊藤
Hiroaki Tsunoda
弘昭 角田
Takanori Matsumoto
孝典 松本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2004085052A priority Critical patent/JP2005276931A/ja
Priority to US11/086,379 priority patent/US7265022B2/en
Publication of JP2005276931A publication Critical patent/JP2005276931A/ja
Publication of JP2005276931A5 publication Critical patent/JP2005276931A5/ja
Priority to US11/829,491 priority patent/US7572713B2/en
Priority to US11/829,521 priority patent/US7557422B2/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/40Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the peripheral circuit region
    • H10B41/42Simultaneous manufacture of periphery and memory cells
    • H10B41/43Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor
    • H10B41/48Simultaneous manufacture of periphery and memory cells comprising only one type of peripheral transistor with a tunnel dielectric layer also being used as part of the peripheral transistor
    • H10W10/0143
    • H10W10/0145
    • H10W10/17

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Element Separation (AREA)
  • Drying Of Semiconductors (AREA)
  • Non-Volatile Memory (AREA)
JP2004085052A 2004-03-23 2004-03-23 半導体装置およびその製造方法 Pending JP2005276931A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2004085052A JP2005276931A (ja) 2004-03-23 2004-03-23 半導体装置およびその製造方法
US11/086,379 US7265022B2 (en) 2004-03-23 2005-03-23 Method of fabricating semiconductor device with STI structure
US11/829,491 US7572713B2 (en) 2004-03-23 2007-07-27 Method of fabricating semiconductor device with STI structure
US11/829,521 US7557422B2 (en) 2004-03-23 2007-07-27 Semiconductor device with STI structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004085052A JP2005276931A (ja) 2004-03-23 2004-03-23 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2005276931A true JP2005276931A (ja) 2005-10-06
JP2005276931A5 JP2005276931A5 (enExample) 2006-03-16

Family

ID=35095431

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004085052A Pending JP2005276931A (ja) 2004-03-23 2004-03-23 半導体装置およびその製造方法

Country Status (2)

Country Link
US (3) US7265022B2 (enExample)
JP (1) JP2005276931A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009277774A (ja) * 2008-05-13 2009-11-26 Sharp Corp 半導体装置及びその製造方法
JP2014175521A (ja) * 2013-03-11 2014-09-22 Tokyo Electron Ltd プラズマエッチング方法
JP2014209622A (ja) * 2013-04-05 2014-11-06 ラム リサーチ コーポレーションLam Research Corporation 半導体製造用の内部プラズマグリッドの適用
US11171021B2 (en) 2013-04-05 2021-11-09 Lam Research Corporation Internal plasma grid for semiconductor fabrication
CN116230529B (zh) * 2023-05-06 2023-07-11 合肥晶合集成电路股份有限公司 一种半导体结构的制造方法

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005276931A (ja) * 2004-03-23 2005-10-06 Toshiba Corp 半導体装置およびその製造方法
KR100607326B1 (ko) * 2005-06-30 2006-08-01 주식회사 하이닉스반도체 반도체 소자의 제조방법
KR100649315B1 (ko) * 2005-09-20 2006-11-24 동부일렉트로닉스 주식회사 플래시 메모리의 소자분리막 제조 방법
KR100660551B1 (ko) * 2005-09-22 2006-12-22 삼성전자주식회사 불휘발성 메모리 소자 및 그 제조 방법
KR100772704B1 (ko) * 2005-09-29 2007-11-02 주식회사 하이닉스반도체 테이퍼형태의 트렌치를 갖는 반도체소자의 제조 방법
JP2007109966A (ja) * 2005-10-14 2007-04-26 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JP2009164558A (ja) * 2007-12-10 2009-07-23 Toyota Central R&D Labs Inc 半導体装置とその製造方法、並びにトレンチゲートの製造方法
US20100181639A1 (en) * 2009-01-19 2010-07-22 Vanguard International Semiconductor Corporation Semiconductor devices and fabrication methods thereof
JP4886801B2 (ja) * 2009-03-02 2012-02-29 株式会社東芝 半導体装置の製造方法
TWI462175B (zh) * 2011-09-07 2014-11-21 華亞科技股份有限公司 調整半導體基板槽深的製造方法
CN104517890A (zh) * 2013-09-30 2015-04-15 中芯国际集成电路制造(上海)有限公司 快闪存储器的浅沟槽隔离结构的形成方法
KR102459430B1 (ko) * 2018-01-08 2022-10-27 삼성전자주식회사 반도체 소자 및 그 제조방법

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943546A (ja) * 1982-09-06 1984-03-10 Hitachi Ltd 半導体集積回路装置およびその製法
JP2000323564A (ja) * 1999-05-10 2000-11-24 Nec Corp 半導体装置の製造方法
JP2002009178A (ja) * 2000-06-21 2002-01-11 Toshiba Corp 半導体装置の製造方法
JP2002043246A (ja) * 2000-07-27 2002-02-08 Nec Corp 半導体装置の製造方法
JP2003506866A (ja) * 1999-08-03 2003-02-18 アプライド マテリアルズ インコーポレイテッド エッチングプロセス用側壁ポリマー形成ガス添加物

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US5876792A (en) * 1988-03-14 1999-03-02 Nextec Applications, Inc. Methods and apparatus for controlled placement of a polymer composition into a web
US4861632A (en) * 1988-04-19 1989-08-29 Caggiano Michael A Laminated bag
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US5338340A (en) * 1990-02-10 1994-08-16 D-Mark, Inc. Filter and method of making same
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DE69516769T2 (de) * 1994-03-15 2000-12-28 National Semiconductor Corp., Sunnyvale Planarisierter isolationsgraben und feldoxid-isolationsstruktur
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US5819688A (en) * 1997-04-21 1998-10-13 Walker; Robert T. Pet animal odor adsorbing and liquid absorbing mat
US5961763A (en) * 1997-05-07 1999-10-05 Air Products And Chemicals, Inc. Sealable nonwoven web
US6569274B1 (en) * 1997-05-07 2003-05-27 Air Products And Chemicals, Inc. Sealable nonwoven web
US5846603A (en) * 1997-07-28 1998-12-08 Superior Fibers, Inc. Uniformly tacky filter media
US6440819B1 (en) * 1998-03-03 2002-08-27 Advanced Micro Devices, Inc. Method for differential trenching in conjunction with differential fieldox growth
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JP2000156402A (ja) 1998-09-18 2000-06-06 Sony Corp 半導体装置およびその製造方法
US6746974B1 (en) * 1999-03-10 2004-06-08 3M Innovative Properties Company Web material comprising a tackifier
US6219876B1 (en) * 1999-05-04 2001-04-24 Tech Mats, L.L.C. Floor mat
US6569494B1 (en) * 2000-05-09 2003-05-27 3M Innovative Properties Company Method and apparatus for making particle-embedded webs
JP3403372B2 (ja) * 2000-05-26 2003-05-06 松下電器産業株式会社 有機膜のエッチング方法、半導体装置の製造方法及びパターンの形成方法
JP2005276931A (ja) * 2004-03-23 2005-10-06 Toshiba Corp 半導体装置およびその製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5943546A (ja) * 1982-09-06 1984-03-10 Hitachi Ltd 半導体集積回路装置およびその製法
JP2000323564A (ja) * 1999-05-10 2000-11-24 Nec Corp 半導体装置の製造方法
JP2003506866A (ja) * 1999-08-03 2003-02-18 アプライド マテリアルズ インコーポレイテッド エッチングプロセス用側壁ポリマー形成ガス添加物
JP2002009178A (ja) * 2000-06-21 2002-01-11 Toshiba Corp 半導体装置の製造方法
JP2002043246A (ja) * 2000-07-27 2002-02-08 Nec Corp 半導体装置の製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009277774A (ja) * 2008-05-13 2009-11-26 Sharp Corp 半導体装置及びその製造方法
JP2014175521A (ja) * 2013-03-11 2014-09-22 Tokyo Electron Ltd プラズマエッチング方法
JP2014209622A (ja) * 2013-04-05 2014-11-06 ラム リサーチ コーポレーションLam Research Corporation 半導体製造用の内部プラズマグリッドの適用
US11171021B2 (en) 2013-04-05 2021-11-09 Lam Research Corporation Internal plasma grid for semiconductor fabrication
CN116230529B (zh) * 2023-05-06 2023-07-11 合肥晶合集成电路股份有限公司 一种半导体结构的制造方法

Also Published As

Publication number Publication date
US20070264823A1 (en) 2007-11-15
US7265022B2 (en) 2007-09-04
US7557422B2 (en) 2009-07-07
US20070262394A1 (en) 2007-11-15
US7572713B2 (en) 2009-08-11
US20050230780A1 (en) 2005-10-20

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