JP2004297086A - 高スイッチングスピードのための横方向パワーmosfet - Google Patents
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- 230000005684 electric field Effects 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 abstract description 10
- 229910044991 metal oxide Inorganic materials 0.000 abstract description 3
- 150000004706 metal oxides Chemical class 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 15
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 11
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- 230000015556 catabolic process Effects 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000011960 computer-aided design Methods 0.000 description 2
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- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
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- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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Abstract
【解決手段】 絶縁したゲートがコンタクトを介して複数の場所でゲート電極に接続されるようなゲート構造を有する、横方向パワー酸化金属半導体電界効果トランジスタ(MOSFET)が提供される。ソース電極は、第1及び第2セグメントを含む。第1セグメントは、ドレイン電極とゲート電極との間に挿入されて、フィールドプレートとして機能する。
【選択図】 図1C
Description
Claims (27)
- チャネル領域によって分離された引き延ばされたソース領域及びドレイン領域と、
前記チャネル領域の上に配置された引き延ばされたゲート構造と、
前記引き延ばされたドレイン領域の実質的に上に配置され、前記引き延ばされたドレイン領域と電気的に接続されている引き延ばされたドレイン電極と、
離間して設けられた第1及び第2のコンタクトを通って前記引き延ばされたゲート構造に接続されている引き延ばされたゲート電極と、
一般面内で前記引き延ばされたドレイン電極と前記引き延ばされたゲート電極との間に挿入された、前記ソース領域に電気的に接続する第1の引き延ばされたソース電極セグメントと、
前記引き延ばされたソース領域の実質的に上に配置された第2の引き延ばされたソース電極セグメントと、
を含んでいる電界効果トランジスタ。 - 前記引き延ばされたソース電極及びドレイン電極のそれぞれは、フィールドプレート部分を含んでいる請求項1に記載の電界効果トランジスタ。
- 前記第1及び第2の引き延ばされたソース電極セグメントは、一般面内で前記引き延ばされたゲート電極の対向する両側に配置されている、請求項1に記載の電界効果トランジスタ。
- 前記第1及び第2の引き延ばされたソース電極セグメントは、一般面内で前記ゲート電極を囲んでいる請求項1に記載の電界効果トランジスタ。
- 前記第2の引き延ばされたソース電極セグメントは、前記第1の引き延ばされたソース電極セグメントに比べて実質的に幅が広い、請求項1に記載の電界効果トランジスタ。
- 前記引き延ばされたソース領域及びドレイン領域は、交差指状に(interdigitated)配置されている、請求項1に記載の電界効果トランジスタ。
- チャネル領域によって分離された引き延ばされたソース拡散領域及びドレイン拡散領域と、
前記チャネル領域の上に配置された引き延ばされたゲート構造と、
前記引き延ばされたドレイン領域に接続する、前記引き延ばされたドレイン拡散領域の実質的に上に延在するドレイン電極と、
前記引き延ばされたゲート構造に接続する、前記引き延ばされたゲート構造の実質的に上に延在するゲート電極と、
前記ドレイン電極とゲート電極の間のキャパシタンスを低減するために前記引き延ばされたソース領域に接続された電極手段と、
を含んでいる横方向電界効果トランジスタ。 - 前記電極手段は、前記引き延ばされたソース領域の実質的に上に配置された第1の引き延ばされた金属のセグメントを含んでいる、請求項7に記載の横方向電界効果トランジスタ。
- 前記電極手段は、前記ゲート電極と前記ドレイン電極との間に挿入された第2の引き延ばされた金属のセグメントを含んでいる、請求項8に記載の横方向電界効果トランジスタ。
- 第1の引き延ばされた金属のセグメントは、ゲート電極の上に延在する横方向に引き延ばされた部分を有する金属のフィールドプレートを含んでいる、請求項8に記載の横方向電界効果トランジスタ。
- 前記ゲート電極の側方が、前記第1の引き延ばされた金属のセグメントの近傍に配置されている、請求項39に記載の横方向電界効果トランジスタ。
- 前記引き延ばされたソース及びドレインの拡散領域は、交差指状に(interdigitated)配置されている、請求項7に記載の横方向電界効果トランジスタ。
- 前記第1の引き延ばされた金属のセグメントは、前記第1の引き延ばされた金属のセグメントよりも幅が広い、請求項9に記載の横方向電界効果トランジスタ。
- 第2の引き延ばされた金属のセグメントは、前記ゲート電極及び前記ドレイン電極から等距離だけ隔てられている請求項9に記載の横方向電界効果トランジスタ。
- チャネル領域によって分離された引き延ばされたソース領域及びドレイン領域と、
前記チャネル領域の上に配置された絶縁されたゲートと、
前記ドレイン領域に接続するドレイン電極と、
絶縁されたゲートのコンタクトのない領域によって分離されている第1及び第2のコンタクト領域それぞれに位置する第1及び第2のコンタクトを通して絶縁されたゲートに接続するゲート電極と、
ソース領域に接続するソース電極であって、第1及び第2のセグメントを含み、前記第1のセグメントは前記ドレイン電極と前記ゲート電極との間に配置され、ドレイン電極、ソース電極、ゲート電極が一般平面に配置されるようにされた、ソース電極と、
を含む電界効果トランジスタ。 - 前記ソース電極の前記第2のセグメントは、実質的にソース領域の上に配置されている、請求項15に記載の電界効果トランジスタ。
- 前記ドレイン電極は実質的にドレイン領域の上に配置されているが、ソース領域にはオーバーラップしない、請求項15に記載の電界効果トランジスタ。
- ソース電極及びドレイン電極は、それぞれ、フィールドプレート部分を含んでいる、請求項16に記載の電界効果トランジスタ。
- 前記第1及び第2のセグメントは、前記ゲート電極の対向する両側に配置されている、請求項15に記載の電界効果トランジスタ。
- 第1及び第2のセグメントは、前記ゲート電極を囲んでいる請求項15に記載の電界効果トランジスタ。
- 第2のセグメントは、第1のセグメントよりも幅が広い請求項15に記載の電界効果トランジスタ。
- 前記ソース領域及びドレイン領域は、交差指状に(interdigitated)配置されている、請求項15に記載の電界効果トランジスタ。
- チャネル領域によって分離された引き延ばされたソース領域及びドレイン領域と、
前記チャネル領域の上に配置された絶縁されたゲートと、
前記ドレイン領域に接続されたドレイン電極と、
絶縁ゲートのコンタクトのない領域によって分離されている第1及び第2のコンタクト領域それぞれに位置する第1及び第2のコンタクトを通して絶縁されたゲートに接続するゲート電極と、
ソース領域に接続するソース電極であって、第1及び第2のセグメントを含み、前記第1のセグメントは前記ドレイン電極と前記ゲート電極との間に横方向に配置されたソース電極と、
を含む電界効果トランジスタ。 - 前記ソース電極の前記第2のセグメントは、実質的に前記ソース領域の上に配置されている請求項23に記載の電界効果トランジスタ。
- 前記ドレイン電極は、実質的に前記ドレイン電極の上に配置されているが、前記ソース領域とはオーバーラップしていない、請求項24に記載の電界効果トランジスタ。
- ソース電極及びドレイン電極は、それぞれ、フィールドプレート部分を含んでいる請求項25に記載の電界効果トランジスタ。
- 第1及び第2のセグメントは、前記ゲート電極の対向する両側に配置されている請求項23に記載の電界効果トランジスタ。
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Cited By (3)
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JP2003152178A (ja) * | 2001-10-29 | 2003-05-23 | Power Integrations Inc | 高スイッチングスピードのための横方向パワーmosfet |
JP2009501444A (ja) * | 2005-07-13 | 2009-01-15 | エヌエックスピー ビー ヴィ | Ldmosトランジスタ |
TWI584476B (zh) * | 2011-08-25 | 2017-05-21 | 聯華電子股份有限公司 | 高壓金氧半導體電晶體元件及其製作方法 |
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US7221011B2 (en) * | 2001-09-07 | 2007-05-22 | Power Integrations, Inc. | High-voltage vertical transistor with a multi-gradient drain doping profile |
US6573558B2 (en) | 2001-09-07 | 2003-06-03 | Power Integrations, Inc. | High-voltage vertical transistor with a multi-layered extended drain structure |
US7786533B2 (en) * | 2001-09-07 | 2010-08-31 | Power Integrations, Inc. | High-voltage vertical transistor with edge termination structure |
EP1408552A1 (en) * | 2002-10-09 | 2004-04-14 | STMicroelectronics S.r.l. | Integrated MOS semiconductor device with high performance and process of manufacturing the same |
US6900502B2 (en) | 2003-04-03 | 2005-05-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Strained channel on insulator device |
US6933562B1 (en) | 2003-06-27 | 2005-08-23 | National Semiconductor Corporation | Power transistor structure with non-uniform metal widths |
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Also Published As
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EP1306905B1 (en) | 2011-07-06 |
JP2010187015A (ja) | 2010-08-26 |
US20050077583A1 (en) | 2005-04-14 |
JP5306277B2 (ja) | 2013-10-02 |
EP1306905A3 (en) | 2008-06-04 |
US20030080388A1 (en) | 2003-05-01 |
US6825536B2 (en) | 2004-11-30 |
EP1530240A2 (en) | 2005-05-11 |
US6555883B1 (en) | 2003-04-29 |
EP1530240A3 (en) | 2008-06-04 |
US20030137016A1 (en) | 2003-07-24 |
EP1306905A2 (en) | 2003-05-02 |
ATE515802T1 (de) | 2011-07-15 |
JP2003152178A (ja) | 2003-05-23 |
US7115958B2 (en) | 2006-10-03 |
JP4879444B2 (ja) | 2012-02-22 |
JP4689977B2 (ja) | 2011-06-01 |
EP1530240B1 (en) | 2013-05-01 |
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