DE69839439D1 - MOS-Technologie-Leistungsanordnung mit hoher Integrationsdichte - Google Patents

MOS-Technologie-Leistungsanordnung mit hoher Integrationsdichte

Info

Publication number
DE69839439D1
DE69839439D1 DE69839439T DE69839439T DE69839439D1 DE 69839439 D1 DE69839439 D1 DE 69839439D1 DE 69839439 T DE69839439 T DE 69839439T DE 69839439 T DE69839439 T DE 69839439T DE 69839439 D1 DE69839439 D1 DE 69839439D1
Authority
DE
Germany
Prior art keywords
high integration
integration density
technology power
power arrangement
mos technology
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69839439T
Other languages
English (en)
Inventor
Angelo Magri'
Ferruccio Frisina
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69839439D1 publication Critical patent/DE69839439D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692—Surface layout
    • H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
DE69839439T 1998-05-26 1998-05-26 MOS-Technologie-Leistungsanordnung mit hoher Integrationsdichte Expired - Fee Related DE69839439D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP98830321A EP0961325B1 (de) 1998-05-26 1998-05-26 MOS-Technologie-Leistungsanordnung mit hoher Integrationsdichte

Publications (1)

Publication Number Publication Date
DE69839439D1 true DE69839439D1 (de) 2008-06-19

Family

ID=8236661

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69839439T Expired - Fee Related DE69839439D1 (de) 1998-05-26 1998-05-26 MOS-Technologie-Leistungsanordnung mit hoher Integrationsdichte

Country Status (4)

Country Link
US (1) US6492691B2 (de)
EP (1) EP0961325B1 (de)
JP (1) JP4550182B2 (de)
DE (1) DE69839439D1 (de)

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US6344379B1 (en) 1999-10-22 2002-02-05 Semiconductor Components Industries Llc Semiconductor device with an undulating base region and method therefor
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JP4534303B2 (ja) * 2000-04-27 2010-09-01 富士電機システムズ株式会社 横型超接合半導体素子
JP4845293B2 (ja) * 2000-08-30 2011-12-28 新電元工業株式会社 電界効果トランジスタ
US6555883B1 (en) * 2001-10-29 2003-04-29 Power Integrations, Inc. Lateral power MOSFET for high switching speeds
US7468536B2 (en) * 2007-02-16 2008-12-23 Power Integrations, Inc. Gate metal routing for transistor with checkerboarded layout
TWI413254B (zh) * 2007-05-23 2013-10-21 Fairchild Semiconductor 用於積體電路應用的低導通電阻金氧半導體電晶體
TWI523196B (zh) * 2012-02-24 2016-02-21 聯華電子股份有限公司 高壓金氧半導體電晶體元件及其佈局圖案
CN107710400A (zh) 2015-07-01 2018-02-16 松下知识产权经营株式会社 半导体装置
US9972681B2 (en) * 2016-08-30 2018-05-15 Power Integrations, Inc. High voltage vertical semiconductor device with multiple pillars in a racetrack arrangement

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Also Published As

Publication number Publication date
JP2000058829A (ja) 2000-02-25
EP0961325A1 (de) 1999-12-01
EP0961325B1 (de) 2008-05-07
JP4550182B2 (ja) 2010-09-22
US20020113276A1 (en) 2002-08-22
US6492691B2 (en) 2002-12-10

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