CN105742364A - 一种抑制有源沟道区光致漏电流产生的mos管及应用 - Google Patents
一种抑制有源沟道区光致漏电流产生的mos管及应用 Download PDFInfo
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Abstract
本发明公开一种抑制有源沟道区光致漏电流产生的MOS管及应用，其制备过程为：通过离子注入在衬底两端形成源极和漏极。在衬底上表面的中部制备栅氧化层，在栅氧化层上沉积多晶硅或金属形成栅极，在栅极、源极与漏极上方沉积隔离层，并在源极和漏极上方刻蚀出接触孔，以引出源极和漏极，在源极和漏极上方的接触孔上沉积金属，刻蚀漏极上的金属用于隔离开源极和漏极，而源极上的金属直接延伸覆盖过有源沟道区，起到遮挡光线的作用。本发明提出的MOS管有效的遮挡了其上方射入的光线，抑制了光致漏电流的产生，既改善了晶体管的关态特性，也提高了有源寻址驱动电路的工作性能。
Description
技术领域
本发明涉及光电子器件领域，更具体地，涉及一种抑制有源沟道区光致漏电流产生的MOS管及应用。
背景技术
可寻址驱动电路目前已应用于诸多方面。在寻址机制上，一般分为两种，即有源矩阵和无源矩阵。相比于无源矩阵，有源矩阵拥有更好的可控性，可减少串扰，能实现大规模及高分辨率的显示。并且还有能量利用率高，可为高质量显示实现更多的灰度的优点。有源矩阵显示目前已经发展了数十年，并且已有诸多应用，比如有源矩阵液晶显示，有源矩阵有机发光二极管显示，以及最近正在发展的有源矩阵发光二极管显示等。
有源驱动电路有许多种，其中常用的2T1C驱动电路如图1所示，包括寻址晶体管T1，驱动晶体管T2和一个存储电容。Vselect信号用来控制选通T1晶体管，当T1晶体管打开，Vdata信号被传输至T2晶体管的栅极，控制选通T2管。当T2管打开时，LED阳极即与VDD相连，从而能够正常工作，即发光。当选择信号经过后，T1晶体管关闭，但还需要LED继续发光，此时存储电容就用来保持A点的电位，以保证在一整个帧周期内，都能有足够的电流流经LED。但是当有环境光存在时，尤其当该电路被应用于本身就具有比较高的发光强度LED显示时，光线将在MOS管有源沟道区激发额外的电子空穴对，导致MOS管关闭时，依然存在一定量的反向漏电流。当该漏电流较大时，将严重影响存储电容保持电位的能力，从而减小了相应LED的发光时间及发光质量。同理，T2管的关态漏电流也将带来预期之外的不利效果。这些都将降低基于该种有源驱动的电路的LED，LCD及OLED显示，或光通信设备的应用质量和效果。
发明内容
本发明为克服上述现有技术所述的光照激发的光电流导致MOS管关态时的反向漏电流增加的现象，首先提供一种抑制有源沟道区光致漏电流产生的MOS管的制备方法。
本发明还提出一种抑制有源沟道区光致漏电流产生的MOS管。
本发明还提出一种应用该抑制有源沟道区光致漏电流产生的MOS管的有源寻址电路。
为解决上述技术问题，本发明的技术方案如下：
一种抑制有源沟道区光致漏电流产生的MOS管的制备方法，其制备过程为：通过离子注入在衬底两端形成源极和漏极，在衬底上表面的中部制备栅氧化层，在栅氧化层上沉积多晶硅或金属形成栅极，该制备过程还包括：在栅极、源极与漏极上方沉积隔离层，并在源极和漏极上方刻蚀出接触孔，以引出源极和漏极，在源极和漏极上方的接触孔中沉积金属，刻蚀漏极上接触孔中的金属用于隔离开源极和漏极，而源极上接触中的金属直接延伸覆盖过有源沟道区，起到遮挡光线的作用。
优选的，所述衬底为硅基材料衬底，玻璃石英衬底或氮化物衬底。
优选的，所述栅氧化层为SiO2、HfO、Al2O3或ZrO氧化物，隔离层为SiO2或SiNx隔离层。
一种抑制有源沟道区光致漏电流产生的MOS管，包括衬底，衬底上表面的中部沉积有栅绝缘层，在栅绝缘层上有多晶硅或金属形成栅极，通过离子注入在衬底两端形成的源极和漏极，在栅极、源极与漏极上方沉积有隔离层，源极和漏极上方的隔离层刻蚀有用于引出源极和漏极的接触孔，在源极和漏极上的接触孔中沉积有金属，漏极上接触孔中金属刻蚀有用于隔离源极和漏极的隔离缺口，源极上的金属直接延伸覆盖过有源沟道区。
优选的，所述衬底为硅基材料衬底，玻璃石英衬底或氮化物衬底。
优选的，所述栅氧化层为SiO2、HfO、Al2O3或ZrO氧化物，隔离层为SiO2或SiNx隔离层。
一种应用所述抑制有源沟道区光致漏电流产生的MOS管的有源寻址电路，所述有源寻址电路中的MOS管为抑制有源沟道区光致漏电流产生的MOS管。
与现有技术相比，本发明技术方案的有益效果是：本发明提出的MOS管有效的遮挡了光线，抑制了光电流的产生，既改善了晶体管的关态特性，也提高了有源寻址驱动电路的工作性能。
附图说明
图1为2T1C有源驱动电路示意图。
图2为对晶体管不同条件下转移特性曲线的对比图。
图3为传统MOS管的截面示意图。
图4为本发明所述MOS管的三维结构图。
图5为本发明所述MOS管的平面结构示意图。
图6为对本发明MOS管进行仿真的仿真基本参数设置示意图。
图7为基于本发明的不同X长度的PMOS管的转移特性曲线图。
图8为自动消除光致漏电流的有源寻址电路的PCB版图。
图9为实施例有源驱动电路中存储电容充放电对比图。
图10为四组不同X长度和梳状栅个数的MOS管进行的PCB版图。
图11为基于图10的转移特性曲线的对比示意图。
具体实施方式
附图仅用于示例性说明，不能理解为对本专利的限制；为了更好说明本实施例，附图某些部件会有省略、放大或缩小，并不代表实际产品的尺寸；
对于本领域技术人员来说，附图中某些公知结构及其说明可能省略是可以理解的。下面结合附图和实施例对本发明的技术方案做进一步的说明。
针对现有技术中提到的光照激发的光电流导致MOS管关态时的反向漏电流增加的现象，本发明提出从MOS管源极引伸出一定长度金属，覆盖在MOS管有源沟道区上面，从而起到避免光线直射沟道的效果。
该种设计有效的遮挡了光线，抑制了光电流的产生，既改善了晶体管的关态特性，也提高了有源寻址驱动电路的工作性能。且金属覆盖层越长，抑制效果越好，但是却会降低器件的沟道宽长比，从而降低器件开态时的特性。所以应在覆盖层和沟道宽长比之间做出合适的取舍，从而达到最优化设计。
经过大量的实验及研究发现，光照会影响MOS晶体管性能：
光照会在MOS晶体管有源沟道区激发出额外的电子空穴对，从而使晶体管在关闭状态时，也存在着较大的反向漏电流。我们通过软件仿真验证了该想法。
我们分别测试了无光条件下，以及蓝光，红光，绿光照射时，沟道长度为2um的PMOS晶体管的Ids。光照功率为1w，并设置Vds为-1V，栅极电压由-5V逐渐增加到5V，阈值电压为-0.5V，即当其大于-0.5V时即为关闭状态。
图2则为对晶体管不同条件下转移特性曲线的对比，由此可看出MOS管在光照条件下性能的差别。从图中可清晰看出，有光条件下关态的漏电流要比无光条件时大几个数量级，可见光照对MOS管性能的影响还是非常大的。由此证明了我们的想法，光照条件确实会对MOS晶体管关闭状态时的漏电流有巨大影响。
基于上述发现，本发明设计了一种能遮挡光照，抑制有源沟道区光致漏电流产生的新型MOS管结构。
传统MOS管是利用掺杂工艺在硅衬底两端生成源极与漏极，并通过沉积金属以及适当的刻蚀将这两极引出。之后，在有源沟道区之上沉积栅氧化层，再将多晶硅沉积其上形成栅极。截面图如图3所示。
而本发明所提出的新型结构与传统的主要区别是将源极的金属部分延伸一定长度，覆盖在有源沟道区上面，从而避免了有源沟道区直接暴露在光照下而产生多余的光电流。具体做法如下：
一种抑制有源沟道区光致漏电流产生的MOS管制备方法，其制备过程为：通过离子注入在衬底两端形成源极和漏极，在衬底上表面的中部制备栅氧化层，在栅氧化层上沉积多晶硅或金属形成栅极，在栅极、源极与漏极上方沉积隔离层，并在源极和漏极上方刻蚀出接触孔，以引出源极和漏极，在源极和漏极上方的接触孔上沉积金属，刻蚀漏极上的金属用于隔离开源极和漏极，而源极上的金属直接延伸覆盖过有源沟道区，起到遮挡光线的作用。
采用上述制备方法制备得到的一种抑制有源沟道区光致漏电流产生的MOS管，包括衬底，衬底上表面的中部沉积有栅绝缘层，在栅绝缘层上有多晶硅或金属形成栅极，通过离子注入在衬底两端形成的源极和漏极，在栅极、源极与漏极上方沉积有隔离层，源极和漏极上方的隔离层刻蚀有用于引出源极和漏极的接触孔，在源极和漏极上的接触孔中沉积有金属，漏极上接触孔中金属刻蚀有用于隔离源极和漏极的隔离缺口，源极上的金属直接延伸覆盖过有源沟道区。
这样的结构既不会加入其它多余材料而引起无法预期的其他性能改变，也能达到良好的遮光效果，且简便易行，便于实现。具体三维、平面结构图如图4、5所示，其中箭头表示光照方向，X表示金属覆盖层的长度。
为证明该该MOS管结构的有效性，本实施例用软件进行仿真，仿真的基本参数如图6所示。采用晶体管为硅衬底，磷掺杂的PMOS，并通过半导体工艺对其沉积SiO2层和金属部分。仿真时，VGS从-5V逐渐增加至5V，VDS设置为-1V，并使用1w功率，波长为625nm的光照对此PMOS晶体管进行光照。该PMOS管的转移特性曲线如图7所示。
其中，MCF(MetalCoverFactor)为金属覆盖层的长度与沟道长度的比值，即：
该参数作为一个更具有相对借鉴意义的参考指数，更形象的表示出覆盖层长度与有源沟道长度的关系。从图7中可以看出，无光条件下，漏电流大小为2.5×10-13A，有光照却无金属覆盖层时(MCF＝0％)，漏电流约为1×10-8A，增加了几个数量级。而当有一定长度的金属覆盖层后，光照下的激发的光电流有明显的减少，且MCF指数越高，光电流抑制效果越好。说明本发明确实能有有效的消除光电流的影响，提高晶体管性能。
本实施例中还设计了一种可以自动消除光致漏电流的有源寻址电路。
本实施例是基于背景部分已介绍了传统2T1C电路，在该电路中T1为寻址晶体管，T2为驱动晶体管，C为存储电容。Vselect为选择信号，控制T1晶体管开关，Vdata为数据信号，承载着控制LED亮灭的信号。在本实例中，基于所提出的新的MOS设计了一种可以自动消除光致漏电流的有源寻址电路。其版图如图8所示：
图8已简洁的显示了2T1C电路版图。对于晶体管T2，①处细长区域即为梳状栅，其下方的②处部分为金属覆盖层。同理可理解T1晶体管的结构。而在该种电路结构中，存储电容由两部分组成。第一部分为源极金属和多晶硅之间夹着SiO2钝化层构成。第二部分为多晶硅与有源单晶硅层之间夹着栅极绝缘物(通常为SiO2或者高k材料)构成。LED像素接与输出部分即可。
该种电路结构能成功的消除光电流影响，且结构简便易实现。下面我们将通过计算与对比，来展示该新型电路对电容保持电位能力的增强效果。
我们分别从两方面进行讨论。写入时期代表着T1晶体管被选通，数据信号通过T1到达T2栅极的时期，此时对于电容来说即为充电部分。保持时期代表着选择信号已经通过，T1晶体管关闭但仍需LED发光，此时主要靠电容保持的电位来驱动T2晶体管。若存在漏电流，则电容将表现为逐渐放电。
令VD代表Vdata。当像素被选中时，写入电压和保持电压满足：
其中，τon＝RonCholdingτ=offRoffCholding
Ron和Roff为T1晶体管分别在打开和关闭状态时的沟道电阻。而电路正常运行要求：
其中，Vsignal即为A点的电压。Twriting和Tholding分别是写入期时间和保持期时间。这意味着，写入期时间越短，保持期时间越长，该驱动电路的效果越好。
我们通过实验测得有金属覆盖层以及无金属覆盖层的晶体管开态电流Ids分别是：2.75×10-5A和3.11×10-5A,而关态电流Ids则是：3.43×10-13A和6.94×10-9A，实验所用的总电容为15.6pf。最终，应用该设计前后的存储电容充放电对比为图9所示。
由图9可以看出，金属覆盖层的设计对充电时间的影响并不大，可能会引起几个us的延迟。但是在MOS管关闭状态时，加入金属覆盖层后明显能使存储电容的电位保持时间更长，即大于40ms。若无金属覆盖层，该电位只能保持几个ms，远远不能达到维持LED在整个周期内正常工作的要求。由此说明，该设计确实能增强电路中存储电容保持电位的能力，从而提高电路的工作质量等。
本发明提出了能消除光电流影响的新型MOS管结构和电路结构。由于金属覆盖层越长，抑制效果越好，但是因此器件漏极与栅极之间的距离也越大。尤其当版图的面积有限，这种结构将会影响原有的布局，甚至将直接影响器件的宽长比而导致其他性能的下降。所以应在覆盖层和沟道宽长比之间做出合适的取舍，从而达到最优化设计。
定义源极至漏极断口的距离为覆盖层长度(X部分)，通过分析仿真来验证不同覆盖层长度的影响。
本发明通过设计多组不同X长度和梳状栅个数的MOS管进行对比，来达到最优化结果，以如图10，表1几组数据为例，最终测得梳状栅个数为9，金属覆盖层长度为5um时，器件性能最好。
表1
其转移特性曲线的对比如图11所示。
由此看以看出梳状栅个数为9，金属覆盖层长度为5um时，该结构的工作性能最好。
采用本方案所示结构的晶体管，可以有效的避免有源沟道区直接暴露在光线下，消除不必要的光电流。而以此为基础的源寻址电路结构也可有效的消除光致漏电流现象。此时，MOS晶体管将有更好的关态特性，驱动电路中存储电容保持电位的效果也会更好，电路性能更加稳定，LED也将呈现出更好的工作质量。
显然，本发明的上述实施例仅仅是为清楚地说明本发明所作的举例，而并非是对本发明的实施方式的限定。对于所属领域的普通技术人员来说，在上述说明的基础上还可以做出其它不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明权利要求的保护范围之内。
Claims (7)
1.一种抑制有源沟道区光致漏电流产生的MOS管的制备方法，其制备过程为：通过离子注入在衬底两端形成源极和漏极，在衬底上表面的中部制备栅氧化层，在栅氧化层上沉积多晶硅或金属形成栅极，其特征在于，该制备过程还包括：在栅极、源极与漏极上方沉积隔离层，并在源极和漏极上方刻蚀出接触孔，以引出源极和漏极，在源极和漏极上方的接触孔中沉积金属，刻蚀漏极上接触孔中的金属用于隔离开源极和漏极，而源极上接触中的金属直接延伸覆盖过有源沟道区，起到遮挡光线的作用。
2.根据权利要求1所述的抑制有源沟道区光致漏电流产生的MOS管制备方法，其特征在于，所述衬底为硅基材料衬底，玻璃石英衬底或氮化物衬底。
3.根据权利要求1所述的抑制有源沟道区光致漏电流产生的MOS管制备方法，其特征在于，所述栅氧化层为SiO2、HfO、Al2O3或ZrO氧化物，隔离层为SiO2或SiNx隔离层。
4.一种抑制有源沟道区光致漏电流产生的MOS管，包括衬底，衬底上表面的中部沉积有栅绝缘层，在栅绝缘层上有多晶硅或金属形成栅极，通过离子注入在衬底两端形成的源极和漏极，其特征在于，在栅极、源极与漏极上方沉积有隔离层，源极和漏极上方的隔离层刻蚀有用于引出源极和漏极的接触孔，在源极和漏极上的接触孔中沉积有金属，漏极上接触孔中金属刻蚀有用于隔离源极和漏极的隔离缺口，源极上的金属直接延伸覆盖过有源沟道区。
5.根据权利要求4所述的抑制有源沟道区光致漏电流产生的MOS管，其特征在于，所述衬底为硅基材料衬底，玻璃石英衬底或氮化物衬底。
6.根据权利要求4所述的抑制有源沟道区光致漏电流产生的MOS管，其特征在于，所述栅氧化层为SiO2、HfO、Al2O3或ZrO氧化物，隔离层为SiO2或SiNx隔离层。
7.一种应用权利要求4至6任一项所述抑制有源沟道区光致漏电流产生的MOS管的有源寻址电路，其特征在于，所述有源寻址电路中的MOS管为抑制有源沟道区光致漏电流产生的MOS管。
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