CN106952928B - 一种tft背板的制作方法及tft背板 - Google Patents
一种tft背板的制作方法及tft背板 Download PDFInfo
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Abstract
本申请公开了一种TFT背板的制作方法及TFT背板。该方法包括:准备基板;在基板上依次形成第一活性区、第一氧化物层、氮化物层、及相互独立的第一、第二栅极;去除第一、第二栅极覆盖不到的氮化物层;沉积第二绝缘层;在第二栅极上方的第二绝缘层上形成与第一活性区的材质不同的第二活性区;分别形成第一、第二源电极、第一、第二漏电极。该方法能够提高该TFT背板的性能。
Description
技术领域
本申请涉及显示技术领域,特别是涉及一种TFT背板的制作方法及TFT背板。
背景技术
OLED(Organic Light-Emitting Diode,有机发光二极管)显示器,也称为有机电致发光显示器,它是一种新兴的平板显示装置,由于其具有制备工艺简单、成本低、功耗低、发光亮度高、工作温度适应范围广、体积轻薄、响应速度快,而且易于实现彩色显示和大屏幕显示、易于实现和集成电路驱动器相匹配、易于实现柔性显示等优点,因而具有广阔的应用前景。OLED按照驱动方式可以分为无源矩阵型OLED和有源矩阵型OLED(Active MatrixOLED,AMOLED)两大类。
薄膜晶体管(Thin Film Transistor,简称TFT)是AMOLED显示装置中的主要驱动元件,直接关系到高性能平板显示装置的发展方向。现有的TFT背板具有多种结构,制备相应结构的薄膜晶体管的有源层的材料也具有多种,例如,在同一TFT背板中可同时采用具有电子迁移率高、电流输出均一性好的多晶硅材料及具有开关速度快和漏电流低的非多晶硅材料分别制作用于驱动的TFT及用于开关的TFT,该TFT背板可根据不同功能需求选择使用不同的TFT。
但本申请的发明人在长期的研发中发现,在目前现有技术中,为提高驱动TFT的可靠性及电性性能,会将该TFT的栅极绝缘层采用氧化物+氮化物的结构,但是在该氮化物沉积以后的该TFT的高温制程中,该氮化物会扩散,会污染开关TFT的非多晶硅材质,从而影响非多晶硅材质的开关TFT的性能,降低整个TFT背板的性能。
发明内容
本申请主要解决的技术问题是提供一种TFT背板的制作方法及TFT背板,以减少驱动TFT的氮化物层对开关TFT性能的影响,从而提升该TFT背板的性能。
为解决上述技术问题,本申请采用的一个技术方案是:提供一种TFT背板的制作方法。所述方法包括:准备基板;在所述基板上形成第一活性区;其中,所述第一活性区为多晶硅材质;在所述第一活性区上及未被所述第一活性区覆盖的所述基板上依次沉积氧化物层及氮化物层作为第一绝缘层;在所述氮化物层上分别形成相互独立的第一栅极及第二栅极,且所述第一栅极位于所述第一活性区上方;去除所述第一、第二栅极覆盖不到的所述氮化物层;在所述第一、第二栅极及未被所述氮化物层覆盖的所述第一氧化物层上沉积第二绝缘层;在所述第二栅极上方的所述第二绝缘层上形成第二活性区;其中,所述第二活性区与所述第一活性区的材质不同;为所述第一活性区及所述第二活性区分别制备第一源极、第一漏极及第二源极、第二漏极。
为解决上述技术问题,本申请采用的另一个技术方案是:提供一种TFT背板。所述TFT背板包括:基板;第一活性区,设置于所述基板上;其中,所述第一活性区为多晶硅材质;第一绝缘层,设置于所述第一活性区上及未被所述第一活性区覆盖的所述基板上;其中,所述第一绝缘层包括依次沉积的氧化物层及氮化物层;且所述氮化物层包括相互独立的第一氮化物层及第二氮化物层;第一、第二栅极,分别设置于所述第一、第二氮化物层上;所述氮化物层只存在于所述第一、第二栅极与所述氧化物层之间;其中,所述第一、第二栅极覆盖不到的所述氮化物层被去除;第二绝缘层,设置于所述第一、第二栅极及未被所述氮化物层覆盖的所述氧化物层上;第二活性区,设置于所述第二栅极上方的所述第二绝缘层上;其中,所述第二活性区与所述第一活性区的材质不同;第一源电极、第一漏电极,分别接触所述第一活性区的两端;第二源电极、第二漏电极,分别接触所述第二活性区的两端。
本申请实施例的有益效果是:区别于现有技术,本申请实施例在基板上形成第一活性区,该第一活性区为多晶硅材质;依次沉积第一氧化物层及氮化物层作为第一绝缘层;去除氧化物层上的第一、第二栅极覆盖不到的氮化物层,然后在第二栅极上方的第二绝缘层上形成第二活性区。可知,未被去除的氮化物层只存在于氧化物层与第一、第二栅极之间,且该未被去除的氮化物在TFT基板的后续高温制程中的扩散(氮化物在高温下,会向上扩散)会受到第一、第二栅极的阻挡,因此,本申请实施例能明显减少驱动TFT的该氮化物层对开关TFT的该第二活性区的污染,从而减少其对开关TFT性能的影响,进而提高该TFT背板性能。
附图说明
图1是本申请TFT背板的制作方法一实施例的流程示意图;
图2A是图1实施例中基板的结构示意图;
图2B是图1实施例中形成第一活性区后TFT背板的结构示意图;
图2C是图1实施例中形成第一绝缘层后TFT背板的结构示意图;
图2D是图1实施例中形成第一、第二栅极后TFT背板的结构示意图;
图2E是图1实施例中去除未被第一、第二栅极覆盖的氮化物层后TFT背板的结构示意图;
图2F是图1实施例中形成第二绝缘层后TFT背板的结构示意图;
图2G是图1实施例中形成第二活性区后TFT背板的结构示意图;
图2H是图1实施例中形成第一、第二源极及第一、第二漏极后TFT背板的结构示意图;
图3是本申请TFT背板制作过程中TFT背板另一实施例的结构示意图;
图4是本申请TFT背板制作过程中TFT背板又一实施例的结构示意图;
图5是本申请TFT背板一实施例的结构示意图。
具体实施方式
一并参阅图1、图2A-图2H,图1是本申请TFT背板的制作方法一实施例的流程示意图;图2A-图2H是图1实施例TFT背板制作过程中TFT背板的结构示意图。需要注意的是,在本实施例中,第一活性区202、第一栅极205、第一源极209及第一漏极230对应于驱动TFT,相应地,第二活性区208、第二栅极206、第二源极231及第二漏极232对应于开关TFT。本实施例包括具体以下步骤:
步骤101:准备基板201(参阅图2A)。
在一个应用场景中,本实施例需对基板201进行清洗及预烘烤,清洗的目的在于去除基板201上的脏点、油污及纤维等以达到涂胶的最佳效果;预烘烤目的在于使该涂胶的均匀性更佳。
本实施例的基板201可以是但不局限于透明玻璃、透明树脂等。
步骤102:在基板201上形成第一活性区202(参阅图2B);其中,第一活性区202为多晶硅材质。
本实施例的第一活性区202包括源区、漏区及导电沟道(未标出)。在一个应用场景中,本实施例采用先沉积非晶硅,然后对该非晶硅进行加热、快速退火或激光结晶,最后经黄光刻蚀的方法形成第一活性区202。
步骤103:在第一活性区202上及未被第一活性区202覆盖的基板201上依次沉积氧化物层203及氮化物层204作为第一绝缘层(参阅图2C)。
可选地,本实施的氮化物为氮化硅;当然在其它实施例中,可以采用氮化硼等其它氮化物代替氮化硅。
步骤104:在氮化物层204上分别形成相互独立的第一栅极205及第二栅极206,且第一栅极205位于第一活性区202上方(参阅图2D)。
本实施例的第一栅极205、第二栅极206为金属材料,通过黄光刻蚀而成,该金属可以是铜、铝、钼等。当然,在其它实施例中,第一栅极205、第二栅极206可以是其它金属材料或其它非金属材料。且本申请实施例不限定第一栅极205与第二栅极206的材料是否相同。
步骤105:去除第一栅极205与第二栅极206覆盖不到的氮化物层204(参阅图2E)。
可选地,本实施例以第一栅极205与第二栅极206为自对准(即自对准工艺),并采用干蚀法去除未被第一栅极205与第二栅极206覆盖的氮化物层204。当然,在其它实施例中,还可以采用铝栅等工艺替代自对准工艺和/或采用湿刻法替代干蚀法。
自对准工艺使得栅与源和漏的覆盖由杂质侧向扩散完成,比铝栅工艺的覆盖电容要小很多。此外,在铝栅工艺中,即使铝栅电极比沟道短,也可增加一步离子注入工艺填充栅区旁的未衔接部分,实现自对准,借以减小寄生电容,可提高TFT的开关速度和工作频率,同时提高电路的集成度。
此步骤主要是减少第一栅极205与第二栅极206覆盖不到的氮化物层204在TFT背板后续高温制成中向上扩散而对开关TFT的非多晶硅的第二活性区208(后续介绍)的污染。而被第一栅极205与第二栅极206覆盖的氮化物层204的扩散会被第一栅极205与第二栅极206阻挡,基本不会对第二活性区208造成污染。
步骤106:在第一栅极205与第二栅极206及未被氮化物层204覆盖的氧化物层203上沉积第二绝缘层207(参阅图2F)。
在一个应用场景中,第二绝缘层207为二氧化硅。
步骤107:在第二栅极206上方的第二绝缘层207上形成第二活性区208(参阅图2G);其中,第二活性区208与第一活性区202的材质不同。
可选地,本实施例的第二活性区208为氧化物材质,以提高开关TFT的开关速度和降低其漏电流。该氧化物可以是但不局限于铟镓锌氧化物、铟锡锌氧化物等。当然,在其它实施例中,第二活性区208可以是非氧化物。
步骤108:为第一活性区202及第二活性区208分别制备第一源极209、第一漏极230及第二源极231、第二漏极232(参阅图2H)。
具体地,本实施例的第一源极209、第一漏极230及第二源极231、第二漏极232的制备方法步骤包括:在第一活性区202上方,对第二绝缘层207挖孔,并形成第一、第二电极孔;其中,该第一、第二电极孔均贯穿于整个第二绝缘层207;沉积金属层并对其进行刻蚀,以在第二绝缘层207上及该第一、第二电极孔中形成第一源极209及第一漏230极,且第一源极209及第一漏极230分别通过该第一、第二电极孔与第一活性区202两端接触,可以理解为分别与位于第一活性区202两端的源区及漏区接触;同时可以在第二活性区208两端上分别形成第二源极231及第二漏232极。
区别于现有技术,本实施例的未被去除的氮化物层只存在于氧化物层与第一、第二栅极之间,且该未被去除的氮化物在TFT基板的后续高温制程中的扩散会受到第一、第二栅极的阻挡,因此,本申请实施例能明显减少作为驱动TFT的氮化物层对开关TFT的第二活性区的污染,从而减少其对开关TFT性能的影响,进而提高该TFT背板性能。
可选地,参阅图3,图3是本申请TFT背板制作过程中TFT背板另一实施例的结构示意图。本实施例在准备基板301之后,在基板301上形成第一活性区302之前,在基板301上形成缓冲层303,即在基板301与第一活性区302及第一绝缘层304之间设置缓冲层303,以改善制备第一活性区302时的漏电等问题,从而进一步提升TFT基板的性能。在一个应用场景中,缓冲层303包括氮化硅层和氧化硅层;当然,在其它应用场景中,缓冲层303也可以只包括氮化硅层或氧化硅层。
可选地,参阅图4,图4是本申请TFT背板制作过程中TFT背板又一实施例的结构示意图本实施例可采用下述方法替代图1实施例的步骤108。具体地,在第二栅极401上方的第二绝缘层402上形成第二活性区403之后:在第二活性区403上及未被第二活性区403覆盖的第二绝缘层402上沉积刻蚀阻挡层404;相应地,形成第一源极405、第一漏极406及第二源极407、第二漏极408方法包括:在第一活性区410上方,对刻蚀阻挡层404及第二绝缘层402挖孔,并形成第一、第二电极孔;其中,该第一、第二电极孔均贯穿于整个刻蚀阻挡层404及第二绝缘层402,沉积金属层并对其进行刻蚀,以在刻蚀阻挡层404、第二绝缘层402上及该第一、第二电极孔中形成第一源极405及第一漏极406,且第一源极407及第一漏极408分别通过该第一、第二电极孔与第一活性区409两端接触。在第二活性区403的两端的上方,对刻蚀阻挡层404进行挖孔,并形成第三、第四电极孔,且贯穿刻蚀阻挡层404位于第二活性区403上的部分,沉积金属层并对其进行刻蚀,以在刻蚀阻挡层404上及该第三、第四电极孔中形成第二源极407及第二漏极408,且第二源极407及第二漏极408分别通过该第三、第四电极孔与第二活性区403的两端接触。
当然,本实施例的TFT基板的制作流程还包括一些必须的步骤,如钝化层、平坦层、导电层、像素定义层及像素电极的制备等,因这些步骤不是本申请的发明点,这里不进行详细叙述。
参阅图5,图5是本申请TFT背板一实施例的结构示意图。本实施例包括:基板501;设置于基板501上的第一活性区502;其中,第一活性区502为多晶硅材质;设置于第一活性区502上及未被第一活性区502覆盖的基板501上的第一绝缘层503;其中,第一绝缘层503包括依次沉积的氧化物层504及氮化物层;且该氮化物层包括相互独立的第一氮化物层505及第二氮化物层506;分别设置于第一氮化物层505及第二氮化物层506上的第一栅极507、第二栅极508;该氮化物层只存在于第一栅极507、第二栅极508与氧化物层504之间;设置于第一栅极507、第二栅极508及未被第一氮化物层505及第二氮化物层506覆盖的氧化物层504上第二绝缘层509;设置于第二栅极508上方的第二绝缘层509上的第二活性区510;其中,第二活性区510与第一活性区502的材质不同;分别连接第一活性区502两端的第一源极511及第一漏极512;分别连接第二活性区510两端的第二源极513、第二漏极514。
区别于现有技术,本实施例驱动TFT的氮化物层只存在于氧化物层与第一、第二栅极之间,且该未被去除的氮化物在TFT基板的后续高温制程中的扩散会受到第一、第二栅极的阻挡,因此,本申请实施例能明显减少作为驱动TFT的氮化物层对开关TFT的第二活性区的污染,从而减少其对开关TFT性能的影响,进而提高该TFT背板性能。
可选地,本实施例的第二活性区510为氧化物材质,以提高开关TFT的开关速度和降低其漏电流。该氧化物可以是但不局限于铟镓锌氧化物、铟锡锌氧化物等。当然,在其它实施例中,第二活性区208可以是非氧化物。
可选地,本实施例以第一栅极507与第二栅极508为自对准(及自对准工艺),并采用干蚀法去除未被第一栅极507与第二栅极508覆盖的氮化物层505及506。当然,在其它实施例中,还可以采用铝栅等工艺替代自对准工艺和/或采用湿刻法替代干蚀法。
可选地,本实施例的氮化物为氮化硅;当然在其它实施例中,可以采用氮化硼等其它氮化物代替氮化硅。
可选地,本实施例还包括:设置于501基板与第一活性区间502的缓冲层515,以改善制备第一活性区502时的漏电等问题,从而进一步提升TFT基板的性能。在一个应用场景中,缓冲层515包括氮化硅层和氧化硅层;当然,在其它应用场景中,缓冲层515也可以只包括氮化硅层或氧化硅层;或采用其它材质替代氮化硅和/或氧化硅。
可选地,本实施例还包括设置于第二绝缘层509上的刻蚀阻挡层516,为实现第二源极513及第二漏极514的非背沟道刻蚀提供支持。
当然,本实施例的TF基板还包括一些必须的步骤,如钝化层、平坦层、导电层、像素定义层及像素电极的制备等,因这些步骤不是本申请的发明点,这里不进行详细叙述。
需要注意的是,本申请实施例的第一源极、第一漏极、第二源极及第二漏极可以是铜、铝、钼等金属。当然,还可以采用其它金属材料或其它非金属材料代替这些金属。且本申请实施例不限定第一源极、第一漏极、第二源极、第二漏极、第一栅极及第二栅极的材料是否相同。
以上所述仅为本申请的实施方式,并非因此限制本申请的专利范围,凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本申请的专利保护范围内。
Claims (10)
1.一种TFT背板的制作方法,其特征在于,包括:
准备基板;
在所述基板上形成第一活性区;其中,所述第一活性区为多晶硅材质;
在所述第一活性区上及未被所述第一活性区覆盖的所述基板上依次沉积氧化物层及氮化物层作为第一绝缘层;
在所述氮化物层上分别形成相互独立的第一栅极及第二栅极,且所述第一栅极位于所述第一活性区上方;
去除所述第一、第二栅极覆盖不到的所述氮化物层;
在所述第一、第二栅极及未被所述氮化物层覆盖的所述氧化物层上沉积第二绝缘层;
在所述第二栅极上方的所述第二绝缘层上形成第二活性区;其中,所述第二活性区与所述第一活性区的材质不同;
为所述第一活性区及所述第二活性区分别制备第一源极、第一漏极及第二源极、第二漏极。
2.根据权利要求1所述的方法,其特征在于,
所述去除所述第一、第二栅极覆盖不到的所述氮化物层包括:以所述第一、第二栅极为自对准,利用干蚀法去除所述未被所述第一、第二栅极覆盖的氮化物层。
3.根据权利要求1所述的方法,其特征在于,
所述第二活性区为氧化物材质。
4.根据权利要求1所述的方法,其特征在于,
在所述准备基板之后,在所述基板上形成第一活性区之前还包括:
形成缓冲层;其中,所述缓冲层包括氮化硅层和/或氧化硅层。
5.根据权利要求1所述的方法,其特征在于,
所述氮化物为SiN。
6.一种TFT背板,其特征在于,包括:
基板;
第一活性区,设置于所述基板上;其中,所述第一活性区为多晶硅材质;
第一绝缘层,设置于所述第一活性区上及未被所述第一活性区覆盖的所述基板上;其中,所述第一绝缘层包括依次沉积的氧化物层及氮化物层;且所述氮化物层包括相互独立的第一氮化物层及第二氮化物层;
第一、第二栅极,分别设置于所述第一、第二氮化物层上;所述氮化物层只存在于所述第一、第二栅极与所述氧化物层之间;其中,所述第一、第二栅极覆盖不到的所述氮化物层被去除;
第二绝缘层,设置于所述第一、第二栅极及未被所述氮化物层覆盖的所述氧化物层上;
第二活性区,设置于所述第二栅极上方的所述第二绝缘层上;其中,所述第二活性区与所述第一活性区的材质不同;
第一源电极、第一漏电极,分别接触所述第一活性区的两端;
第二源电极、第二漏电极,分别接触所述第二活性区的两端。
7.根据权利要求6所述的TFT背板,其特征在于,
所述第二活性区为氧化物材质。
8.根据权利要求6所述的TFT背板,其特征在于,
所述第一、第二氮化物层是以所述第一、第二栅极为自对准,利用干蚀法去除所述未被所述第一、第二栅极覆盖的氮化物层而形成的。
9.根据权利要求6所述的TFT背板,其特征在于,
还包括:设置于所述基板与所述第一活性区间的缓冲层;其中,所述缓冲层包括氮化硅层和/或氧化硅层。
10.根据权利要求6所述的TFT背板,其特征在于,
所述氮化物为SiN。
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0837307A (ja) * | 1994-05-20 | 1996-02-06 | Sanyo Electric Co Ltd | 半導体装置の製造方法および液晶ディスプレイ |
CN103000632A (zh) * | 2012-12-12 | 2013-03-27 | 京东方科技集团股份有限公司 | 一种cmos电路结构、其制备方法及显示装置 |
CN106298648A (zh) * | 2016-09-12 | 2017-01-04 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3131850B2 (ja) * | 1991-11-28 | 2001-02-05 | カシオ計算機株式会社 | 薄膜トランジスタの製造方法 |
JP3127580B2 (ja) * | 1992-06-03 | 2001-01-29 | カシオ計算機株式会社 | 薄膜トランジスタの製造方法 |
TW299897U (en) | 1993-11-05 | 1997-03-01 | Semiconductor Energy Lab | A semiconductor integrated circuit |
JPH07211912A (ja) * | 1994-01-21 | 1995-08-11 | Fuji Xerox Co Ltd | 薄膜トランジスタ及びその製造方法 |
US6096615A (en) * | 1998-04-29 | 2000-08-01 | Advanced Micro Devices, Inc. | Method of forming a semiconductor device having narrow gate electrode |
US6080607A (en) * | 1998-05-26 | 2000-06-27 | National Science Council | Method for manufacturing a transistor having a low leakage current |
JP2001189461A (ja) * | 1999-10-21 | 2001-07-10 | Matsushita Electric Ind Co Ltd | 薄膜トランジスタ及びそれを用いた液晶表示装置 |
JP4115441B2 (ja) * | 2004-10-29 | 2008-07-09 | シャープ株式会社 | 半導体装置およびその製造方法 |
TWI401802B (zh) * | 2005-06-30 | 2013-07-11 | Samsung Display Co Ltd | 薄膜電晶體板及其製造方法 |
FR2890236B1 (fr) | 2005-08-30 | 2007-11-30 | Commissariat Energie Atomique | Procede de fabrication de circuits en couches minces en silicium amorphe et polycristallin |
US8354674B2 (en) * | 2007-06-29 | 2013-01-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device wherein a property of a first semiconductor layer is different from a property of a second semiconductor layer |
KR102480794B1 (ko) * | 2009-12-28 | 2022-12-22 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 기억 장치와 반도체 장치 |
WO2011089847A1 (en) * | 2010-01-20 | 2011-07-28 | Semiconductor Energy Laboratory Co., Ltd. | Signal processing circuit and method for driving the same |
SG2014013833A (en) * | 2011-06-24 | 2014-10-30 | Sharp Kk | Display device and method for manufacturing same |
WO2015052991A1 (ja) * | 2013-10-09 | 2015-04-16 | シャープ株式会社 | 半導体装置およびその製造方法 |
CN104576387B (zh) * | 2013-10-14 | 2017-07-25 | 上海和辉光电有限公司 | 低温多晶硅薄膜晶体管制造方法 |
CN103715196B (zh) * | 2013-12-27 | 2015-03-25 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
US10186528B2 (en) * | 2014-02-24 | 2019-01-22 | Lg Display Co., Ltd. | Thin film transistor substrate and display using the same |
KR102205856B1 (ko) * | 2014-06-11 | 2021-01-21 | 삼성디스플레이 주식회사 | 센서를 포함하는 유기 발광 표시 장치 |
CN104810382A (zh) * | 2015-05-07 | 2015-07-29 | 深圳市华星光电技术有限公司 | Amoled背板的制作方法及其结构 |
KR102408898B1 (ko) * | 2015-06-19 | 2022-06-16 | 엘지디스플레이 주식회사 | 박막 트랜지스터 기판 및 이를 이용한 표시장치 |
CN106558593B (zh) * | 2015-09-18 | 2019-12-17 | 鸿富锦精密工业(深圳)有限公司 | 阵列基板、显示面板、显示装置及阵列基板的制备方法 |
WO2017130776A1 (ja) * | 2016-01-27 | 2017-08-03 | シャープ株式会社 | 半導体装置およびその製造方法 |
CN105931988B (zh) * | 2016-05-30 | 2019-12-24 | 深圳市华星光电技术有限公司 | Amoled像素驱动电路的制作方法 |
CN106057677B (zh) | 2016-06-02 | 2019-01-22 | 深圳市华星光电技术有限公司 | 低温多晶硅薄膜晶体管的制作方法 |
CN106098628B (zh) | 2016-06-07 | 2019-04-02 | 深圳市华星光电技术有限公司 | Tft背板的制作方法及tft背板 |
CN106684037B (zh) * | 2017-03-22 | 2019-09-24 | 深圳市华星光电半导体显示技术有限公司 | 优化4m制程的tft阵列制备方法 |
-
2017
- 2017-03-30 CN CN201710203707.6A patent/CN106952928B/zh active Active
- 2017-05-12 US US15/532,493 patent/US10347666B2/en active Active
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- 2017-05-12 WO PCT/CN2017/084135 patent/WO2018176589A1/zh unknown
- 2017-05-12 JP JP2019548018A patent/JP6901070B2/ja active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0837307A (ja) * | 1994-05-20 | 1996-02-06 | Sanyo Electric Co Ltd | 半導体装置の製造方法および液晶ディスプレイ |
CN103000632A (zh) * | 2012-12-12 | 2013-03-27 | 京东方科技集团股份有限公司 | 一种cmos电路结构、其制备方法及显示装置 |
CN106298648A (zh) * | 2016-09-12 | 2017-01-04 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
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