CN106898613A - Tft基板及其制作方法 - Google Patents
Tft基板及其制作方法 Download PDFInfo
- Publication number
- CN106898613A CN106898613A CN201710067469.0A CN201710067469A CN106898613A CN 106898613 A CN106898613 A CN 106898613A CN 201710067469 A CN201710067469 A CN 201710067469A CN 106898613 A CN106898613 A CN 106898613A
- Authority
- CN
- China
- Prior art keywords
- layer
- tft substrate
- drain electrode
- electrode
- ion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 103
- 238000002360 preparation method Methods 0.000 title claims abstract description 29
- 239000004065 semiconductor Substances 0.000 claims abstract description 70
- 238000000034 method Methods 0.000 claims abstract description 38
- 238000012545 processing Methods 0.000 claims abstract description 22
- 150000002500 ions Chemical class 0.000 claims description 72
- 238000002161 passivation Methods 0.000 claims description 50
- 239000000463 material Substances 0.000 claims description 20
- 239000012212 insulator Substances 0.000 claims description 18
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 17
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 14
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 13
- 238000005530 etching Methods 0.000 claims description 9
- 229920005591 polysilicon Polymers 0.000 claims description 9
- 239000002131 composite material Substances 0.000 claims description 8
- 239000010949 copper Substances 0.000 claims description 8
- 239000011521 glass Substances 0.000 claims description 8
- -1 phosphonium ion Chemical class 0.000 claims description 8
- 239000010936 titanium Substances 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 7
- 238000003475 lamination Methods 0.000 claims description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 6
- 239000004411 aluminium Substances 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 6
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 claims description 6
- 238000009413 insulation Methods 0.000 claims description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 6
- 239000010937 tungsten Substances 0.000 claims description 6
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 4
- 238000011161 development Methods 0.000 claims description 4
- 230000004888 barrier function Effects 0.000 claims description 3
- 238000002425 crystallisation Methods 0.000 claims description 3
- 230000008025 crystallization Effects 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 2
- 229910000838 Al alloy Inorganic materials 0.000 claims 2
- 229910000881 Cu alloy Inorganic materials 0.000 claims 2
- 229910001182 Mo alloy Inorganic materials 0.000 claims 2
- 229910001069 Ti alloy Inorganic materials 0.000 claims 2
- 229910001080 W alloy Inorganic materials 0.000 claims 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 1
- 229910003437 indium oxide Inorganic materials 0.000 claims 1
- PJXISJQVUVHSOJ-UHFFFAOYSA-N indium(iii) oxide Chemical compound [O-2].[O-2].[O-2].[In+3].[In+3] PJXISJQVUVHSOJ-UHFFFAOYSA-N 0.000 claims 1
- 239000010410 layer Substances 0.000 abstract description 184
- 238000004519 manufacturing process Methods 0.000 abstract description 14
- 239000011229 interlayer Substances 0.000 abstract description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 15
- 239000010408 film Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 8
- 238000005516 engineering process Methods 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 5
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 4
- 239000000956 alloy Substances 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 4
- 229910052750 molybdenum Inorganic materials 0.000 description 4
- 239000011733 molybdenum Substances 0.000 description 4
- 239000000377 silicon dioxide Substances 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 229910052719 titanium Inorganic materials 0.000 description 4
- 229910052721 tungsten Inorganic materials 0.000 description 4
- 229920001621 AMOLED Polymers 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 229910004205 SiNX Inorganic materials 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000027756 respiratory electron transport chain Effects 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000003724 hair brightness Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000005424 photoluminescence Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000000565 sealant Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78651—Silicon transistors
- H01L29/7866—Non-monocrystalline silicon transistors
- H01L29/78672—Polycrystalline or microcrystalline silicon transistor
- H01L29/78678—Polycrystalline or microcrystalline silicon transistor with inverted-type structure, e.g. with bottom gate
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136231—Active matrix addressed cells for reducing the number of lithographic steps
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2202/00—Materials and properties
- G02F2202/06—Materials and properties dopant
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F2202/00—Materials and properties
- G02F2202/10—Materials and properties semiconductor
- G02F2202/104—Materials and properties semiconductor poly-Si
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- High Energy & Nuclear Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Nonlinear Science (AREA)
- Optics & Photonics (AREA)
- Mathematical Physics (AREA)
- Thin Film Transistor (AREA)
Abstract
本发明提供一种TFT基板及其制作方法。本发明的TFT基板的制作方法,采用底栅极结构制作TFT基板,整个制程使用七道光罩完成,与现有技术相比,有效减少了光罩的使用数量,简化了TFT基板的制作流程,同时有效提升产品良率,提高产能;通过对半导体图案的两端进行离子重掺杂形成源极与漏极,不仅可以减少工艺流程,而且制得的源极与漏极无需经过层间介电层的过孔与有源层两端接触,可有效降低接触电阻,提高产品良率。本发明的TFT基板,采用底栅极结构,整个TFT基板使用七道光罩即可制作完成,与现有技术相比,光罩的使用数量较少,TFT基板的制作流程简单,且产品良率与产能较高。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种TFT基板及其制作方法。
背景技术
随着显示技术的发展,液晶显示器(Liquid Crystal Display,LCD)等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点,而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品,成为显示装置中的主流。
现有市场上的液晶显示装置大部分为背光型液晶显示器,其包括液晶显示面板及背光模组(backlight module)。液晶显示面板的工作原理是在两片平行的玻璃基板当中放置液晶分子,两片玻璃基板中间有许多垂直和水平的细小电线,通过通电与否来控制液晶分子改变方向,将背光模组的光线折射出来产生画面。
通常液晶显示面板由彩膜(CF,Color Filter)基板、薄膜晶体管(TFT,Thin FilmTransistor)基板、夹于彩膜基板与薄膜晶体管基板之间的液晶(LC,Liquid Crystal)及密封胶框(Sealant)组成,其成型工艺一般包括:前段阵列(Array)制程(薄膜、黄光、蚀刻及剥膜)、中段成盒(Cell)制程(TFT基板与CF基板贴合)及后段模组组装制程(驱动IC与印刷电路板压合)。其中,前段Array制程主要是形成TFT基板,以便于控制液晶分子的运动;中段Cell制程主要是在TFT基板与CF基板之间添加液晶;后段模组组装制程主要是驱动IC压合与印刷电路板的整合,进而驱动液晶分子转动,显示图像。
有机发光二极管(Organic Light-Emitting Diode,OLED)显示器,也称为有机电致发光显示器,是一种新兴的平板显示装置,由于其具有制备工艺简单、成本低、功耗低、发光亮度高、工作温度适应范围广、体积轻薄、响应速度快,而且易于实现彩色显示和大屏幕显示、易于实现和集成电路驱动器相匹配、易于实现柔性显示等优点,因而具有广阔的应用前景。
OLED通常包括:基板、设于基板上的阳极、设于阳极上的空穴注入层、设于空穴注入层上的空穴传输层、设于空穴传输层上的发光层、设于发光层上的电子传输层、设于电子传输层上的电子注入层、及设于电子注入层上的阴极。OLED显示器件的发光原理为半导体材料和有机发光材料在电场驱动下,通过载流子注入和复合导致发光。具体的,OLED显示器件通常采用ITO像素电极和金属电极分别作为器件的阳极和阴极,在一定电压驱动下,电子和空穴分别从阴极和阳极注入到电子传输层和空穴传输层,电子和空穴分别经过电子传输层和空穴传输层迁移到发光层,并在发光层中相遇,形成激子并使发光分子激发,后者经过辐射弛豫而发出可见光。
OLED按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED,PMOLED)和有源矩阵型OLED(Active Matrix OLED,AMOLED)两大类,即直接寻址和薄膜晶体管矩阵寻址两类。其中,AMOLED具有呈阵列式排布的像素,属于主动显示类型,发光效能高,通常用作高清晰度的大尺寸显示装置。
薄膜晶体管(TFT)是目前液晶显示装置和有源矩阵驱动式有机电致发光显示装置中的主要驱动元件,直接关系到高性能平板显示装置的发展方向。低温多晶硅(Lowtemperature poly-silicon,简称LTPS),由于其具有高的电子迁移率,可以有效的减小TFT器件的面积,从而提升像素的开口率,增大面板显示亮度的同时可以降低整体的功耗,使得面板的制造成本大幅度降低。
传统的低温多晶硅TFT采用顶栅极(top gate)结构,通过栅极(gate)遮挡沟道(channel)达到自对准制作轻掺杂漏区(LDD)的目的,以减小栅极(gate)与轻掺杂漏区(LDD)的交叠,图1为现有的低温多晶硅TFT基板的结构示意图,如图1所示,所述低温多晶硅TFT基板包括从下到上依次层叠设置的衬底基板100、遮光层200、缓冲层300、有源层400、栅极绝缘层500、栅极600、层间介电层700、源极810与漏极820、平坦层900、公用电极910、钝化层920、及像素电极930,其中,所述有源层400包括分别位于有源层400两端的两N型重掺杂区430、位于有源层400中间的沟道区410、及分别位于两N型重掺杂区430与沟道区410之间的两N型轻掺杂区420。
上述低温多晶硅TFT基板的制作方法中,遮光层200的图形化制程、有源层400的图形化制程、N型重掺杂区430的掺杂制程、栅极600的图形化制程与N型轻掺杂区420的掺杂制程、层间介电层700的图形化制程、源极810与漏极820的图形化制程、平坦层900的图形化制程、公用电极910的图形化制程、钝化层920的图形化制程、以及像素电极930的图形化制程分别需要使用一道光罩完成,因此整个低温多晶硅TFT基板的制程共需要10张光罩完成,工艺流程复杂,制作成本较高,且产品良率较低。
发明内容
本发明的目的在于提供一种TFT基板的制作方法,能够有效减少光罩的使用数量,简化TFT基板的制作流程,同时有效提升产品良率,提高产能。
本发明的目的还在于提供一种TFT基板,制作过程中光罩的使用数量较少,制作流程简单,且产品良率与产能较高。
为实现上述目的,本发明首先提供一种TFT基板的制作方法,包括如下步骤:
步骤1、提供衬底基板,在所述衬底基板上沉积第一导电层,采用第一道光罩对所述第一导电层进行图形化处理,得到栅极;
步骤2、在所述栅极与衬底基板上沉积栅极绝缘层,在所述栅极绝缘层上形成半导体层,采用第二道光罩对所述半导体层进行图形化处理,得到半导体图案;
步骤3、在所述半导体图案及栅极绝缘层上形成光阻层,采用第三道光罩对所述光阻层进行曝光显影,得到对应位于半导体图案中间区域上方的光阻图案,所述光阻图案的纵剖面呈梯形;
以该光阻图案为掩膜板,对半导体图案进行离子重掺杂处理,在所述半导体图案上形成位于两端的源极及漏极、及位于源极和漏极之间的有源层;
步骤4、对所述光阻图案进行干蚀刻处理,减薄所述光阻图案的厚度,从而暴露出所述有源层的两端;
以蚀刻后的光阻图案为掩膜板,对所述有源层的两端进行离子轻掺杂处理,在所述有源层上形成位于两端且分别与所述源极和漏极相连接的两个离子轻掺杂半导体层、以及位于两个离子轻掺杂半导体层之间的沟道区半导体层;
步骤5、去除蚀刻后的光阻图案,在所述有源层、源极、漏极、及栅极绝缘层上沉积第一钝化层,在所述第一钝化层上沉积平坦层,采用第四道光罩对所述第一钝化层与平坦层进行图形化处理,在所述第一钝化层与平坦层上形成对应于所述漏极上方的第一过孔;
步骤6、在所述平坦层上沉积第一透明导电膜层,采用第五道光罩对所述第一透明导电膜层进行图形化处理,得到公用电极;
步骤7、在所述公用电极与平坦层上沉积第二钝化层,采用第六道光罩对所述第二钝化层进行图形化处理,在所述第二钝化层上形成对应于所述漏极上方且位于第一过孔内的第二过孔;
步骤8、在所述第二钝化层上沉积第二透明导电膜层,采用第七道光罩对所述第二透明导电膜层进行图形化处理,得到像素电极,所述像素电极经由所述第二过孔与所述漏极相连接。
所述步骤2中,在所述栅极绝缘层上形成半导体层的步骤包括:在所述栅极绝缘层上沉积非晶硅层,采用结晶制程将非晶硅层转化为多晶硅层,所述多晶硅层即为半导体层。
所述步骤3中,对所述半导体图案进行N型离子重掺杂处理,所述N型离子为磷离子;所述步骤4中,对所述有源层的两端进行N型离子轻掺杂处理,所述N型离子为磷离子。
所述源极及漏极中的掺杂离子浓度为1×1014~8×1015ions/cm3,所述离子轻掺杂半导体层中的掺杂离子浓度为5×1012~9×1013ions/cm3。
所述衬底基板为玻璃基板;所述栅极的材料包括钼、铝、铜、钛、钨、及以上金属的合金中的至少一种;所述第一钝化层与第二钝化层分别为氮化硅层或者氮化硅层与氧化硅层的叠层复合层;所述平坦层的材料为透明有机绝缘材料;所述公用电极与像素电极的材料均为氧化铟锡。
本发明还提供一种TFT基板,包括从下到上依次层叠设置的衬底基板、栅极、栅极绝缘层、有源层及源极与漏极、第一钝化层、平坦层、公用电极、第二钝化层、以及像素电极;
所述源极与漏极分别位于所述有源层两侧且与其相连接,所述源极与漏极均由对半导体进行离子重掺杂制得,所述有源层包括位于两端且分别与所述源极和漏极相连接的两个离子轻掺杂半导体层、以及位于两个离子轻掺杂半导体层之间的沟道区半导体层;
所述第一钝化层与平坦层上设有对应于所述漏极上方的第一过孔,所述第二钝化层上设有对应于所述漏极上方且位于第一过孔内的第二过孔,所述像素电极经由所述第二过孔与所述漏极相连接。
所述源极、漏极、离子轻掺杂半导体层、及沟道区半导体层均由多晶硅层制得。
所述源极、漏极、与离子轻掺杂半导体层中掺杂的离子均为N型离子,所述N型离子为磷离子。
所述源极、及漏极中的掺杂离子浓度为1×1014~8×1015ions/cm3,所述离子轻掺杂半导体层中的掺杂离子浓度为5×1012~9×1013ions/cm3。
所述衬底基板为玻璃基板;所述栅极的材料包括钼、铝、铜、钛、钨、及以上金属的合金中的至少一种;所述第一钝化层与第二钝化层分别为氮化硅层或者氮化硅层与氧化硅层的叠层复合层;所述平坦层的材料为透明有机绝缘材料;所述公用电极与像素电极的材料均为氧化铟锡。
本发明的有益效果:本发明提供的一种TFT基板的制作方法,采用底栅极结构制作TFT基板,整个制程使用七道光罩完成,与现有技术相比,有效减少了光罩的使用数量,简化了TFT基板的制作流程,同时有效提升产品良率,提高产能;通过对半导体图案的两端进行离子重掺杂形成源极与漏极,不仅可以减少工艺流程,而且制得的源极与漏极无需经过层间介电层的过孔与有源层两端接触,可有效降低接触电阻,提高产品良率。本发明提供的一种TFT基板,采用底栅极结构,整个TFT基板使用七道光罩即可制作完成,与现有技术相比,光罩的使用数量较少,TFT基板的制作流程简单,且产品良率与产能较高;该TFT基板中的源极与漏极均由对半导体进行离子重掺杂制得,不仅可以减少TFT基板的工艺流程,而且源极与漏极无需经过层间介电层的过孔与有源层两端接触,可有效降低接触电阻,提高产品良率。
为了能更进一步了解本发明的特征以及技术内容,请参阅以下有关本发明的详细说明与附图,然而附图仅提供参考与说明用,并非用来对本发明加以限制。
附图说明
下面结合附图,通过对本发明的具体实施方式详细描述,将使本发明的技术方案及其它有益效果显而易见。
附图中,
图1为现有的低温多晶硅TFT基板的结构示意图;
图2为本发明的TFT基板的制作方法的流程图;
图3与图4为本发明的TFT基板的制作方法的步骤1的示意图;
图5与图6为本发明的TFT基板的制作方法的步骤2的示意图;
图7与图8为本发明的TFT基板的制作方法的步骤3的示意图;
图9与图10为本发明的TFT基板的制作方法的步骤4的示意图;
图11与图12为本发明的TFT基板的制作方法的步骤5的示意图;
图13与图14为本发明的TFT基板的制作方法的步骤6的示意图;
图15与图16为本发明的TFT基板的制作方法的步骤7的示意图;
图17与图18为本发明的TFT基板的制作方法的步骤8的示意图且图18为本发明的TFT基板的结构示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果,以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2,本发明提供一种TFT基板的制作方法,包括如下步骤:
步骤1、如图3与图4所示,提供衬底基板10,在所述衬底基板10上沉积第一导电层19,采用第一道光罩11对所述第一导电层19进行图形化处理,得到栅极20。
具体的,所述衬底基板10为玻璃基板。
具体的,所述栅极20的材料包括钼(Mo)、铝(Al)、铜(Cu)、钛(Ti)、钨(W)、及以上金属的合金中的至少一种。
步骤2、如图5与图6所示,在所述栅极20与衬底基板10上沉积栅极绝缘层30,在所述栅极绝缘层30上形成半导体层35,采用第二道光罩12对所述半导体层35进行图形化处理,得到半导体图案35’。
具体的,所述步骤2中,在所述栅极绝缘层30上形成半导体层35的步骤包括:在所述栅极绝缘层30上沉积非晶硅层,采用结晶制程将非晶硅层转化为多晶硅层,所述多晶硅层即为半导体层35。
步骤3、如图7与图8所示,在所述半导体图案35’及栅极绝缘层30上形成光阻层55,采用第三道光罩13对所述光阻层55进行曝光显影,得到对应位于半导体图案35’中间区域上方的光阻图案551,所述光阻图案551的纵剖面呈梯形;
以该光阻图案551为掩膜板,对半导体图案35’进行离子重掺杂处理,在所述半导体图案35’上形成位于两端的源极51及漏极52、及位于源极51和漏极52之间的有源层40。
具体的,所述离子重掺杂半导体层43具有导体的性质,导电性能良好。
具体的,所述步骤3中,对所述半导体图案35’进行N型离子重掺杂处理,所述N型离子为磷离子。
具体的,所述源极51及漏极52中的掺杂离子浓度为1×1014~8×1015ions/cm3。
步骤4、如图9所示,对所述光阻图案551进行干蚀刻处理,减薄所述光阻图案551的厚度,从而暴露出所述有源层40的两端;
如图10所示,以蚀刻后的光阻图案551为掩膜板,对所述有源层40的两端进行离子轻掺杂处理,在所述有源层40上形成位于两端且分别与所述源极51和漏极52相连接的两个离子轻掺杂半导体层42、以及位于两个离子轻掺杂半导体层42之间的沟道区半导体层41。
具体的,所述步骤4中,在所述光阻图案551的干蚀刻制程中,由于所述光阻图案551的梯形纵剖面位于两坡角处的厚度逐渐减小,而在干蚀刻过程中厚度最小的地方会首先被蚀刻掉,因此在干蚀刻制程中,所述光阻图案551的两坡角的宽度会逐渐减小直至为零,从而使得所述光阻图案551的宽度逐渐减小。具体的,通过控制干蚀刻制程的蚀刻速度与蚀刻时间,可以控制所述光阻图案551的宽度减小至一定长度。
具体的,所述步骤4中,对所述有源层40的两端进行N型离子轻掺杂处理,所述N型离子为磷离子。
具体的,所述离子轻掺杂半导体层42中的掺杂离子浓度为5×1012~9×1013ions/cm3。
步骤5、如图11与图12所示,去除蚀刻后的光阻图案551,在所述有源层40、源极51、漏极52、及栅极绝缘层30上沉积第一钝化层60,在所述第一钝化层60上沉积平坦层70,采用第四道光罩14对所述第一钝化层60与平坦层70进行图形化处理,在所述第一钝化层60与平坦层70上形成对应于所述漏极52上方的第一过孔71。
具体的,所述第一钝化层60为氮化硅(SiNx)层或者氮化硅层与氧化硅(SiOx)层的叠层复合层。
具体的,所述平坦层70的材料为透明有机绝缘材料。
步骤6、如图13与图14所示,在所述平坦层70上沉积第一透明导电膜层75,采用第五道光罩15对所述第一透明导电膜层75进行图形化处理,得到公用电极80。
具体的,所述公用电极80的材料为氧化铟锡。
步骤7、如图15与图16所示,在所述公用电极80与平坦层70上沉积第二钝化层90,采用第六道光罩16对所述第二钝化层90进行图形化处理,在所述第二钝化层90上形成对应于所述漏极52上方且位于第一过孔71内的第二过孔92。
具体的,所述第二钝化层90为氮化硅层或者氮化硅层与氧化硅层的叠层复合层。
步骤8、如图17与图18所示,在所述第二钝化层90上沉积第二透明导电膜层95,采用第七道光罩17对所述第二透明导电膜层95进行图形化处理,得到像素电极91,所述像素电极91经由所述第二过孔92与所述漏极52相连接。
具体的,所述像素电极91的材料为氧化铟锡。
上述TFT基板的制作方法,采用底栅极结构制作TFT基板,整个制程使用七道光罩完成,与现有技术相比,有效减少了光罩的使用数量,简化了TFT基板的制作流程,同时有效提升产品良率,提高产能;通过对半导体图案35’的两端进行离子重掺杂形成源极51与漏极52,不仅可以减少工艺流程,而且制得的源极51与漏极52无需经过层间介电层的过孔与有源层40两端接触,可有效降低接触电阻,提高产品良率。
请参阅图18,基于上述TFT基板的制作方法,本发明还提供一种TFT基板,包括从下到上依次层叠设置的衬底基板10、栅极20、栅极绝缘层30、有源层40及源极51与漏极52、第一钝化层60、平坦层70、公用电极80、第二钝化层90、以及像素电极91;
所述源极51与漏极52分别位于所述有源层40两侧且与其相连接,所述源极51与漏极52均由对半导体进行离子重掺杂制得,所述有源层40包括位于两端且分别与所述源极51和漏极52相连接的两个离子轻掺杂半导体层42、以及位于两个离子轻掺杂半导体层42之间的沟道区半导体层41;
所述第一钝化层60与平坦层70上设有对应于所述漏极52上方的第一过孔71,所述第二钝化层90上设有对应于所述漏极52上方且位于第一过孔71内的第二过孔92,所述像素电极91经由所述第二过孔92与所述漏极52相连接。
具体的,所述衬底基板10为玻璃基板。
具体的,所述栅极20的材料包括钼(Mo)、铝(Al)、铜(Cu)、钛(Ti)、钨(W)、及以上金属的合金中的至少一种。
具体的,所述源极51、漏极52、离子轻掺杂半导体层42、及沟道区半导体层41均由多晶硅层制得。
具体的,所述源极51、漏极52与离子轻掺杂半导体层42中掺杂的离子均为N型离子,所述N型离子为磷离子。
具体的,所述源极51、及漏极52中的掺杂离子浓度为1×1014~8×1015ions/cm3,所述离子轻掺杂半导体层42中的掺杂离子浓度为5×1012~9×1013ions/cm3。
具体的,所述第一钝化层60与第二钝化层90分别为氮化硅(SiNx)层或者氮化硅层与氧化硅(SiOx)层的叠层复合层。
具体的,所述平坦层70的材料为透明有机绝缘材料。
具体的,所述公用电极80与像素电极91的材料均为氧化铟锡。
上述TFT基板,采用底栅极结构,整个TFT基板使用七道光罩即可制作完成,与现有技术相比,光罩的使用数量较少,TFT基板的制作流程简单,且产品良率与产能较高;该TFT基板中的源极51与漏极52均由对半导体进行离子重掺杂制得,不仅可以减少TFT基板的工艺流程,而且源极51与漏极52无需经过层间介电层的过孔与有源层40两端接触,可有效降低接触电阻,提高产品良率。
综上所述,本发明提供一种TFT基板及其制作方法。本发明的TFT基板的制作方法,采用底栅极结构制作TFT基板,整个制程使用七道光罩完成,与现有技术相比,有效减少了光罩的使用数量,简化了TFT基板的制作流程,同时有效提升产品良率,提高产能;通过对半导体图案的两端进行离子重掺杂形成源极与漏极,不仅可以减少工艺流程,而且制得的源极与漏极无需经过层间介电层的过孔与有源层两端接触,可有效降低接触电阻,提高产品良率。本发明的TFT基板,采用底栅极结构,整个TFT基板使用七道光罩即可制作完成,与现有技术相比,光罩的使用数量较少,TFT基板的制作流程简单,且产品良率与产能较高;该TFT基板中的源极与漏极均由对半导体进行离子重掺杂制得,不仅可以减少TFT基板的工艺流程,而且源极与漏极无需经过层间介电层的过孔与有源层两端接触,可有效降低接触电阻,提高产品良率。
以上所述,对于本领域的普通技术人员来说,可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形,而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (10)
1.一种TFT基板的制作方法,其特征在于,包括如下步骤:
步骤1、提供衬底基板(10),在所述衬底基板(10)上沉积第一导电层(19),采用第一道光罩(11)对所述第一导电层(19)进行图形化处理,得到栅极(20);
步骤2、在所述栅极(20)与衬底基板(10)上沉积栅极绝缘层(30),在所述栅极绝缘层(30)上形成半导体层(35),采用第二道光罩(12)对所述半导体层(35)进行图形化处理,得到半导体图案(35’);
步骤3、在所述半导体图案(35’)及栅极绝缘层(30)上形成光阻层(55),采用第三道光罩(13)对所述光阻层(55)进行曝光显影,得到对应位于半导体图案(35’)中间区域上方的光阻图案(551),所述光阻图案(551)的纵剖面呈梯形;
以该光阻图案(551)为掩膜板,对半导体图案(35’)进行离子重掺杂处理,在所述半导体图案(35’)上形成位于两端的源极(51)及漏极(52)、及位于源极(51)和漏极(52)之间的有源层(40);
步骤4、对所述光阻图案(551)进行干蚀刻处理,减薄所述光阻图案(551)的厚度,从而暴露出所述有源层(40)的两端;
以蚀刻后的光阻图案(551)为掩膜板,对所述有源层(40)的两端进行离子轻掺杂处理,在所述有源层(40)上形成位于两端且分别与所述源极(51)和漏极(52)相连接的两个离子轻掺杂半导体层(42)、以及位于两个离子轻掺杂半导体层(42)之间的沟道区半导体层(41);
步骤5、去除蚀刻后的光阻图案(551),在所述有源层(40)、源极(51)、漏极(52)、及栅极绝缘层(30)上沉积第一钝化层(60),在所述第一钝化层(60)上沉积平坦层(70),采用第四道光罩(14)对所述第一钝化层(60)与平坦层(70)进行图形化处理,在所述第一钝化层(60)与平坦层(70)上形成对应于所述漏极(52)上方的第一过孔(71);
步骤6、在所述平坦层(70)上沉积第一透明导电膜层(75),采用第五道光罩(15)对所述第一透明导电膜层(75)进行图形化处理,得到公用电极(80);
步骤7、在所述公用电极(80)与平坦层(70)上沉积第二钝化层(90),采用第六道光罩(16)对所述第二钝化层(90)进行图形化处理,在所述第二钝化层(90)上形成对应于所述漏极(52)上方且位于第一过孔(71)内的第二过孔(92);
步骤8、在所述第二钝化层(90)上沉积第二透明导电膜层(95),采用第七道光罩(17)对所述第二透明导电膜层(95)进行图形化处理,得到像素电极(91),所述像素电极(91)经由所述第二过孔(92)与所述漏极(52)相连接。
2.如权利要求1所述的TFT基板的制作方法,其特征在于,所述步骤2中,在所述栅极绝缘层(30)上形成半导体层(35)的步骤包括:在所述栅极绝缘层(30)上沉积非晶硅层,采用结晶制程将非晶硅层转化为多晶硅层,所述多晶硅层即为半导体层(35)。
3.如权利要求1所述的TFT基板的制作方法,其特征在于,所述步骤3中,对所述半导体图案(35’)进行N型离子重掺杂处理,所述N型离子为磷离子;所述步骤4中,对所述有源层(40)的两端进行N型离子轻掺杂处理,所述N型离子为磷离子。
4.如权利要求1所述的TFT基板的制作方法,其特征在于,所述源极(51)及漏极(52)中的掺杂离子浓度为1×1014~8×1015ions/cm3,所述离子轻掺杂半导体层(42)中的掺杂离子浓度为5×1012~9×1013ions/cm3。
5.如权利要求1所述的TFT基板的制作方法,其特征在于,所述衬底基板(10)为玻璃基板;所述栅极(20)的材料包括钼、铝、铜、钛、钨、及以上金属的合金中的至少一种;所述第一钝化层(60)与第二钝化层(90)分别为氮化硅层或者氮化硅层与氧化硅层的叠层复合层;所述平坦层(70)的材料为透明有机绝缘材料;所述公用电极(80)与像素电极(91)的材料均为氧化铟锡。
6.一种TFT基板,其特征在于,包括从下到上依次层叠设置的衬底基板(10)、栅极(20)、栅极绝缘层(30)、有源层(40)及源极(51)与漏极(52)、第一钝化层(60)、平坦层(70)、公用电极(80)、第二钝化层(90)、以及像素电极(91);
所述源极(51)与漏极(52)分别位于所述有源层(40)两侧且与其相连接,所述源极(51)与漏极(52)均由对半导体进行离子重掺杂制得,所述有源层(40)包括位于两端且分别与所述源极(51)和漏极(52)相连接的两个离子轻掺杂半导体层(42)、以及位于两个离子轻掺杂半导体层(42)之间的沟道区半导体层(41);
所述第一钝化层(60)与平坦层(70)上设有对应于所述漏极(52)上方的第一过孔(71),所述第二钝化层(90)上设有对应于所述漏极(52)上方且位于第一过孔(71)内的第二过孔(92),所述像素电极(91)经由所述第二过孔(92)与所述漏极(52)相连接。
7.如权利要求6所述的TFT基板,其特征在于,所述源极(51)、漏极(52)、离子轻掺杂半导体层(42)、及沟道区半导体层(41)均由多晶硅层制得。
8.如权利要求6所述的TFT基板,其特征在于,所述源极(51)、漏极(52)、与离子轻掺杂半导体层(42)中掺杂的离子均为N型离子,所述N型离子为磷离子。
9.如权利要求6所述的TFT基板,其特征在于,所述源极(51)、及漏极(52)中的掺杂离子浓度为1×1014~8×1015ions/cm3,所述离子轻掺杂半导体层(42)中的掺杂离子浓度为5×1012~9×1013ions/cm3。
10.如权利要求6所述的TFT基板,其特征在于,所述衬底基板(10)为玻璃基板;所述栅极(20)的材料包括钼、铝、铜、钛、钨、及以上金属的合金中的至少一种;所述第一钝化层(60)与第二钝化层(90)分别为氮化硅层或者氮化硅层与氧化硅层的叠层复合层;所述平坦层(70)的材料为透明有机绝缘材料;所述公用电极(80)与像素电极(91)的材料均为氧化铟锡。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710067469.0A CN106898613A (zh) | 2017-02-07 | 2017-02-07 | Tft基板及其制作方法 |
US15/441,246 US10331001B2 (en) | 2017-02-07 | 2017-02-24 | TFT substrate and manufacturing method thereof |
US16/285,130 US20190187500A1 (en) | 2017-02-07 | 2019-02-25 | Tft substrate and manufacturing method thereof |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710067469.0A CN106898613A (zh) | 2017-02-07 | 2017-02-07 | Tft基板及其制作方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN106898613A true CN106898613A (zh) | 2017-06-27 |
Family
ID=59198126
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710067469.0A Pending CN106898613A (zh) | 2017-02-07 | 2017-02-07 | Tft基板及其制作方法 |
Country Status (2)
Country | Link |
---|---|
US (2) | US10331001B2 (zh) |
CN (1) | CN106898613A (zh) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107369784A (zh) * | 2017-08-31 | 2017-11-21 | 深圳市华星光电半导体显示技术有限公司 | Oled‑tft基板及其制造方法、显示面板 |
CN108899327A (zh) * | 2018-06-29 | 2018-11-27 | 武汉华星光电技术有限公司 | 一种阵列基板及其制备方法、显示器 |
CN110137086A (zh) * | 2019-05-22 | 2019-08-16 | 深圳市华星光电技术有限公司 | Tft基板的制作方法及tft基板 |
CN110718467A (zh) * | 2019-09-24 | 2020-01-21 | 深圳市华星光电技术有限公司 | 一种tft阵列基板的制作方法 |
WO2020042258A1 (zh) * | 2018-08-28 | 2020-03-05 | 武汉华星光电技术有限公司 | 显示面板及其制造方法 |
CN111129032A (zh) * | 2019-12-19 | 2020-05-08 | 武汉华星光电技术有限公司 | 一种阵列基板及其制作方法 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7045185B2 (ja) * | 2017-12-27 | 2022-03-31 | 株式会社ジャパンディスプレイ | アレイ基板、アレイ基板の製造方法、表示装置及びスイッチング素子 |
US10957713B2 (en) * | 2018-04-19 | 2021-03-23 | Wuhan China Star Optoelectronics Technology Co., Ltd. | LTPS TFT substrate and manufacturing method thereof |
CN111668237B (zh) * | 2020-06-17 | 2024-01-26 | 京东方科技集团股份有限公司 | 一种显示基板及其制备方法、驱动方法、显示装置 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5917199A (en) * | 1998-05-15 | 1999-06-29 | Ois Optical Imaging Systems, Inc. | Solid state imager including TFTS with variably doped contact layer system for reducing TFT leakage current and increasing mobility and method of making same |
CN105489552A (zh) * | 2016-01-28 | 2016-04-13 | 武汉华星光电技术有限公司 | Ltps阵列基板的制作方法 |
CN105789325A (zh) * | 2016-04-18 | 2016-07-20 | 深圳市华星光电技术有限公司 | 薄膜晶体管、薄膜晶体管的制备方法及cmos器件 |
CN106024633A (zh) * | 2016-06-23 | 2016-10-12 | 京东方科技集团股份有限公司 | 薄膜晶体管及阵列基板的制备方法、阵列基板及显示装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001007342A (ja) * | 1999-04-20 | 2001-01-12 | Semiconductor Energy Lab Co Ltd | 半導体装置およびその作製方法 |
KR100543061B1 (ko) * | 2001-06-01 | 2006-01-20 | 엘지.필립스 엘시디 주식회사 | 구동회로부 일체형 액정표시장치용 어레이 기판의 제조방법 |
KR100584716B1 (ko) * | 2004-04-06 | 2006-05-29 | 엘지.필립스 엘시디 주식회사 | 구동회로 일체형 액정표시장치용 어레이 기판의 제조 방법 |
CN103165529B (zh) * | 2013-02-20 | 2015-04-29 | 京东方科技集团股份有限公司 | 一种阵列基板的制备方法 |
CN105118807B (zh) * | 2015-07-29 | 2018-11-06 | 深圳市华星光电技术有限公司 | 一种低温多晶硅薄膜晶体管及其制造方法 |
CN105097552A (zh) * | 2015-08-14 | 2015-11-25 | 京东方科技集团股份有限公司 | 薄膜晶体管及阵列基板的制备方法、阵列基板及显示装置 |
CN105355590B (zh) * | 2015-10-12 | 2018-04-20 | 武汉华星光电技术有限公司 | 阵列基板及其制作方法 |
CN105487315A (zh) * | 2016-01-19 | 2016-04-13 | 武汉华星光电技术有限公司 | Tft阵列基板 |
-
2017
- 2017-02-07 CN CN201710067469.0A patent/CN106898613A/zh active Pending
- 2017-02-24 US US15/441,246 patent/US10331001B2/en active Active
-
2019
- 2019-02-25 US US16/285,130 patent/US20190187500A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5917199A (en) * | 1998-05-15 | 1999-06-29 | Ois Optical Imaging Systems, Inc. | Solid state imager including TFTS with variably doped contact layer system for reducing TFT leakage current and increasing mobility and method of making same |
CN105489552A (zh) * | 2016-01-28 | 2016-04-13 | 武汉华星光电技术有限公司 | Ltps阵列基板的制作方法 |
CN105789325A (zh) * | 2016-04-18 | 2016-07-20 | 深圳市华星光电技术有限公司 | 薄膜晶体管、薄膜晶体管的制备方法及cmos器件 |
CN106024633A (zh) * | 2016-06-23 | 2016-10-12 | 京东方科技集团股份有限公司 | 薄膜晶体管及阵列基板的制备方法、阵列基板及显示装置 |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN107369784A (zh) * | 2017-08-31 | 2017-11-21 | 深圳市华星光电半导体显示技术有限公司 | Oled‑tft基板及其制造方法、显示面板 |
CN108899327A (zh) * | 2018-06-29 | 2018-11-27 | 武汉华星光电技术有限公司 | 一种阵列基板及其制备方法、显示器 |
CN108899327B (zh) * | 2018-06-29 | 2021-01-26 | 武汉华星光电技术有限公司 | 一种阵列基板及其制备方法、显示器 |
WO2020042258A1 (zh) * | 2018-08-28 | 2020-03-05 | 武汉华星光电技术有限公司 | 显示面板及其制造方法 |
US11521993B2 (en) | 2018-08-28 | 2022-12-06 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Display panel and method of manufacturing the same |
CN110137086A (zh) * | 2019-05-22 | 2019-08-16 | 深圳市华星光电技术有限公司 | Tft基板的制作方法及tft基板 |
CN110718467A (zh) * | 2019-09-24 | 2020-01-21 | 深圳市华星光电技术有限公司 | 一种tft阵列基板的制作方法 |
CN110718467B (zh) * | 2019-09-24 | 2021-12-03 | Tcl华星光电技术有限公司 | 一种tft阵列基板的制作方法 |
CN111129032A (zh) * | 2019-12-19 | 2020-05-08 | 武汉华星光电技术有限公司 | 一种阵列基板及其制作方法 |
Also Published As
Publication number | Publication date |
---|---|
US20180224683A1 (en) | 2018-08-09 |
US20190187500A1 (en) | 2019-06-20 |
US10331001B2 (en) | 2019-06-25 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN106847743A (zh) | Tft基板及其制作方法 | |
CN106898613A (zh) | Tft基板及其制作方法 | |
CN107170762B (zh) | Oled显示面板及其制作方法 | |
CN105097675B (zh) | 阵列基板及其制备方法 | |
CN106558538B (zh) | 阵列基板、显示装置及阵列基板的制备方法 | |
CN105470197B (zh) | 低温多晶硅阵列基板的制作方法 | |
CN109166896A (zh) | 显示面板及其制作方法 | |
CN107689345A (zh) | Tft基板及其制作方法与oled面板及其制作方法 | |
CN207216226U (zh) | 显示装置 | |
CN107611085B (zh) | Oled背板的制作方法 | |
CN106601778A (zh) | Oled背板及其制作方法 | |
CN107808895A (zh) | 透明oled显示器及其制作方法 | |
CN106409844A (zh) | 底栅型多晶硅tft基板及其制作方法 | |
CN106653768A (zh) | Tft背板及其制作方法 | |
CN104977764A (zh) | 一种阵列基板及其制作方法、液晶显示器 | |
CN105552027A (zh) | 阵列基板的制作方法及阵列基板 | |
CN106129086B (zh) | Tft基板及其制作方法 | |
CN104952880A (zh) | 双栅极tft基板的制作方法及其结构 | |
CN102751200B (zh) | 薄膜晶体管、阵列基板及其制造方法 | |
CN106449658A (zh) | Tft基板及其制作方法 | |
CN104538421A (zh) | Oled显示基板及其制造方法 | |
CN103928343A (zh) | 薄膜晶体管及有机发光二极管显示器制备方法 | |
CN110061034A (zh) | Oled显示面板的制备方法及oled显示面板 | |
CN103489892B (zh) | 一种阵列基板及其制作方法和显示装置 | |
CN103762244A (zh) | 薄膜晶体管及其制造方法、薄膜晶体管阵列基板及液晶面板 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170627 |