JP2002532898A - 後表面損傷を組み込む半導体ウエハの処理法 - Google Patents

後表面損傷を組み込む半導体ウエハの処理法

Info

Publication number
JP2002532898A
JP2002532898A JP2000588795A JP2000588795A JP2002532898A JP 2002532898 A JP2002532898 A JP 2002532898A JP 2000588795 A JP2000588795 A JP 2000588795A JP 2000588795 A JP2000588795 A JP 2000588795A JP 2002532898 A JP2002532898 A JP 2002532898A
Authority
JP
Japan
Prior art keywords
wafer
damage
front surface
lapping
polishing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2000588795A
Other languages
English (en)
Japanese (ja)
Inventor
ユン−ビアオ・シン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SunEdison Inc
Original Assignee
MEMC Electronic Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by MEMC Electronic Materials Inc filed Critical MEMC Electronic Materials Inc
Publication of JP2002532898A publication Critical patent/JP2002532898A/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02013—Grinding, lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02024—Mirror polishing
JP2000588795A 1998-12-16 1999-11-19 後表面損傷を組み込む半導体ウエハの処理法 Withdrawn JP2002532898A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US11243898P 1998-12-16 1998-12-16
US60/112,438 1998-12-16
US09/404,428 US6214704B1 (en) 1998-12-16 1999-09-23 Method of processing semiconductor wafers to build in back surface damage
US09/404,428 1999-09-23
PCT/US1999/027513 WO2000036637A1 (fr) 1998-12-16 1999-11-19 Procede de traitement de plaquettes en semi-conducteur utilise pour induire des dommages sur la surface arriere de ceux-ci

Publications (1)

Publication Number Publication Date
JP2002532898A true JP2002532898A (ja) 2002-10-02

Family

ID=26809943

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000588795A Withdrawn JP2002532898A (ja) 1998-12-16 1999-11-19 後表面損傷を組み込む半導体ウエハの処理法

Country Status (7)

Country Link
US (1) US6214704B1 (fr)
EP (1) EP1149410A1 (fr)
JP (1) JP2002532898A (fr)
KR (1) KR20010092732A (fr)
CN (1) CN1330797A (fr)
TW (1) TW459297B (fr)
WO (1) WO2000036637A1 (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007150167A (ja) * 2005-11-30 2007-06-14 Shin Etsu Handotai Co Ltd 半導体ウエーハの平面研削方法および製造方法
JP2015119111A (ja) * 2013-12-19 2015-06-25 国立大学法人東京工業大学 半導体装置及びその製造方法
JP2019009291A (ja) * 2017-06-26 2019-01-17 株式会社ディスコ ウエーハの加工方法

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JP3516596B2 (ja) * 1998-10-19 2004-04-05 松下電器産業株式会社 半導体装置の製造方法
DE19905737C2 (de) * 1999-02-11 2000-12-14 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer Halbleiterscheibe mit verbesserter Ebenheit
US6394888B1 (en) 1999-05-28 2002-05-28 Saint-Gobain Abrasive Technology Company Abrasive tools for grinding electronic components
JP2004506314A (ja) * 2000-08-07 2004-02-26 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド 両面研磨法を用いて半導体ウェーハを処理する方法
US6709981B2 (en) * 2000-08-16 2004-03-23 Memc Electronic Materials, Inc. Method and apparatus for processing a semiconductor wafer using novel final polishing method
DE10132504C1 (de) * 2001-07-05 2002-10-10 Wacker Siltronic Halbleitermat Verfahren zur beidseitigen Material abtragenden Bearbeitung von Halbleiterscheiben und seine Verwendung
KR20030015769A (ko) * 2001-08-17 2003-02-25 주식회사 실트론 배면에 게터링 수단을 가진 단결정 실리콘 웨이퍼 및 그제조방법
KR20030032448A (ko) * 2001-10-18 2003-04-26 주식회사 실트론 게터링 수단을 가진 단결정 실리콘 웨이퍼 및 그제조방법
KR20030032701A (ko) * 2001-10-19 2003-04-26 주식회사 실트론 반도체 웨이퍼 및 그의 제조방법
US6576501B1 (en) * 2002-05-31 2003-06-10 Seh America, Inc. Double side polished wafers having external gettering sites, and method of producing same
US7416962B2 (en) * 2002-08-30 2008-08-26 Siltronic Corporation Method for processing a semiconductor wafer including back side grinding
KR100459079B1 (ko) * 2002-12-05 2004-12-03 주식회사 실트론 실리콘웨이퍼의 게터링 능력 평가 방법
JP4878738B2 (ja) * 2004-04-30 2012-02-15 株式会社ディスコ 半導体デバイスの加工方法
DE102006020823B4 (de) * 2006-05-04 2008-04-03 Siltronic Ag Verfahren zur Herstellung einer polierten Halbleiterscheibe
US8275584B2 (en) * 2006-12-12 2012-09-25 Taiwan Semiconductor Manufacturing Company, Ltd. Unified model for process variations in integrated circuits
DE102009025242B4 (de) * 2009-06-17 2013-05-23 Siltronic Ag Verfahren zum beidseitigen chemischen Schleifen einer Halbleiterscheibe
DE102009025243B4 (de) * 2009-06-17 2011-11-17 Siltronic Ag Verfahren zur Herstellung und Verfahren zur Bearbeitung einer Halbleiterscheibe aus Silicium
DE102009030297B3 (de) * 2009-06-24 2011-01-20 Siltronic Ag Verfahren zum Polieren einer Halbleiterscheibe
CN103029031A (zh) * 2011-09-30 2013-04-10 上海双明光学科技有限公司 一种晶圆基片加工方法
CN103707147B (zh) * 2013-12-18 2016-04-06 上海现代先进超精密制造中心有限公司 碳化硅超硬材料高精度大平面的加工方法
CN103639879A (zh) * 2013-12-30 2014-03-19 昆明云锗高新技术有限公司 硅单晶片加工新工艺
CN105291287B (zh) * 2014-06-05 2017-09-08 兆远科技股份有限公司 蓝宝石晶片加工方法及其加工工艺中的中间物
CN106653561B (zh) * 2015-11-03 2021-03-30 有研半导体材料有限公司 一种具有背吸杂能力的300mm重掺硅片的加工方法
CN112820629A (zh) * 2020-12-31 2021-05-18 上海新昇半导体科技有限公司 一种晶圆研磨方法
CN115338694B (zh) * 2022-07-01 2024-02-02 金华博蓝特新材料有限公司 一种双面抛光晶片的加工方法

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007150167A (ja) * 2005-11-30 2007-06-14 Shin Etsu Handotai Co Ltd 半導体ウエーハの平面研削方法および製造方法
JP2015119111A (ja) * 2013-12-19 2015-06-25 国立大学法人東京工業大学 半導体装置及びその製造方法
JP2019009291A (ja) * 2017-06-26 2019-01-17 株式会社ディスコ ウエーハの加工方法

Also Published As

Publication number Publication date
TW459297B (en) 2001-10-11
CN1330797A (zh) 2002-01-09
EP1149410A1 (fr) 2001-10-31
KR20010092732A (ko) 2001-10-26
WO2000036637A1 (fr) 2000-06-22
US6214704B1 (en) 2001-04-10

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